--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target vect_int } */
+
+void foo(int *restrict a, int *b, int n)
+{
+ for(int i=0; i<n; ++i){
+ a[i] = a[i] + b[i];
+ if (a[i] > 0)
+ __builtin_prefetch(&(b[i+8]));
+ }
+}
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+
}
}
+ /* Check if it's a prefetch. Many ISAs contain vectorized and/or
+ conditional prefetches so if-convert should convert them or remove
+ them. Mark them as supported. */
+ if (gimple_call_builtin_p (stmt, BUILT_IN_PREFETCH))
+ return true;
+
/* There are some IFN_s that are used to replace builtins but have the
same semantics. Even if MASK_CALL cannot handle them vectorable_call
will insert the proper selection, so do not block conversion. */
release_defs (stmt);
continue;
}
+ /* For now, just drop prefetches. Do it now to remove any possible
+ aliasing check failures from the address calculations of the
+ prefetch. Vect would be too late in that regard. */
+ else if (gimple_call_builtin_p (stmt, BUILT_IN_PREFETCH))
+ {
+ unlink_stmt_vdef (stmt);
+ gsi_remove (&gsi, true);
+ release_defs (stmt);
+ continue;
+ }
else if (gimple_plf (stmt, GF_PLF_2)
&& (is_gimple_assign (stmt)
|| (gimple_call_builtin_p (stmt)