struct cpu_fp_state {
struct user_fpsimd_state *st;
struct arm64_sve_state *sve_state;
- void *sme_state;
+ struct arm64_sme_state *sme_state;
u64 *svcr;
u64 *fpmr;
unsigned int sve_vl;
{
/* The ZT register state is stored immediately after the ZA state */
unsigned int sme_vq = sve_vq_from_vl(thread_get_sme_vl(thread));
- return thread->sme_state + ZA_SIG_REGS_SIZE(sme_vq);
+ return (void *)thread->sme_state + ZA_SIG_REGS_SIZE(sme_vq);
}
static inline unsigned int sve_get_vl(void)
extern void sve_save_state(struct arm64_sve_state *state, int save_ffr);
extern void sve_load_state(const struct arm64_sve_state *state, int restore_ffr);
extern void sve_flush_live(bool flush_ffr, unsigned long vq_minus_1);
-extern void sme_save_state(void *state, int zt);
-extern void sme_load_state(void const *state, int zt);
+extern void sme_save_state(struct arm64_sme_state *state, int zt);
+extern void sme_load_state(const struct arm64_sme_state *state, int zt);
struct arm64_cpu_capabilities;
extern void cpu_enable_fpsimd(const struct arm64_cpu_capabilities *__unused);
};
struct arm64_sve_state; /* Opaque type */
+struct arm64_sme_state; /* Opaque type */
struct cpu_context {
unsigned long x19;
enum fp_type fp_type; /* registers FPSIMD or SVE? */
unsigned int fpsimd_cpu;
struct arm64_sve_state *sve_state; /* SVE registers, if any */
- void *sme_state; /* ZA and ZT state, if any */
+ struct arm64_sme_state *sme_state; /* ZA and ZT state, if any */
unsigned int vl[ARM64_VEC_MAX]; /* vector length */
unsigned int vl_onexec[ARM64_VEC_MAX]; /* vl after next exec */
unsigned long fault_address; /* fault info */
unsigned int sve_vl = task_get_sve_vl(task);
unsigned int sme_vl = task_get_sme_vl(task);
struct arm64_sve_state *sve_state = NULL;
- void *sme_state = NULL;
+ struct arm64_sme_state *sme_state = NULL;
if (type == ARM64_VEC_SME)
sme_vl = vl;
void fpsimd_flush_thread(void)
{
struct arm64_sve_state *sve_state = NULL;
- void *sme_state = NULL;
+ struct arm64_sme_state *sme_state = NULL;
if (!system_supports_fpsimd())
return;