dt-bindings: clock: qcom: Add video clock controller on Glymur SoC

Add compatible string for Glymur video clock controller and the bindings
for Glymur Qualcomm SoC.

Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260202-glymur_videocc-v2-2-8f7d8b4d8edd@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml
index e6beebd6a36ee1ce213a816f60df8a76fa5c44d6..7bbf120d928cc506a4f7aaeaa1c24e5da760e450 100644 (file)
--- a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml
@@ -15,6 +15,7 @@ description: |
   domains on SM8450.
 
   See also:
+    include/dt-bindings/clock/qcom,glymur-videocc.h
     include/dt-bindings/clock/qcom,kaanapali-videocc.h
     include/dt-bindings/clock/qcom,sm8450-videocc.h
     include/dt-bindings/clock/qcom,sm8650-videocc.h
@@ -23,6 +24,7 @@ description: |
 properties:
   compatible:
     enum:
+      - qcom,glymur-videocc
       - qcom,kaanapali-videocc
       - qcom,sm8450-videocc
       - qcom,sm8475-videocc
@@ -63,6 +65,7 @@ allOf:
         compatible:
           contains:
             enum:
+              - qcom,glymur-videocc
               - qcom,kaanapali-videocc
               - qcom,sm8450-videocc
               - qcom,sm8550-videocc

diff --git a/include/dt-bindings/clock/qcom,glymur-videocc.h b/include/dt-bindings/clock/qcom,glymur-videocc.h
new file mode 100644 (file)
index 0000000..98c0deb
--- /dev/null
+++ b/include/dt-bindings/clock/qcom,glymur-videocc.h
@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_GLYMUR_H
+#define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_GLYMUR_H
+
+/* VIDEO_CC clocks */
+#define VIDEO_CC_AHB_CLK                                       0
+#define VIDEO_CC_AHB_CLK_SRC                                   1
+#define VIDEO_CC_MVS0_CLK                                      2
+#define VIDEO_CC_MVS0_CLK_SRC                                  3
+#define VIDEO_CC_MVS0_DIV_CLK_SRC                              4
+#define VIDEO_CC_MVS0_FREERUN_CLK                              5
+#define VIDEO_CC_MVS0_SHIFT_CLK                                        6
+#define VIDEO_CC_MVS0C_CLK                                     7
+#define VIDEO_CC_MVS0C_DIV2_DIV_CLK_SRC                                8
+#define VIDEO_CC_MVS0C_FREERUN_CLK                             9
+#define VIDEO_CC_MVS0C_SHIFT_CLK                               10
+#define VIDEO_CC_MVS1_CLK                                      11
+#define VIDEO_CC_MVS1_DIV_CLK_SRC                              12
+#define VIDEO_CC_MVS1_FREERUN_CLK                              13
+#define VIDEO_CC_MVS1_SHIFT_CLK                                        14
+#define VIDEO_CC_PLL0                                          15
+#define VIDEO_CC_SLEEP_CLK                                     16
+#define VIDEO_CC_SLEEP_CLK_SRC                                 17
+#define VIDEO_CC_XO_CLK                                                18
+#define VIDEO_CC_XO_CLK_SRC                                    19
+
+/* VIDEO_CC power domains */
+#define VIDEO_CC_MVS0_GDSC                                     0
+#define VIDEO_CC_MVS0C_GDSC                                    1
+#define VIDEO_CC_MVS1_GDSC                                     2
+
+/* VIDEO_CC resets */
+#define VIDEO_CC_INTERFACE_BCR                                 0
+#define VIDEO_CC_MVS0_BCR                                      1
+#define VIDEO_CC_MVS0C_BCR                                     2
+#define VIDEO_CC_MVS0C_FREERUN_CLK_ARES                                3
+#define VIDEO_CC_MVS0_FREERUN_CLK_ARES                         4
+#define VIDEO_CC_MVS1_FREERUN_CLK_ARES                         5
+#define VIDEO_CC_XO_CLK_ARES                                   6
+#define VIDEO_CC_MVS1_BCR                                      7
+#endif