WHV_REGISTER_NAME reg_names[3];
UINT32 reg_count;
bool is_known_msr = 0;
+ bool raises_gpf = false;
uint64_t val;
if (vcpu->exit_ctx.MsrAccess.AccessInfo.IsWrite) {
int msr_ret = cpu_set_apic_base(X86_CPU(cpu)->apic_state, val);
if (msr_ret < 0) {
x86_emul_raise_exception(&X86_CPU(cpu)->env, EXCP0D_GPF, 0);
+ raises_gpf = true;
} else {
whpx_set_reg(cpu, WHvX64RegisterApicBase, reg);
}
reg_values[1].Reg64 = val;
if (msr_ret < 0) {
x86_emul_raise_exception(&X86_CPU(cpu)->env, EXCP0D_GPF, 0);
+ raises_gpf = true;
}
} else {
bql_lock();
bql_unlock();
if (msr_ret < 0) {
x86_emul_raise_exception(&X86_CPU(cpu)->env, EXCP0D_GPF, 0);
+ raises_gpf = true;
}
}
}
if (!is_known_msr && !whpx->ignore_unknown_msr) {
x86_emul_raise_exception(&X86_CPU(cpu)->env, EXCP0D_GPF, 0);
+ raises_gpf = true;
+ }
+
+ /* When a GPF is raised, do not change Rip. */
+ if (raises_gpf) {
+ reg_values[0].Reg64 =
+ vcpu->exit_ctx.VpContext.Rip;
}
hr = whp_dispatch.WHvSetVirtualProcessorRegisters(