irqchip/qcom-pdc: Add PDC_VERSION() macro to describe version register fields

The PDC hardware version register encodes major, minor and step fields
in byte-sized fields at bits [23:16], [15:8] and [7:0] respectively.
The existing PDC_VERSION_3_2 constant was a bare magic number (0x30200)
with no indication of this encoding.

Add GENMASK-based field definitions for each sub-field and a
PDC_VERSION(maj, min, step) constructor macro using FIELD_PREP, making
the encoding self-documenting. Replace the magic constant with
PDC_VERSION(3, 2, 0).

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://patch.msgid.link/20260527095426.2324504-4-mukesh.ojha@oss.qualcomm.com

diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c
index 0b82306f8dd80533150150009647ab40927178df..08eec00a9cfe75b73a45864931dbc8b9267a81ff 100644 (file)
--- a/drivers/irqchip/qcom-pdc.c
+++ b/drivers/irqchip/qcom-pdc.c
@@ -3,6 +3,7 @@
  * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
  */
 
+#include <linux/bitfield.h>
 #include <linux/err.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
@@ -31,12 +32,18 @@
 /* Valid only on HW version >= 3.2 */
 #define IRQ_i_CFG_IRQ_ENABLE   3
 
-#define IRQ_i_CFG_TYPE_MASK    GENMASK(2, 0)
+#define IRQ_i_CFG_TYPE_MASK            GENMASK(2, 0)
 
-#define PDC_VERSION_REG                0x1000
+#define PDC_VERSION_REG                        0x1000
+#define PDC_VERSION_MAJOR              GENMASK(23, 16)
+#define PDC_VERSION_MINOR              GENMASK(15, 8)
+#define PDC_VERSION_STEP               GENMASK(7, 0)
+#define PDC_VERSION(maj, min, step)    (FIELD_PREP(PDC_VERSION_MAJOR, (maj)) | \
+                                        FIELD_PREP(PDC_VERSION_MINOR, (min)) | \
+                                        FIELD_PREP(PDC_VERSION_STEP,  (step)))
 
 /* Notable PDC versions */
-#define PDC_VERSION_3_2                0x30200
+#define PDC_VERSION_3_2                        PDC_VERSION(3, 2, 0)
 
 struct pdc_pin_region {
        u32 pin_base;