]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
aarch64: Add bitreverse expanders [PR50481]
authorDisservin <disservin.social@gmail.com>
Wed, 20 May 2026 18:01:07 +0000 (20:01 +0200)
committerAndrew Pinski <andrew.pinski@oss.qualcomm.com>
Fri, 22 May 2026 20:09:42 +0000 (13:09 -0700)
Add missing AArch64 bitreverse expanders so __builtin_bitreverse*
can lower to existing rbit patterns.

PR target/50481
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/bitreverse.c: New test.

gcc/ChangeLog:
* config/aarch64/aarch64.md (bitreverse<mode>2, bitreverseqi2,
bitreversehi2): New expanders.
* config/aarch64/aarch64-simd.md (bitreverse<mode>2): New expander.

Signed-off-by: Disservin <disservin.social@gmail.com>
gcc/config/aarch64/aarch64-simd.md
gcc/config/aarch64/aarch64.md
gcc/testsuite/gcc.target/aarch64/bitreverse.c [new file with mode: 0644]

index 74a2a06c45b8f50aa10d5a54a81871c67192f199..7496da3a70c1819d01b7fcd99c15b4e3f13d4e92 100644 (file)
   [(set_attr "type" "neon_rev<q>")]
 )
 
+(define_expand "bitreverse<mode>2"
+  [(set (match_operand:VB 0 "register_operand")
+       (bitreverse:VB (match_operand:VB 1 "register_operand")))]
+  "TARGET_SIMD"
+  "")
+
 (define_insn "aarch64_rbit<mode><vczle><vczbe>"
   [(set (match_operand:VB 0 "register_operand" "=w")
        (bitreverse:VB (match_operand:VB 1 "register_operand" "w")))]
index f7e2e4be10e081b689d9a4057ee4124e718918bf..9441e9d1eaed153793c1cd95f322519a90662ed3 100644 (file)
   [(set_attr "type" "rbit")]
 )
 
+(define_expand "bitreverse<mode>2"
+  [(set (match_operand:GPI 0 "register_operand")
+       (bitreverse:GPI (match_operand:GPI 1 "register_operand")))]
+)
+
 (define_expand "ffs<mode>2"
   [(match_operand:GPI 0 "register_operand")
    (match_operand:GPI 1 "register_operand")]
diff --git a/gcc/testsuite/gcc.target/aarch64/bitreverse.c b/gcc/testsuite/gcc.target/aarch64/bitreverse.c
new file mode 100644 (file)
index 0000000..c6a66d8
--- /dev/null
@@ -0,0 +1,50 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+/*
+** br8:
+**     and     w0, w0, 255
+**     rbit    w0, w0
+**     lsr     w0, w0, 24
+**     ret
+*/
+[[gnu::noipa]] unsigned char
+br8 (unsigned char x)
+{
+  return __builtin_bitreverse8 (x);
+}
+
+/*
+** br16:
+**     and     w0, w0, 65535
+**     rbit    w0, w0
+**     lsr     w0, w0, 16
+**     ret
+*/
+[[gnu::noipa]] unsigned short
+br16 (unsigned short x)
+{
+  return __builtin_bitreverse16 (x);
+}
+
+/*
+** br32:
+**     rbit    w0, w0
+**     ret
+*/
+[[gnu::noipa]] unsigned int
+br32 (unsigned int x)
+{
+  return __builtin_bitreverse32 (x);
+}
+
+/*
+** br64:
+**     rbit    x0, x0
+**     ret
+*/
+[[gnu::noipa]] unsigned long long
+br64 (unsigned long long x)
+{
+  return __builtin_bitreverse64 (x);
+}