}
static inline struct pic32_gpio_bank *pctl_to_bank(struct pic32_pinctrl *pctl,
- unsigned pin)
+ unsigned int pin)
{
return &pctl->gpio_banks[pin / PINS_PER_BANK];
}
}
static const char *pic32_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
- unsigned group)
+ unsigned int group)
{
struct pic32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
}
static int pic32_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
- unsigned group,
- const unsigned **pins,
- unsigned *num_pins)
+ unsigned int group,
+ const unsigned int **pins,
+ unsigned int *num_pins)
{
struct pic32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
}
static const char *
-pic32_pinmux_get_function_name(struct pinctrl_dev *pctldev, unsigned func)
+pic32_pinmux_get_function_name(struct pinctrl_dev *pctldev, unsigned int func)
{
struct pic32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
}
static int pic32_pinmux_get_function_groups(struct pinctrl_dev *pctldev,
- unsigned func,
+ unsigned int func,
const char * const **groups,
- unsigned * const num_groups)
+ unsigned int * const num_groups)
{
struct pic32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
}
static int pic32_pinmux_enable(struct pinctrl_dev *pctldev,
- unsigned func, unsigned group)
+ unsigned int func, unsigned int group)
{
struct pic32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
const struct pic32_pin_group *pg = &pctl->groups[group];
static int pic32_gpio_request_enable(struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *range,
- unsigned offset)
+ unsigned int offset)
{
struct pic32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
struct pic32_gpio_bank *bank = gpiochip_get_data(range->gc);
}
static int pic32_gpio_direction_input(struct gpio_chip *chip,
- unsigned offset)
+ unsigned int offset)
{
struct pic32_gpio_bank *bank = gpiochip_get_data(chip);
u32 mask = BIT(offset);
return 0;
}
-static int pic32_gpio_get(struct gpio_chip *chip, unsigned offset)
+static int pic32_gpio_get(struct gpio_chip *chip, unsigned int offset)
{
struct pic32_gpio_bank *bank = gpiochip_get_data(chip);
}
static int pic32_gpio_direction_output(struct gpio_chip *chip,
- unsigned offset, int value)
+ unsigned int offset, int value)
{
struct pic32_gpio_bank *bank = gpiochip_get_data(chip);
u32 mask = BIT(offset);
static int pic32_gpio_set_direction(struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *range,
- unsigned offset, bool input)
+ unsigned int offset, bool input)
{
struct gpio_chip *chip = range->gc;
.gpio_set_direction = pic32_gpio_set_direction,
};
-static int pic32_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin,
+static int pic32_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
unsigned long *config)
{
struct pic32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
struct pic32_gpio_bank *bank = pctl_to_bank(pctl, pin);
- unsigned param = pinconf_to_config_param(*config);
+ unsigned int param = pinconf_to_config_param(*config);
u32 mask = BIT(pin - bank->gpio_chip.base);
u32 arg;
return 0;
}
-static int pic32_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin,
- unsigned long *configs, unsigned num_configs)
+static int pic32_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
+ unsigned long *configs, unsigned int num_configs)
{
struct pic32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
struct pic32_gpio_bank *bank = pctl_to_bank(pctl, pin);
- unsigned param;
+ unsigned int param;
u32 arg;
unsigned int i;
u32 offset = pin - bank->gpio_chip.base;
.owner = THIS_MODULE,
};
-static int pic32_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
+static int pic32_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
{
struct pic32_gpio_bank *bank = gpiochip_get_data(chip);