.#define bfd_mach_loongarch64 2
. bfd_arch_amdgcn, {* AMDGCN *}
.#define bfd_mach_amdgcn_unknown 0x000
-.#define bfd_mach_amdgcn_gfx900 0x02c
-.#define bfd_mach_amdgcn_gfx904 0x02e
-.#define bfd_mach_amdgcn_gfx906 0x02f
-.#define bfd_mach_amdgcn_gfx908 0x030
-.#define bfd_mach_amdgcn_gfx90a 0x03f
-.#define bfd_mach_amdgcn_gfx1010 0x033
-.#define bfd_mach_amdgcn_gfx1011 0x034
-.#define bfd_mach_amdgcn_gfx1012 0x035
-.#define bfd_mach_amdgcn_gfx1030 0x036
-.#define bfd_mach_amdgcn_gfx1031 0x037
-.#define bfd_mach_amdgcn_gfx1032 0x038
-.#define bfd_mach_amdgcn_gfx1100 0x041
-.#define bfd_mach_amdgcn_gfx1101 0x046
-.#define bfd_mach_amdgcn_gfx1102 0x047
+.#define bfd_mach_amdgcn_gfx900 0x02c
+.#define bfd_mach_amdgcn_gfx904 0x02e
+.#define bfd_mach_amdgcn_gfx906 0x02f
+.#define bfd_mach_amdgcn_gfx908 0x030
+.#define bfd_mach_amdgcn_gfx90a 0x03f
+.#define bfd_mach_amdgcn_gfx942 0x04c
+.#define bfd_mach_amdgcn_gfx950 0x04f
+.#define bfd_mach_amdgcn_gfx1010 0x033
+.#define bfd_mach_amdgcn_gfx1011 0x034
+.#define bfd_mach_amdgcn_gfx1012 0x035
+.#define bfd_mach_amdgcn_gfx1030 0x036
+.#define bfd_mach_amdgcn_gfx1031 0x037
+.#define bfd_mach_amdgcn_gfx1032 0x038
+.#define bfd_mach_amdgcn_gfx1100 0x041
+.#define bfd_mach_amdgcn_gfx1101 0x046
+.#define bfd_mach_amdgcn_gfx1102 0x047
+.#define bfd_mach_amdgcn_gfx1150 0x043
+.#define bfd_mach_amdgcn_gfx1151 0x04a
+.#define bfd_mach_amdgcn_gfx1152 0x055
+.#define bfd_mach_amdgcn_gfx1153 0x058
+.#define bfd_mach_amdgcn_gfx1200 0x048
+.#define bfd_mach_amdgcn_gfx1201 0x04e
+.#define bfd_mach_amdgcn_gfx1250 0x049
. bfd_arch_last
. };
*/
#define bfd_mach_loongarch32 1
#define bfd_mach_loongarch64 2
bfd_arch_amdgcn, /* AMDGCN */
-#define bfd_mach_amdgcn_unknown 0x000
-#define bfd_mach_amdgcn_gfx900 0x02c
-#define bfd_mach_amdgcn_gfx904 0x02e
-#define bfd_mach_amdgcn_gfx906 0x02f
-#define bfd_mach_amdgcn_gfx908 0x030
-#define bfd_mach_amdgcn_gfx90a 0x03f
-#define bfd_mach_amdgcn_gfx1010 0x033
-#define bfd_mach_amdgcn_gfx1011 0x034
-#define bfd_mach_amdgcn_gfx1012 0x035
-#define bfd_mach_amdgcn_gfx1030 0x036
-#define bfd_mach_amdgcn_gfx1031 0x037
-#define bfd_mach_amdgcn_gfx1032 0x038
-#define bfd_mach_amdgcn_gfx1100 0x041
-#define bfd_mach_amdgcn_gfx1101 0x046
-#define bfd_mach_amdgcn_gfx1102 0x047
+#define bfd_mach_amdgcn_unknown 0x000
+#define bfd_mach_amdgcn_gfx900 0x02c
+#define bfd_mach_amdgcn_gfx904 0x02e
+#define bfd_mach_amdgcn_gfx906 0x02f
+#define bfd_mach_amdgcn_gfx908 0x030
+#define bfd_mach_amdgcn_gfx90a 0x03f
+#define bfd_mach_amdgcn_gfx942 0x04c
+#define bfd_mach_amdgcn_gfx950 0x04f
+#define bfd_mach_amdgcn_gfx1010 0x033
+#define bfd_mach_amdgcn_gfx1011 0x034
+#define bfd_mach_amdgcn_gfx1012 0x035
+#define bfd_mach_amdgcn_gfx1030 0x036
+#define bfd_mach_amdgcn_gfx1031 0x037
+#define bfd_mach_amdgcn_gfx1032 0x038
+#define bfd_mach_amdgcn_gfx1100 0x041
+#define bfd_mach_amdgcn_gfx1101 0x046
+#define bfd_mach_amdgcn_gfx1102 0x047
+#define bfd_mach_amdgcn_gfx1150 0x043
+#define bfd_mach_amdgcn_gfx1151 0x04a
+#define bfd_mach_amdgcn_gfx1152 0x055
+#define bfd_mach_amdgcn_gfx1153 0x058
+#define bfd_mach_amdgcn_gfx1200 0x048
+#define bfd_mach_amdgcn_gfx1201 0x04e
+#define bfd_mach_amdgcn_gfx1250 0x049
bfd_arch_last
};
N (bfd_mach_amdgcn_gfx906, "amdgcn:gfx906", false, NN (2)),
N (bfd_mach_amdgcn_gfx908, "amdgcn:gfx908", false, NN (3)),
N (bfd_mach_amdgcn_gfx90a, "amdgcn:gfx90a", false, NN (4)),
- N (bfd_mach_amdgcn_gfx1010, "amdgcn:gfx1010", false, NN (5)),
- N (bfd_mach_amdgcn_gfx1011, "amdgcn:gfx1011", false, NN (6)),
- N (bfd_mach_amdgcn_gfx1012, "amdgcn:gfx1012", false, NN (7)),
- N (bfd_mach_amdgcn_gfx1030, "amdgcn:gfx1030", false, NN (8)),
- N (bfd_mach_amdgcn_gfx1031, "amdgcn:gfx1031", false, NN (9)),
- N (bfd_mach_amdgcn_gfx1032, "amdgcn:gfx1032", false, NN (10)),
- N (bfd_mach_amdgcn_gfx1100, "amdgcn:gfx1100", false, NN (11)),
- N (bfd_mach_amdgcn_gfx1101, "amdgcn:gfx1101", false, NN (12)),
- N (bfd_mach_amdgcn_gfx1102, "amdgcn:gfx1102", false, NULL)
+ N (bfd_mach_amdgcn_gfx942, "amdgcn:gfx942", false, NN (5)),
+ N (bfd_mach_amdgcn_gfx950, "amdgcn:gfx950", false, NN (6)),
+ N (bfd_mach_amdgcn_gfx1010, "amdgcn:gfx1010", false, NN (7)),
+ N (bfd_mach_amdgcn_gfx1011, "amdgcn:gfx1011", false, NN (8)),
+ N (bfd_mach_amdgcn_gfx1012, "amdgcn:gfx1012", false, NN (9)),
+ N (bfd_mach_amdgcn_gfx1030, "amdgcn:gfx1030", false, NN (10)),
+ N (bfd_mach_amdgcn_gfx1031, "amdgcn:gfx1031", false, NN (11)),
+ N (bfd_mach_amdgcn_gfx1032, "amdgcn:gfx1032", false, NN (12)),
+ N (bfd_mach_amdgcn_gfx1100, "amdgcn:gfx1100", false, NN (13)),
+ N (bfd_mach_amdgcn_gfx1101, "amdgcn:gfx1101", false, NN (14)),
+ N (bfd_mach_amdgcn_gfx1102, "amdgcn:gfx1102", false, NN (15)),
+ N (bfd_mach_amdgcn_gfx1150, "amdgcn:gfx1150", false, NN (16)),
+ N (bfd_mach_amdgcn_gfx1151, "amdgcn:gfx1151", false, NN (17)),
+ N (bfd_mach_amdgcn_gfx1152, "amdgcn:gfx1152", false, NN (18)),
+ N (bfd_mach_amdgcn_gfx1153, "amdgcn:gfx1153", false, NN (19)),
+ N (bfd_mach_amdgcn_gfx1200, "amdgcn:gfx1200", false, NN (20)),
+ N (bfd_mach_amdgcn_gfx1201, "amdgcn:gfx1201", false, NN (21)),
+ N (bfd_mach_amdgcn_gfx1250, "amdgcn:gfx1250", false, NULL),
};
const bfd_arch_info_type bfd_amdgcn_arch =
AMDGPU_CASE (EF_AMDGPU_MACH_AMDGCN_GFX1100, "gfx1100")
AMDGPU_CASE (EF_AMDGPU_MACH_AMDGCN_GFX1101, "gfx1101")
AMDGPU_CASE (EF_AMDGPU_MACH_AMDGCN_GFX1102, "gfx1102")
+ AMDGPU_CASE (EF_AMDGPU_MACH_AMDGCN_GFX1150, "gfx1150")
+ AMDGPU_CASE (EF_AMDGPU_MACH_AMDGCN_GFX1151, "gfx1151")
+ AMDGPU_CASE (EF_AMDGPU_MACH_AMDGCN_GFX1152, "gfx1152")
+ AMDGPU_CASE (EF_AMDGPU_MACH_AMDGCN_GFX1153, "gfx1153")
+ AMDGPU_CASE (EF_AMDGPU_MACH_AMDGCN_GFX1200, "gfx1200")
+ AMDGPU_CASE (EF_AMDGPU_MACH_AMDGCN_GFX1201, "gfx1201")
+ AMDGPU_CASE (EF_AMDGPU_MACH_AMDGCN_GFX1250, "gfx1250")
AMDGPU_CASE (EF_AMDGPU_MACH_AMDGCN_GFX602, "gfx602")
AMDGPU_CASE (EF_AMDGPU_MACH_AMDGCN_GFX705, "gfx705")
AMDGPU_CASE (EF_AMDGPU_MACH_AMDGCN_GFX805, "gfx805")
AMDGPU_CASE (EF_AMDGPU_MACH_AMDGCN_GFX1034, "gfx1034")
AMDGPU_CASE (EF_AMDGPU_MACH_AMDGCN_GFX90A, "gfx90a")
AMDGPU_CASE (EF_AMDGPU_MACH_AMDGCN_GFX940, "gfx940")
+ AMDGPU_CASE (EF_AMDGPU_MACH_AMDGCN_GFX942, "gfx942")
+ AMDGPU_CASE (EF_AMDGPU_MACH_AMDGCN_GFX950, "gfx950")
AMDGPU_CASE (EF_AMDGPU_MACH_AMDGCN_GFX1013, "gfx1013")
AMDGPU_CASE (EF_AMDGPU_MACH_AMDGCN_GFX1036, "gfx1036")
default:
#define EF_AMDGPU_MACH_AMDGCN_GFX1036 0x045
#define EF_AMDGPU_MACH_AMDGCN_GFX1101 0x046
#define EF_AMDGPU_MACH_AMDGCN_GFX1102 0x047
+#define EF_AMDGPU_MACH_AMDGCN_GFX1150 0x043
+#define EF_AMDGPU_MACH_AMDGCN_GFX1151 0x04a
+#define EF_AMDGPU_MACH_AMDGCN_GFX1152 0x055
+#define EF_AMDGPU_MACH_AMDGCN_GFX1153 0x058
+#define EF_AMDGPU_MACH_AMDGCN_GFX1200 0x048
+#define EF_AMDGPU_MACH_AMDGCN_GFX1250 0x049
+#define EF_AMDGPU_MACH_AMDGCN_GFX942 0x04c
+#define EF_AMDGPU_MACH_AMDGCN_GFX1201 0x04e
+#define EF_AMDGPU_MACH_AMDGCN_GFX950 0x04f
/* Code object v3 machine flags. */