+2026-05-16 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/50481
+ * match.pd (BITREVERSE): New define_operator_list. Use it next to
+ BSWAP for a subset of bswap simplifications.
+
+2026-05-16 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/50481
+ * doc/extend.texi (__builtin_bitreverse32, __builtin_bitreverse64):
+ Tweak wording for consistency with __builtin_bswap*.
+ (__builtin_bitreverse128): Document.
+ * builtins.def (BUILT_IN_BITREVERSE128): New.
+ * builtins.cc (expand_builtin): Handle also BUILT_IN_BITREVERSE128.
+ (is_inexpensive_builtin): Likewise.
+ * fold-const-call.cc (fold_const_call_ss): Handle also
+ CFN_BUILT_IN_BITREVERSE128.
+ * fold-const.cc (tree_call_nonnegative_warnv_p): Likewise.
+ * tree-ssa-ccp.cc (evaluate_stmt): Handle also BUILT_IN_BITREVERSE128.
+ * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p): Handle also
+ CFN_BUILT_IN_BITREVERSE128.
+ (cond_removal_in_builtin_zero_pattern): Likewise.
+
+2026-05-16 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/50481
+ * tree-ssa-ccp.cc (evaluate_stmt): Fix up
+ BUILT_IN_BITREVERSE{8,16,32,64} handling.
+
+2026-05-16 Roger Sayle <roger@nextmovesoftware.com>
+ Hongtao Liu <hongtao.liu@intel.com>
+
+ * config/i386/i386-features.cc (scalar_chain): If the chain
+ starts with a register-to-register move from a hard register,
+ then the hard register's defs don't need to converted.
+ (timode_scalar_chain::compute_convert_gain): Provide costs
+ for hard_reg-to-pseudo and pseudo-to-hard_reg moves.
+ Tweak speed cost of timode_concatdi_p moves.
+ (timode_scalar_chain::convert_insn): Add support for
+ hard_reg-to-pseudo and pseudo-to-hard_reg TImode transfers.
+ (timode_scalar_to_vector_candidate_p): Likewise.
+
+2026-05-16 Shivam Gupta <shivam98.tkg@gmail.com>
+
+ PR tree-optimization/112095
+ * match.pd: Simplify ((~x) & y) ^ (x | y)
+ to x and ((~x) | y) ^ (x & y) to ~x.
+
+2026-05-16 Timo Rothenpieler <timo@rothenpieler.org>
+
+ * config/i386/mingw-pthread.h:
+ rename to generic config/mingw/mingw-pthread.h
+ * config.gcc [aarch64-*-mingw*]:
+ Fix support for posix threading on aarch64 mingw targets.
+ * config/mingw/mingw-pthread.h: New file.
+
2026-05-15 Andrew Pinski <andrew.pinski@oss.qualcomm.com>
* tree-ssa-operands.cc (operands_scanner::parse_ssa_operands):
+2026-05-16 Thomas Koenig <tkoenig@gcc.gnu.org>
+
+ PR fortran/122245
+ * dump-parse-tree.cc (write_formal_arglist): Take the formal
+ arglist from the symbol's interface if it is present.
+
2026-05-14 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/125092
+2026-05-16 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/50481
+ * gcc.dg/builtin-bitreverse-4.c: New test.
+
+2026-05-16 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/50481
+ * gcc.dg/builtin-bitreverse-1.c: Add __builtin_bitreverse128 tests.
+ * gcc.dg/builtin-bitreverse-2.c: Likewise.
+
+2026-05-16 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/50481
+ * gcc.dg/builtin-bitreverse-3.c: New test.
+
+2026-05-16 Roger Sayle <roger@nextmovesoftware.com>
+ Hongtao Liu <hongtao.liu@intel.com>
+
+ * gcc.target/i386/avx-stv-1.c: New test case.
+ * gcc.target/i386/sse2-stv-3.c: Likewise.
+ * gcc.target/i386/sse2-stv-4.c: Likewise.
+ * gcc.target/i386/sse2-stv-5.c: Likewise.
+
+2026-05-16 Pan Li <pan2.li@intel.com>
+
+ * gcc.target/riscv/sat/sat_arith.h: Add form 10.
+ * gcc.target/riscv/sat/sat_u_mul-11-u16.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-11-u32.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-11-u64.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-11-u8.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-run-11-u16.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-run-11-u32.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-run-11-u64.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-run-11-u8.c: New test.
+
+2026-05-16 Pan Li <pan2.li@intel.com>
+
+ * gcc.target/riscv/sat/sat_arith.h: Add form 9.
+ * gcc.target/riscv/sat/sat_u_mul-10-u16.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-10-u32.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-10-u64.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-10-u8.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-run-10-u16.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-run-10-u32.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-run-10-u64.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-run-10-u8.c: New test.
+
+2026-05-16 Pan Li <pan2.li@intel.com>
+
+ * gcc.target/riscv/sat/sat_arith.h: Add form 8.
+ * gcc.target/riscv/sat/sat_u_mul-9-u16-from-u128.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-9-u16-from-u32.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-9-u16-from-u64.rv32.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-9-u16-from-u64.rv64.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-9-u32-from-u128.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-9-u32-from-u64.rv32.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-9-u32-from-u64.rv64.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-9-u64-from-u128.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-9-u8-from-u128.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-9-u8-from-u16.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-9-u8-from-u32.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-9-u8-from-u64.rv32.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-9-u8-from-u64.rv64.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-run-9-u16-from-u128.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-run-9-u16-from-u32.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-run-9-u16-from-u64.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-run-9-u32-from-u128.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-run-9-u32-from-u64.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-run-9-u64-from-u128.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-run-9-u8-from-u128.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-run-9-u8-from-u16.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-run-9-u8-from-u32.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-run-9-u8-from-u64.c: New test.
+
+2026-05-16 Shivam Gupta <shivam98.tkg@gmail.com>
+
+ PR tree-optimization/112095
+ * gcc.dg/tree-ssa/pr112095.c: New test.
+
2026-05-15 Marek Polacek <polacek@redhat.com>
* g++.dg/warn/Wuninitialized-pr107919-1.C: Fix a dg-bogus.
+2026-05-16 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ * caf/shmem/sync.h (lock_t): Rename to caf_shmem_lock_t.
+ * caf/shmem.c: Adapt uses.
+
2026-05-08 Harald Anlauf <anlauf@gmx.de>
PR libfortran/125087
+2026-05-16 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ * env.c (initialize_env): Check GOMP_DEFAULT_STACKSIZE for
+ non-zero.
+
2026-05-13 H.J. Lu <hjl.tools@gmail.com>
* libgomp.texi: the Add missing closing brace.
+2026-05-16 Dragon Archer <dragon-archer@outlook.com>
+
+ PR libstdc++/125228
+ * src/c++11/debug.cc: Replace assert with __glibcxx_assert,
+ and remove the include of <cassert>.
+ * src/c++17/floating_to_chars.cc: Likewise, but redefine
+ assert as __glibcxx_assert.
+
+2026-05-16 Jonathan Wakely <jwakely@redhat.com>
+
+ PR libstdc++/125312
+ * acinclude.m4 (GLIBCXX_ENABLE_ATOMIC_BUILTINS): Copy header
+ into cwd instead of including it via an absolute path.
+ * configure: Regenerate.
+
+2026-05-16 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ PR libstdc++/107815
+ * testsuite/20_util/to_chars/float128_c++23.cc (test): Remove
+ Solaris workaround.
+
2026-05-15 Tomasz Kamiński <tkaminsk@redhat.com>
* include/std/optional [__cpp_lib_optional_range_support]:
projects / thirdparty / gcc.git / commitdiff
