pinctrl: qcom: ipq806x: mark pci reset as a GPIO pin function

The qcom pinctrl core supports marking functions that represent GPIO mode
via PINCTRL_GPIO_PINFUNCTION(), so that strict pinmuxing does not reject
GPIO requests for pins that are muxed to the GPIO function.

Mark PCIe reset as GPIO pin function

This allows ipq806x to keep the PCIe-reset related configuration in DTS
without tripping over strict pinmux ownership checks.

Fixes: cc85cb96e2e4 ("pinctrl: qcom: make the pinmuxing strict")
Signed-off-by: Hans Ulli Kroll <linux@ulli-kroll.de>
Acked-by: Linus Walleij <linusw@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://patch.msgid.link/20260719134548.8830-3-linux@ulli-kroll.de
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>

diff --git a/drivers/pinctrl/qcom/pinctrl-ipq8064.c b/drivers/pinctrl/qcom/pinctrl-ipq8064.c
index e1c3c213559f9faa54e2e4f8e913becdf290c7be..0a50486337d3194b26b9edb10e7c7bc3e839e48b 100644 (file)
--- a/drivers/pinctrl/qcom/pinctrl-ipq8064.c
+++ b/drivers/pinctrl/qcom/pinctrl-ipq8064.c
@@ -507,19 +507,19 @@ static const struct pinfunction ipq8064_functions[] = {
        IPQ_PIN_FUNCTION(usb2_hsic),
        IPQ_PIN_FUNCTION(rgmii2),
        IPQ_PIN_FUNCTION(sata),
-       IPQ_PIN_FUNCTION(pcie1_rst),
+       IPQ_GPIO_PIN_FUNCTION(pcie1_rst),
        IPQ_PIN_FUNCTION(pcie1_prsnt),
        IPQ_PIN_FUNCTION(pcie1_pwren_n),
        IPQ_PIN_FUNCTION(pcie1_pwren),
        IPQ_PIN_FUNCTION(pcie1_pwrflt),
        IPQ_PIN_FUNCTION(pcie1_clk_req),
-       IPQ_PIN_FUNCTION(pcie2_rst),
+       IPQ_GPIO_PIN_FUNCTION(pcie2_rst),
        IPQ_PIN_FUNCTION(pcie2_prsnt),
        IPQ_PIN_FUNCTION(pcie2_pwren_n),
        IPQ_PIN_FUNCTION(pcie2_pwren),
        IPQ_PIN_FUNCTION(pcie2_pwrflt),
        IPQ_PIN_FUNCTION(pcie2_clk_req),
-       IPQ_PIN_FUNCTION(pcie3_rst),
+       IPQ_GPIO_PIN_FUNCTION(pcie3_rst),
        IPQ_PIN_FUNCTION(pcie3_prsnt),
        IPQ_PIN_FUNCTION(pcie3_pwren_n),
        IPQ_PIN_FUNCTION(pcie3_pwren),