]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
x86/cpu/intel: Drop stray FAM6 check with new Intel CPU model defines
authorAndrew Cooper <andrew.cooper3@citrix.com>
Wed, 29 May 2024 18:36:05 +0000 (19:36 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 2 Jan 2025 09:32:11 +0000 (10:32 +0100)
commit 34b3fc558b537bdf99644dcde539e151716f6331 upstream.

The outer if () should have been dropped when switching to c->x86_vfm.

Fixes: 6568fc18c2f6 ("x86/cpu/intel: Switch to new Intel CPU model defines")
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Acked-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/20240529183605.17520-1-andrew.cooper3@citrix.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/x86/kernel/cpu/intel.c

index 97259485c1111f0e3fec3007f255f597207086b7..4752a9f17ef6154a8a9557e36182d159a60c24f3 100644 (file)
@@ -341,17 +341,13 @@ static void early_init_intel(struct cpuinfo_x86 *c)
        }
 
        /* Penwell and Cloverview have the TSC which doesn't sleep on S3 */
-       if (c->x86 == 6) {
-               switch (c->x86_vfm) {
-               case INTEL_ATOM_SALTWELL_MID:
-               case INTEL_ATOM_SALTWELL_TABLET:
-               case INTEL_ATOM_SILVERMONT_MID:
-               case INTEL_ATOM_AIRMONT_NP:
-                       set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC_S3);
-                       break;
-               default:
-                       break;
-               }
+       switch (c->x86_vfm) {
+       case INTEL_ATOM_SALTWELL_MID:
+       case INTEL_ATOM_SALTWELL_TABLET:
+       case INTEL_ATOM_SILVERMONT_MID:
+       case INTEL_ATOM_AIRMONT_NP:
+               set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC_S3);
+               break;
        }
 
        /*