mediatek: drop PCIe reset assert delay patch

This patch has already been merged into linux 5.17 kernel.

Link: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-5.17.y&id=65ace9a85fa7f88aec4d9d842061108161fa47bc
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22175
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

diff --git a/target/linux/mediatek/patches-6.12/601-PCI-mediatek-Assert-PERST-for-100ms-for-power-and-cl.patch b/target/linux/mediatek/patches-6.12/601-PCI-mediatek-Assert-PERST-for-100ms-for-power-and-cl.patch
deleted file mode 100644 (file)
index 1b18679..0000000
--- a/target/linux/mediatek/patches-6.12/601-PCI-mediatek-Assert-PERST-for-100ms-for-power-and-cl.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From: qizhong cheng <qizhong.cheng@mediatek.com>
-Date: Mon, 27 Dec 2021 21:31:10 +0800
-Subject: [PATCH] PCI: mediatek: Assert PERST# for 100ms for power and clock to
- stabilize
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Described in PCIe CEM specification sections 2.2 (PERST# Signal) and
-2.2.1 (Initial Power-Up (G3 to S0)). The deassertion of PERST# should
-be delayed 100ms (TPVPERL) for the power and clock to become stable.
-
-Link: https://lore.kernel.org/r/20211227133110.14500-1-qizhong.cheng@mediatek.com
-Signed-off-by: qizhong cheng <qizhong.cheng@mediatek.com>
-Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
-Acked-by: Pali Rohár <pali@kernel.org>
----
-
---- a/drivers/pci/controller/pcie-mediatek.c
-+++ b/drivers/pci/controller/pcie-mediatek.c
-@@ -700,6 +700,13 @@ static int mtk_pcie_startup_port_v2(stru
-        */
-       msleep(100);
- 
-+      /*
-+       * Described in PCIe CEM specification sections 2.2 (PERST# Signal) and
-+       * 2.2.1 (Initial Power-Up (G3 to S0)). The deassertion of PERST# should
-+       * be delayed 100ms (TPVPERL) for the power and clock to become stable.
-+       */
-+      msleep(100);
-+
-       /* De-assert PHY, PE, PIPE, MAC and configuration reset */
-       val = readl(port->base + PCIE_RST_CTRL);
-       val |= PCIE_PHY_RSTB | PCIE_PERSTB | PCIE_PIPE_SRSTB |

diff --git a/target/linux/mediatek/patches-6.12/710-pci-pcie-mediatek-add-support-for-coherent-DMA.patch b/target/linux/mediatek/patches-6.12/710-pci-pcie-mediatek-add-support-for-coherent-DMA.patch
index d85e505d45ef3a5476eb74bb588f26bb681008a9..5b8707a89a5c595abfe002125f3feccf3fc3571c 100644 (file)
--- a/target/linux/mediatek/patches-6.12/710-pci-pcie-mediatek-add-support-for-coherent-DMA.patch
+++ b/target/linux/mediatek/patches-6.12/710-pci-pcie-mediatek-add-support-for-coherent-DMA.patch
@@ -61,7 +61,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  struct mtk_pcie_port;
  
  /**
-@@ -1052,6 +1058,27 @@ static int mtk_pcie_setup(struct mtk_pci
+@@ -1045,6 +1051,27 @@ static int mtk_pcie_setup(struct mtk_pci
        struct mtk_pcie_port *port, *tmp;
        int err, slot;