{
struct rtl838x_switch_priv *priv;
struct device *dev = &pdev->dev;
+ const struct rtldsa_config *r;
u64 bpdu_mask;
int err = 0;
/* Initialize access to RTL switch tables */
rtl_table_init();
- priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ r = device_get_match_data(&pdev->dev);
+ priv = devm_kzalloc(dev, struct_size(priv, msts, r->n_mst - 1), GFP_KERNEL);
if (!priv)
return -ENOMEM;
- priv->r = device_get_match_data(&pdev->dev);
+ priv->r = r;
priv->ds = devm_kzalloc(dev, sizeof(*priv->ds), GFP_KERNEL);
if (!priv->ds)
return err;
}
- priv->msts = devm_kcalloc(priv->dev,
- priv->r->n_mst - 1, sizeof(struct rtldsa_mst),
- GFP_KERNEL);
- if (!priv->msts)
- return -ENOMEM;
-
priv->wq = create_singlethread_workqueue("rtl83xx");
if (!priv->wq) {
dev_err(dev, "Error creating workqueue: %d\n", err);
u16 intf_mtus[MAX_INTF_MTUS];
int intf_mtu_count[MAX_INTF_MTUS];
- /**
- * @msts: MSTI to HW MST slot allocations. index 0 is for HW slot 1 because CIST is
- * not stored in @msts
- */
- struct rtldsa_mst *msts;
struct delayed_work counters_work;
/**
* periodically.
*/
struct mutex counters_lock;
+
+ /**
+ * @msts: MSTI to HW MST slot allocations. index 0 is for HW slot 1 because CIST is
+ * not stored in @msts
+ */
+ struct rtldsa_mst msts[];
};
struct fdb_update_work {