leq_manual = !!rtpcs_sds_read_bits(sds, 0x2e, 0x18, 15, 15);
leq_bin = rtpcs_930x_sds_rxcal_gray_to_binary(leq_gray);
- pr_info("LEQ gray: %u, LEQ bin: %u", leq_gray, leq_bin);
- pr_info("LEQ manual: %u", leq_manual);
-
+ pr_info("LEQ gray: %u, LEQ bin: %u, LEQ manual: %u\n", leq_gray, leq_bin, leq_manual);
return leq_bin;
}
int tap0_init_val = 0x1f; /* Initial Decision Fed Equalizer 0 tap */
int vth_min = 0x1;
- pr_info("start_1.1.1 initial value for sds %d\n", sds->id);
- rtpcs_sds_write(sds, 6, 0, 0);
+ /* 1.1.1 --- */
+ rtpcs_sds_write(sds, 6, 0, 0); /* initial value */
/* FGCAL */
rtpcs_sds_write_bits(sds, 0x2e, 0x01, 14, 14, 0x00);
rtpcs_sds_write_bits(sds, 0x2e, 0x13, 2, 0, 0x07);
rtpcs_sds_write_bits(sds, 0x2f, 0x0b, 5, 3, vth_min);
- pr_info("end_1.1.1 --\n");
-
- pr_info("start_1.1.2 Load DFE init. value\n");
+ /* --- 1.1.1 */
+ /* 1.1.2 Load DFE initial value --- */
rtpcs_sds_write_bits(sds, 0x2e, 0x0f, 13, 7, 0x7f);
- pr_info("end_1.1.2\n");
-
- pr_info("start_1.1.3 disable LEQ training,enable DFE clock\n");
+ /* --- 1.1.2 */
+ /* 1.1.3 disable LEQ training, enable DFE clock --- */
rtpcs_sds_write_bits(sds, 0x2e, 0x17, 7, 7, 0x00);
rtpcs_sds_write_bits(sds, 0x2e, 0x17, 6, 2, 0x00);
rtpcs_sds_write_bits(sds, 0x2e, 0x0c, 8, 8, 0x00);
rtpcs_sds_write_bits(sds, 0x2e, 0x12, 14, 14, 0x00);
rtpcs_sds_write_bits(sds, 0x2f, 0x02, 15, 15, 0x00);
- pr_info("end_1.1.3 --\n");
-
- pr_info("start_1.1.4 offset cali setting\n");
+ /* --- 1.1.3 */
+ /* 1.1.4 offset cali setting --- */
rtpcs_sds_write_bits(sds, 0x2e, 0x0f, 15, 14, 0x03);
+ /* --- 1.1.4 */
- pr_info("end_1.1.4\n");
-
- pr_info("start_1.1.5 LEQ and DFE setting\n");
+ /* 1.1.5 LEQ and DFE setting --- */
/* assume this is equivalent with (PHY_TYPE == SERDES && MEDIA == FIBER_10G) for now */
if (hw_mode == RTPCS_SDS_MODE_10GBASER) {
rtpcs_sds_write_bits(sds, 0x2f, 0x0b, 15, 9, 0x3c);
rtpcs_sds_write_bits(sds, 0x2e, 0x0b, 1, 0, 0x03);
- pr_info("end_1.1.5\n");
+ /* --- 1.1.5 */
}
static void rtpcs_930x_sds_do_rx_calibration_2_1(struct rtpcs_serdes *sds)
{
- pr_info("start_1.2.1 ForegroundOffsetCal_Manual\n");
+ /* 1.2.1 ForegroundOffsetCal_Manual --- */
/* Gray config endis to 1 */
rtpcs_sds_write_bits(sds, 0x2f, 0x02, 2, 2, 0x01);
/* ForegroundOffsetCal_Manual(auto mode) */
rtpcs_sds_write_bits(sds, 0x2e, 0x01, 14, 14, 0x00);
- pr_info("end_1.2.1");
+ /* --- 1.2.1 */
}
static void rtpcs_930x_sds_do_rx_calibration_2_2(struct rtpcs_serdes *sds)
u32 fgcal_binary, fgcal_gray;
u32 offset_range;
- pr_info("start_1.2.3 Foreground Calibration\n");
+ /* 1.2.3 Foreground Calibration --- */
for (int run = 0; run < 10; run++) {
/* REG_DBGO_SEL */
rtpcs_sds_write_bits(sds, 0x2e, 0x15, 15, 14, offset_range);
rtpcs_930x_sds_do_rx_calibration_2_2(sds);
}
- pr_info("%s: end_1.2.3\n", __func__);
+ /* --- 1.2.3 */
}
static void rtpcs_930x_sds_do_rx_calibration_2(struct rtpcs_serdes *sds)
static void rtpcs_930x_sds_rxcal_3_1(struct rtpcs_serdes *sds,
enum rtpcs_sds_mode hw_mode)
{
- pr_info("start_1.3.1");
-
- /* ##1.3.1 */
+ /* 1.3.1 --- */
if (hw_mode != RTPCS_SDS_MODE_10GBASER &&
hw_mode != RTPCS_SDS_MODE_1000BASEX &&
hw_mode != RTPCS_SDS_MODE_SGMII)
rtpcs_sds_write_bits(sds, 0x2e, 0x17, 7, 7, 0x0);
rtpcs_930x_sds_rxcal_leq_manual(sds, false, 0);
- pr_info("end_1.3.1");
+ /* --- 1.3.1 */
}
static void rtpcs_930x_sds_rxcal_3_2(struct rtpcs_serdes *sds,
if (hw_mode != RTPCS_SDS_MODE_10GBASER)
pr_warn("%s: LEQ only valid for 10GR!\n", __func__);
- pr_info("start_1.3.2");
+ /* 1.3.2 --- */
for (i = 0; i < 10; i++) {
sum10 += rtpcs_930x_sds_rxcal_leq_read(sds);
}
}
- pr_info("Sds:%u LEQ = %u", sds->id, rtpcs_930x_sds_rxcal_leq_read(sds));
+ pr_info("SDS %u LEQ = %u", sds->id, rtpcs_930x_sds_rxcal_leq_read(sds));
- pr_info("end_1.3.2");
+ /* --- 1.3.2 */
}
__always_unused
u32 vth_list[2] = {0, 0};
u32 tap0_list[4] = {0, 0, 0, 0};
- pr_info("start_1.4.1");
-
- /* ##1.4.1 */
+ /* 1.4.1 --- */
rtpcs_930x_sds_rxcal_vth_manual(sds, false, vth_list);
rtpcs_930x_sds_rxcal_tap_manual(sds, 0, false, tap0_list);
mdelay(200);
- pr_info("end_1.4.1");
+ /* --- 1.4.2 */
}
static void rtpcs_930x_sds_do_rx_calibration_4_2(struct rtpcs_serdes *sds)
u32 vth_list[2];
u32 tap_list[4];
- pr_info("start_1.4.2");
+ /* 1.4.2 --- */
rtpcs_930x_sds_rxcal_vth_get(sds, vth_list);
rtpcs_930x_sds_rxcal_vth_manual(sds, true, vth_list);
rtpcs_930x_sds_rxcal_tap_get(sds, 0, tap_list);
rtpcs_930x_sds_rxcal_tap_manual(sds, 0, true, tap_list);
- pr_info("end_1.4.2");
+ /* --- 1.4.2 */
}
static void rtpcs_930x_sds_do_rx_calibration_4(struct rtpcs_serdes *sds)
u32 tap3_list[4] = {0};
u32 tap4_list[4] = {0};
- pr_info("start_1.5.2");
+ /* 1.5.2 --- */
rtpcs_930x_sds_rxcal_tap_manual(sds, 1, false, tap1_list);
rtpcs_930x_sds_rxcal_tap_manual(sds, 2, false, tap2_list);
mdelay(30);
- pr_info("end_1.5.2");
+ /* --- 1.5.2 */
}
static void rtpcs_930x_sds_do_rx_calibration_5(struct rtpcs_serdes *sds,
/* Do this only for 10GR mode */
if (hw_mode == RTPCS_SDS_MODE_10GBASER) {
- pr_info("%s: SDS enabled\n", __func__);
latch_sts = rtpcs_sds_read_bits(sds, 0x4, 1, 2, 2);
mdelay(1);
latch_sts = rtpcs_sds_read_bits(sds, 0x4, 1, 2, 2);