From: Greg Kroah-Hartman Date: Wed, 29 Jul 2026 16:23:52 +0000 (+0200) Subject: 6.6-stable patches X-Git-Tag: v5.10.262~19 X-Git-Url: http://git.ipfire.org/gitweb/?a=commitdiff_plain;h=0e04fce9a310a24a839bc98e205095725b61cf18;p=thirdparty%2Fkernel%2Fstable-queue.git 6.6-stable patches added patches: drm-amd-pm-make-pp_features-read-only-when-scpm-is-enabled.patch drm-amdgpu-fix-aperture-mapping-leak.patch drm-amdgpu-fix-division-by-zero-with-invalid-uvd-dimensions.patch drm-amdgpu-gfx10-replace-bug_on-with-warn_on.patch drm-amdgpu-gfx11-replace-bug_on-with-warn_on.patch drm-amdgpu-gfx8-drop-unecessary-bug_on.patch drm-amdgpu-gfx9-replace-bug_on-with-warn_on.patch drm-amdgpu-gfx9.4.3-replace-bug_on-with-warn_on.patch drm-amdgpu-invoke-pm_genpd_remove-before-freeing-genpd.patch drm-amdgpu-sdma4.4.2-replace-bug_on-with-warn_on.patch drm-amdgpu-vce-fix-integer-overflow-in-image-size.patch drm-amdgpu-vcn4-avoid-rereading-ib-param-length.patch drm-dp_mst-handle-torn-down-topology-gracefully-in-drm_dp_mst_topology_queue_probe.patch --- diff --git a/queue-6.6/drm-amd-pm-make-pp_features-read-only-when-scpm-is-enabled.patch b/queue-6.6/drm-amd-pm-make-pp_features-read-only-when-scpm-is-enabled.patch new file mode 100644 index 0000000000..4755440b9c --- /dev/null +++ b/queue-6.6/drm-amd-pm-make-pp_features-read-only-when-scpm-is-enabled.patch @@ -0,0 +1,38 @@ +From 53c78ab388bfc1a4d72e756815d0db0a842c812e Mon Sep 17 00:00:00 2001 +From: Yang Wang +Date: Fri, 12 Jun 2026 10:55:09 +0800 +Subject: drm/amd/pm: make pp_features read-only when scpm is enabled + +From: Yang Wang + +commit 53c78ab388bfc1a4d72e756815d0db0a842c812e upstream. + +SCPM owns power feature control when enabled. + +Make pp_features read-only during sysfs setup by clearing its write bits +and store callback. + +Signed-off-by: Yang Wang +Reviewed-by: Asad Kamal +Signed-off-by: Alex Deucher +(cherry picked from commit 6a5786e191fdce36c5db170e5209cf609e8f0087) +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/pm/amdgpu_pm.c | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c ++++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c +@@ -2055,6 +2055,11 @@ static int default_attr_update(struct am + gc_ver != IP_VERSION(9, 4, 3)) || + gc_ver < IP_VERSION(9, 0, 0)) + *states = ATTR_STATE_UNSUPPORTED; ++ ++ if (adev->scpm_enabled) { ++ dev_attr->attr.mode &= ~S_IWUGO; ++ dev_attr->store = NULL; ++ } + } else if (DEVICE_ATTR_IS(gpu_metrics)) { + if (gc_ver < IP_VERSION(9, 1, 0)) + *states = ATTR_STATE_UNSUPPORTED; diff --git a/queue-6.6/drm-amdgpu-fix-aperture-mapping-leak.patch b/queue-6.6/drm-amdgpu-fix-aperture-mapping-leak.patch new file mode 100644 index 0000000000..80378fafb0 --- /dev/null +++ b/queue-6.6/drm-amdgpu-fix-aperture-mapping-leak.patch @@ -0,0 +1,125 @@ +From ea772a440d56b285f4d491affac50ecd41f6b402 Mon Sep 17 00:00:00 2001 +From: Asad Kamal +Date: Sun, 14 Jun 2026 12:50:28 +0800 +Subject: drm/amdgpu: fix aperture mapping leak +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Asad Kamal + +commit ea772a440d56b285f4d491affac50ecd41f6b402 upstream. + +amdgpu_pci_remove() calls drm_dev_unplug() before invoking the driver +fini routines. This causes drm_dev_enter() in amdgpu_ttm_fini() to +always return false, so iounmap(aper_base_kaddr) never runs on normal +driver unload, leaving an orphaned entry in the x86 PAT interval tree. + +On connected_to_cpu hardware, the aperture is mapped write-back (WB) via +ioremap_cache(). On reload, IP discovery calls memremap(..., MEMREMAP_WC) +over the same range. The WC vs WB conflict causes: + + ioremap error for 0x..., requested 0x1, got 0x0 + amdgpu: discovery failed: -2 + +Fix by switching to devres-managed mappings so cleanup is guaranteed +regardless of drm_dev_enter() state: + +- connected_to_cpu path: devm_memremap(MEMREMAP_WB). For + IORESOURCE_SYSTEM_RAM ranges this takes the try_ram_remap() shortcut, + returning __va(offset) from the existing kernel direct map. No new + ioremap VA or PAT entry is created, so there is nothing to orphan. + +- dGPU path: devm_ioremap_wc() registers iounmap() as a devres action, + guaranteeing cleanup at device_del() time. + +Also remove iounmap(aper_base_kaddr) from amdgpu_device_unmap_mmio() +since the mapping is now devres-owned. + +v2: Remove redundant x86_64 guard (Lijo) + +Fixes: 9d0af8b4def0 ("drm/amdgpu: pre-map device buffer as cached for A+A config") +Signed-off-by: Asad Kamal +Reviewed-by: Christian König +Reviewed-by: Lijo Lazar +Signed-off-by: Alex Deucher +(cherry picked from commit d871e99879cb5fd1fa798b006b4888887e63a17a) +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 - + drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 36 ++++++++++++----------------- + 2 files changed, 16 insertions(+), 22 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +@@ -3977,8 +3977,6 @@ static void amdgpu_device_unmap_mmio(str + + iounmap(adev->rmmio); + adev->rmmio = NULL; +- if (adev->mman.aper_base_kaddr) +- iounmap(adev->mman.aper_base_kaddr); + adev->mman.aper_base_kaddr = NULL; + + /* Memory manager related */ +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +@@ -1887,18 +1887,23 @@ int amdgpu_ttm_init(struct amdgpu_device + /* Change the size here instead of the init above so only lpfn is affected */ + amdgpu_ttm_set_buffer_funcs_status(adev, false); + #ifdef CONFIG_64BIT +-#ifdef CONFIG_X86 +- if (adev->gmc.xgmi.connected_to_cpu) +- adev->mman.aper_base_kaddr = ioremap_cache(adev->gmc.aper_base, +- adev->gmc.visible_vram_size); +- +- else if (adev->gmc.is_app_apu) ++ if (adev->gmc.xgmi.connected_to_cpu) { ++ void *kaddr = devm_memremap(adev->dev, adev->gmc.aper_base, ++ adev->gmc.visible_vram_size, ++ MEMREMAP_WB); ++ if (IS_ERR(kaddr)) ++ return PTR_ERR(kaddr); ++ adev->mman.aper_base_kaddr = (__force void __iomem *)kaddr; ++ } else if (adev->gmc.is_app_apu) { + DRM_DEBUG_DRIVER( + "No need to ioremap when real vram size is 0\n"); +- else +-#endif +- adev->mman.aper_base_kaddr = ioremap_wc(adev->gmc.aper_base, +- adev->gmc.visible_vram_size); ++ } else { ++ adev->mman.aper_base_kaddr = devm_ioremap_wc(adev->dev, ++ adev->gmc.aper_base, ++ adev->gmc.visible_vram_size); ++ if (!adev->mman.aper_base_kaddr) ++ return -ENOMEM; ++ } + #endif + + /* +@@ -2033,8 +2038,6 @@ int amdgpu_ttm_init(struct amdgpu_device + */ + void amdgpu_ttm_fini(struct amdgpu_device *adev) + { +- int idx; +- + if (!adev->mman.initialized) + return; + +@@ -2057,14 +2060,7 @@ void amdgpu_ttm_fini(struct amdgpu_devic + amdgpu_ttm_fw_reserve_vram_fini(adev); + amdgpu_ttm_drv_reserve_vram_fini(adev); + +- if (drm_dev_enter(adev_to_drm(adev), &idx)) { +- +- if (adev->mman.aper_base_kaddr) +- iounmap(adev->mman.aper_base_kaddr); +- adev->mman.aper_base_kaddr = NULL; +- +- drm_dev_exit(idx); +- } ++ adev->mman.aper_base_kaddr = NULL; + + amdgpu_vram_mgr_fini(adev); + amdgpu_gtt_mgr_fini(adev); diff --git a/queue-6.6/drm-amdgpu-fix-division-by-zero-with-invalid-uvd-dimensions.patch b/queue-6.6/drm-amdgpu-fix-division-by-zero-with-invalid-uvd-dimensions.patch new file mode 100644 index 0000000000..d5bce12e99 --- /dev/null +++ b/queue-6.6/drm-amdgpu-fix-division-by-zero-with-invalid-uvd-dimensions.patch @@ -0,0 +1,48 @@ +From 0c01c811be47e6b146552dd59bfedbea8f09b8f4 Mon Sep 17 00:00:00 2001 +From: Boyuan Zhang +Date: Tue, 12 May 2026 10:29:36 -0400 +Subject: drm/amdgpu: fix division by zero with invalid uvd dimensions + +From: Boyuan Zhang + +commit 0c01c811be47e6b146552dd59bfedbea8f09b8f4 upstream. + +When width or height is less than 16, width_in_mb or height_in_mb +becomes 0, leading to fs_in_mb being 0. This causes a division by +zero when calculating num_dpb_buffer in H264 and H264 Perf decode +paths. + +Add validation to reject frames with width < 16 or height < 16 +before performing any calculations that depend on these values. + +V2: Format change - move up all vaiable definitions. +V3: Use warn_once to avoid spam. + +Signed-off-by: Boyuan Zhang +Reviewed-by: Leo Liu +Reviewed-by: Alex Deucher +Signed-off-by: Alex Deucher +(cherry picked from commit 3e41d26c70b0a459d041cc19482a226c4b7423cb) +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c +@@ -647,6 +647,14 @@ static int amdgpu_uvd_cs_msg_decode(stru + unsigned int image_size, tmp, min_dpb_size, num_dpb_buffer; + unsigned int min_ctx_size = ~0; + ++ /* Reject invalid dimensions to prevent division by zero */ ++ if (width < 16 || height < 16) { ++ dev_WARN_ONCE(adev->dev, 1, ++ "Invalid UVD decoding dimensions (%dx%d)!\n", ++ width, height); ++ return -EINVAL; ++ } ++ + image_size = width * height; + image_size += image_size / 2; + image_size = ALIGN(image_size, 1024); diff --git a/queue-6.6/drm-amdgpu-gfx10-replace-bug_on-with-warn_on.patch b/queue-6.6/drm-amdgpu-gfx10-replace-bug_on-with-warn_on.patch new file mode 100644 index 0000000000..f198384fc1 --- /dev/null +++ b/queue-6.6/drm-amdgpu-gfx10-replace-bug_on-with-warn_on.patch @@ -0,0 +1,71 @@ +From d06c4173a7c38c7a39e98859f839ce714c7af2c9 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Mon, 15 Jun 2026 18:19:52 -0400 +Subject: drm/amdgpu/gfx10: replace BUG_ON() with WARN_ON() + +From: Alex Deucher + +commit d06c4173a7c38c7a39e98859f839ce714c7af2c9 upstream. + +There's no need to crash the kernel for these cases. + +Reviewed-by: Vitaly Prosyak +Signed-off-by: Alex Deucher +(cherry picked from commit ac6f00beb658239bced4aaed9efbb04a35348d48) +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 13 +++++-------- + 1 file changed, 5 insertions(+), 8 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +@@ -3755,7 +3755,7 @@ static void gfx_v10_0_wait_reg_mem(struc + WAIT_REG_MEM_ENGINE(eng_sel))); + + if (mem_space) +- BUG_ON(addr0 & 0x3); /* Dword align */ ++ WARN_ON(addr0 & 0x3); /* Dword align */ + amdgpu_ring_write(ring, addr0); + amdgpu_ring_write(ring, addr1); + amdgpu_ring_write(ring, ref); +@@ -8311,7 +8311,7 @@ static void gfx_v10_0_ring_emit_ib_gfx(s + control |= 0x400000; + + amdgpu_ring_write(ring, header); +- BUG_ON(ib->gpu_addr & 0x3); /* Dword align */ ++ WARN_ON(ib->gpu_addr & 0x3); /* Dword align */ + amdgpu_ring_write(ring, + #ifdef __BIG_ENDIAN + (2 << 0) | +@@ -8350,7 +8350,7 @@ static void gfx_v10_0_ring_emit_ib_compu + } + + amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2)); +- BUG_ON(ib->gpu_addr & 0x3); /* Dword align */ ++ WARN_ON(ib->gpu_addr & 0x3); /* Dword align */ + amdgpu_ring_write(ring, + #ifdef __BIG_ENDIAN + (2 << 0) | +@@ -8383,9 +8383,9 @@ static void gfx_v10_0_ring_emit_fence(st + * aligned if only send 32bit data low (discard data high) + */ + if (write64bit) +- BUG_ON(addr & 0x7); ++ WARN_ON(addr & 0x7); + else +- BUG_ON(addr & 0x3); ++ WARN_ON(addr & 0x3); + amdgpu_ring_write(ring, lower_32_bits(addr)); + amdgpu_ring_write(ring, upper_32_bits(addr)); + amdgpu_ring_write(ring, lower_32_bits(seq)); +@@ -8437,9 +8437,6 @@ static void gfx_v10_0_ring_emit_fence_ki + { + struct amdgpu_device *adev = ring->adev; + +- /* we only allocate 32bit for each seq wb address */ +- BUG_ON(flags & AMDGPU_FENCE_FLAG_64BIT); +- + /* write fence seq to the "addr" */ + amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); + amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) | diff --git a/queue-6.6/drm-amdgpu-gfx11-replace-bug_on-with-warn_on.patch b/queue-6.6/drm-amdgpu-gfx11-replace-bug_on-with-warn_on.patch new file mode 100644 index 0000000000..a939a256dd --- /dev/null +++ b/queue-6.6/drm-amdgpu-gfx11-replace-bug_on-with-warn_on.patch @@ -0,0 +1,71 @@ +From 0eebcab1ea2a77f086a04108f386f82ee3496022 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Mon, 15 Jun 2026 18:20:55 -0400 +Subject: drm/amdgpu/gfx11: replace BUG_ON() with WARN_ON() + +From: Alex Deucher + +commit 0eebcab1ea2a77f086a04108f386f82ee3496022 upstream. + +There's no need to crash the kernel for these cases. + +Reviewed-by: Vitaly Prosyak +Signed-off-by: Alex Deucher +(cherry picked from commit daa62107452d2451787c4248ca38fa2d1a0cbefd) +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 13 +++++-------- + 1 file changed, 5 insertions(+), 8 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c +@@ -310,7 +310,7 @@ static void gfx_v11_0_wait_reg_mem(struc + WAIT_REG_MEM_ENGINE(eng_sel))); + + if (mem_space) +- BUG_ON(addr0 & 0x3); /* Dword align */ ++ WARN_ON(addr0 & 0x3); /* Dword align */ + amdgpu_ring_write(ring, addr0); + amdgpu_ring_write(ring, addr1); + amdgpu_ring_write(ring, ref); +@@ -5306,7 +5306,7 @@ static void gfx_v11_0_ring_emit_ib_gfx(s + control |= 0x400000; + + amdgpu_ring_write(ring, header); +- BUG_ON(ib->gpu_addr & 0x3); /* Dword align */ ++ WARN_ON(ib->gpu_addr & 0x3); /* Dword align */ + amdgpu_ring_write(ring, + #ifdef __BIG_ENDIAN + (2 << 0) | +@@ -5345,7 +5345,7 @@ static void gfx_v11_0_ring_emit_ib_compu + } + + amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2)); +- BUG_ON(ib->gpu_addr & 0x3); /* Dword align */ ++ WARN_ON(ib->gpu_addr & 0x3); /* Dword align */ + amdgpu_ring_write(ring, + #ifdef __BIG_ENDIAN + (2 << 0) | +@@ -5382,9 +5382,9 @@ static void gfx_v11_0_ring_emit_fence(st + * aligned if only send 32bit data low (discard data high) + */ + if (write64bit) +- BUG_ON(addr & 0x7); ++ WARN_ON(addr & 0x7); + else +- BUG_ON(addr & 0x3); ++ WARN_ON(addr & 0x3); + amdgpu_ring_write(ring, lower_32_bits(addr)); + amdgpu_ring_write(ring, upper_32_bits(addr)); + amdgpu_ring_write(ring, lower_32_bits(seq)); +@@ -5436,9 +5436,6 @@ static void gfx_v11_0_ring_emit_fence_ki + { + struct amdgpu_device *adev = ring->adev; + +- /* we only allocate 32bit for each seq wb address */ +- BUG_ON(flags & AMDGPU_FENCE_FLAG_64BIT); +- + /* write fence seq to the "addr" */ + amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); + amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) | diff --git a/queue-6.6/drm-amdgpu-gfx8-drop-unecessary-bug_on.patch b/queue-6.6/drm-amdgpu-gfx8-drop-unecessary-bug_on.patch new file mode 100644 index 0000000000..0dce984d49 --- /dev/null +++ b/queue-6.6/drm-amdgpu-gfx8-drop-unecessary-bug_on.patch @@ -0,0 +1,32 @@ +From 84a1a8a952ab4b8c23c5dd1f2eea4049cb4914f5 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Mon, 15 Jun 2026 18:17:59 -0400 +Subject: drm/amdgpu/gfx8: drop unecessary BUG_ON() + +From: Alex Deucher + +commit 84a1a8a952ab4b8c23c5dd1f2eea4049cb4914f5 upstream. + +There's no need to crash the kernel for this case. + +Reviewed-by: Vitaly Prosyak +Signed-off-by: Alex Deucher +(cherry picked from commit 4d7c25208ca612b754f3bf39e9f16e725b828891) +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 3 --- + 1 file changed, 3 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +@@ -6267,9 +6267,6 @@ static void gfx_v8_0_ring_emit_fence_com + static void gfx_v8_0_ring_emit_fence_kiq(struct amdgpu_ring *ring, u64 addr, + u64 seq, unsigned int flags) + { +- /* we only allocate 32bit for each seq wb address */ +- BUG_ON(flags & AMDGPU_FENCE_FLAG_64BIT); +- + /* write fence seq to the "addr" */ + amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); + amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) | diff --git a/queue-6.6/drm-amdgpu-gfx9-replace-bug_on-with-warn_on.patch b/queue-6.6/drm-amdgpu-gfx9-replace-bug_on-with-warn_on.patch new file mode 100644 index 0000000000..93761a8d4c --- /dev/null +++ b/queue-6.6/drm-amdgpu-gfx9-replace-bug_on-with-warn_on.patch @@ -0,0 +1,61 @@ +From 6302be10b521f5106ce01eb5a724b9e7945a5061 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Mon, 15 Jun 2026 18:14:59 -0400 +Subject: drm/amdgpu/gfx9: replace BUG_ON() with WARN_ON() + +From: Alex Deucher + +commit 6302be10b521f5106ce01eb5a724b9e7945a5061 upstream. + +There's no need to crash the kernel for these cases. + +Reviewed-by: Vitaly Prosyak +Signed-off-by: Alex Deucher +(cherry picked from commit b71604f8685b0eba07866f4e8dc30f93e1931054) +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +@@ -983,7 +983,7 @@ static void gfx_v9_0_wait_reg_mem(struct + WAIT_REG_MEM_ENGINE(eng_sel))); + + if (mem_space) +- BUG_ON(addr0 & 0x3); /* Dword align */ ++ WARN_ON(addr0 & 0x3); /* Dword align */ + amdgpu_ring_write(ring, addr0); + amdgpu_ring_write(ring, addr1); + amdgpu_ring_write(ring, ref); +@@ -5166,7 +5166,7 @@ static void gfx_v9_0_ring_emit_ib_gfx(st + } + + amdgpu_ring_write(ring, header); +- BUG_ON(ib->gpu_addr & 0x3); /* Dword align */ ++ WARN_ON(ib->gpu_addr & 0x3); /* Dword align */ + amdgpu_ring_write(ring, + #ifdef __BIG_ENDIAN + (2 << 0) | +@@ -5278,7 +5278,7 @@ static void gfx_v9_0_ring_emit_ib_comput + } + + amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2)); +- BUG_ON(ib->gpu_addr & 0x3); /* Dword align */ ++ WARN_ON(ib->gpu_addr & 0x3); /* Dword align */ + amdgpu_ring_write(ring, + #ifdef __BIG_ENDIAN + (2 << 0) | +@@ -5319,9 +5319,9 @@ static void gfx_v9_0_ring_emit_fence(str + * aligned if only send 32bit data low (discard data high) + */ + if (write64bit) +- BUG_ON(addr & 0x7); ++ WARN_ON(addr & 0x7); + else +- BUG_ON(addr & 0x3); ++ WARN_ON(addr & 0x3); + amdgpu_ring_write(ring, lower_32_bits(addr)); + amdgpu_ring_write(ring, upper_32_bits(addr)); + amdgpu_ring_write(ring, lower_32_bits(seq)); diff --git a/queue-6.6/drm-amdgpu-gfx9.4.3-replace-bug_on-with-warn_on.patch b/queue-6.6/drm-amdgpu-gfx9.4.3-replace-bug_on-with-warn_on.patch new file mode 100644 index 0000000000..7067f5d4fb --- /dev/null +++ b/queue-6.6/drm-amdgpu-gfx9.4.3-replace-bug_on-with-warn_on.patch @@ -0,0 +1,62 @@ +From 00f4050f7c367d7bdce347ca279ce467c434cf15 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Mon, 15 Jun 2026 18:42:35 -0400 +Subject: drm/amdgpu/gfx9.4.3: replace BUG_ON() with WARN_ON() + +From: Alex Deucher + +commit 00f4050f7c367d7bdce347ca279ce467c434cf15 upstream. + +There's no need to crash the kernel for these cases. + +Reviewed-by: Vitaly Prosyak +Signed-off-by: Alex Deucher +(cherry picked from commit 5676593d08998d7a6d9e2d51d6b54b3820e3755c) +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 11 ++++------- + 1 file changed, 4 insertions(+), 7 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c +@@ -236,7 +236,7 @@ static void gfx_v9_4_3_wait_reg_mem(stru + WAIT_REG_MEM_ENGINE(eng_sel))); + + if (mem_space) +- BUG_ON(addr0 & 0x3); /* Dword align */ ++ WARN_ON(addr0 & 0x3); /* Dword align */ + amdgpu_ring_write(ring, addr0); + amdgpu_ring_write(ring, addr1); + amdgpu_ring_write(ring, ref); +@@ -2529,7 +2529,7 @@ static void gfx_v9_4_3_ring_emit_ib_comp + } + + amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2)); +- BUG_ON(ib->gpu_addr & 0x3); /* Dword align */ ++ WARN_ON(ib->gpu_addr & 0x3); /* Dword align */ + amdgpu_ring_write(ring, + #ifdef __BIG_ENDIAN + (2 << 0) | +@@ -2563,9 +2563,9 @@ static void gfx_v9_4_3_ring_emit_fence(s + * aligned if only send 32bit data low (discard data high) + */ + if (write64bit) +- BUG_ON(addr & 0x7); ++ WARN_ON(addr & 0x7); + else +- BUG_ON(addr & 0x3); ++ WARN_ON(addr & 0x3); + amdgpu_ring_write(ring, lower_32_bits(addr)); + amdgpu_ring_write(ring, upper_32_bits(addr)); + amdgpu_ring_write(ring, lower_32_bits(seq)); +@@ -2625,9 +2625,6 @@ static void gfx_v9_4_3_ring_emit_fence_k + { + struct amdgpu_device *adev = ring->adev; + +- /* we only allocate 32bit for each seq wb address */ +- BUG_ON(flags & AMDGPU_FENCE_FLAG_64BIT); +- + /* write fence seq to the "addr" */ + amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); + amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) | diff --git a/queue-6.6/drm-amdgpu-invoke-pm_genpd_remove-before-freeing-genpd.patch b/queue-6.6/drm-amdgpu-invoke-pm_genpd_remove-before-freeing-genpd.patch new file mode 100644 index 0000000000..4e92b4cfa8 --- /dev/null +++ b/queue-6.6/drm-amdgpu-invoke-pm_genpd_remove-before-freeing-genpd.patch @@ -0,0 +1,34 @@ +From 28c9b3c5dc35cc790d11e26ca3fc6e068be63998 Mon Sep 17 00:00:00 2001 +From: Ce Sun +Date: Mon, 22 Jun 2026 22:58:16 +0800 +Subject: drm/amdgpu: invoke pm_genpd_remove() before freeing genpd + +From: Ce Sun + +commit 28c9b3c5dc35cc790d11e26ca3fc6e068be63998 upstream. + +Call pm_genpd_remove() to unregister from global list prior to releasing +acp_genpd memory, and clear the pointer after free. + +Signed-off-by: Ce Sun +Reviewed-by: Tao Zhou +Signed-off-by: Alex Deucher +(cherry picked from commit cd8650d7a91ee8b768e202354672553faa5cc1f2) +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c +@@ -559,7 +559,9 @@ static int acp_hw_fini(void *handle) + + mfd_remove_devices(adev->acp.parent); + kfree(adev->acp.acp_res); ++ pm_genpd_remove(&adev->acp.acp_genpd->gpd); + kfree(adev->acp.acp_genpd); ++ adev->acp.acp_genpd = NULL; + kfree(adev->acp.acp_cell); + + return 0; diff --git a/queue-6.6/drm-amdgpu-sdma4.4.2-replace-bug_on-with-warn_on.patch b/queue-6.6/drm-amdgpu-sdma4.4.2-replace-bug_on-with-warn_on.patch new file mode 100644 index 0000000000..4cd36e047b --- /dev/null +++ b/queue-6.6/drm-amdgpu-sdma4.4.2-replace-bug_on-with-warn_on.patch @@ -0,0 +1,40 @@ +From 40cdbe9fa424cc6264a7aed93a04bd7d69109d9e Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Mon, 15 Jun 2026 18:44:11 -0400 +Subject: drm/amdgpu/sdma4.4.2: replace BUG_ON() with WARN_ON() + +From: Alex Deucher + +commit 40cdbe9fa424cc6264a7aed93a04bd7d69109d9e upstream. + +There's no need to crash the kernel for these cases. + +Reviewed-by: Vitaly Prosyak +Signed-off-by: Alex Deucher +(cherry picked from commit fa4f86a148271e325e95287630a3a15a9cd35fdc) +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c ++++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c +@@ -393,7 +393,7 @@ static void sdma_v4_4_2_ring_emit_fence( + /* write the fence */ + amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE)); + /* zero in first two bits */ +- BUG_ON(addr & 0x3); ++ WARN_ON(addr & 0x3); + amdgpu_ring_write(ring, lower_32_bits(addr)); + amdgpu_ring_write(ring, upper_32_bits(addr)); + amdgpu_ring_write(ring, lower_32_bits(seq)); +@@ -403,7 +403,7 @@ static void sdma_v4_4_2_ring_emit_fence( + addr += 4; + amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE)); + /* zero in first two bits */ +- BUG_ON(addr & 0x3); ++ WARN_ON(addr & 0x3); + amdgpu_ring_write(ring, lower_32_bits(addr)); + amdgpu_ring_write(ring, upper_32_bits(addr)); + amdgpu_ring_write(ring, upper_32_bits(seq)); diff --git a/queue-6.6/drm-amdgpu-vce-fix-integer-overflow-in-image-size.patch b/queue-6.6/drm-amdgpu-vce-fix-integer-overflow-in-image-size.patch new file mode 100644 index 0000000000..f8d80baef4 --- /dev/null +++ b/queue-6.6/drm-amdgpu-vce-fix-integer-overflow-in-image-size.patch @@ -0,0 +1,61 @@ +From 186bfdc4e26d019b2e7570cb121964a1d89b2e5b Mon Sep 17 00:00:00 2001 +From: Boyuan Zhang +Date: Mon, 25 May 2026 11:34:27 -0400 +Subject: drm/amdgpu/vce: fix integer overflow in image size +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Boyuan Zhang + +commit 186bfdc4e26d019b2e7570cb121964a1d89b2e5b upstream. + +Fix a security vulnerability where malicious VCE command streams +with oversized dimensions (e.g. 65536×65536) cause 32-bit integer +overflow, wrapping the calculated buffer size to 0. This bypasses +validation and allows GPU firmware to perform out-of-bound memory +access. + +The fix uses 64-bit arithmetic to detect overflow and rejects +invalid dimensions before they reach the hardware. + +V2: remove redundant check +V3: modify max height value +V4: remove size64 + +Signed-off-by: Boyuan Zhang +Reviewed-by: Alex Deucher +Signed-off-by: Alex Deucher +(cherry picked from commit cbe408dba581755ad1279a487ec786d8927d778d) +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 17 ++++++++++++++--- + 1 file changed, 14 insertions(+), 3 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c +@@ -852,9 +852,20 @@ int amdgpu_vce_ring_parse_cs(struct amdg + goto out; + } + +- *size = amdgpu_ib_get_value(ib, idx + 8) * +- amdgpu_ib_get_value(ib, idx + 10) * +- 8 * 3 / 2; ++ uint32_t width, height; ++ width = amdgpu_ib_get_value(ib, idx + 8); ++ height = amdgpu_ib_get_value(ib, idx + 10); ++ ++ if (width == 0 || height == 0 || ++ width > 4096 || height > 2304) { ++ DRM_ERROR("invalid VCE image size: %ux%u\n", ++ width, height); ++ r = -EINVAL; ++ goto out; ++ } ++ ++ *size = width * height * 8 * 3 / 2; ++ + break; + + case 0x04000001: /* config extension */ diff --git a/queue-6.6/drm-amdgpu-vcn4-avoid-rereading-ib-param-length.patch b/queue-6.6/drm-amdgpu-vcn4-avoid-rereading-ib-param-length.patch new file mode 100644 index 0000000000..efe2fb0c2d --- /dev/null +++ b/queue-6.6/drm-amdgpu-vcn4-avoid-rereading-ib-param-length.patch @@ -0,0 +1,80 @@ +From 3b4082fabc67c9780b06eb959e59dd92fa79c0f0 Mon Sep 17 00:00:00 2001 +From: Boyuan Zhang +Date: Thu, 21 May 2026 09:59:37 -0400 +Subject: drm/amdgpu/vcn4: avoid rereading IB param length + +From: Boyuan Zhang + +commit 3b4082fabc67c9780b06eb959e59dd92fa79c0f0 upstream. + +Reuse the parameter length returned by +vcn_v4_0_enc_find_ib_param() instead of rereading it from +the IB. + +This avoids a potential TOCTOU issue if the IB contents +change between reads. + +Signed-off-by: Boyuan Zhang +Reviewed-by: David Rosca +Signed-off-by: Alex Deucher +(cherry picked from commit dbb02b4755f8c1f3773263f2d779872c1c0c073a) +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 15 +++++++++------ + 1 file changed, 9 insertions(+), 6 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c +@@ -1769,14 +1769,17 @@ out: + #define RENCODE_IB_PARAM_SESSION_INIT 0x00000003 + + /* return the offset in ib if id is found, -1 otherwise */ +-static int vcn_v4_0_enc_find_ib_param(struct amdgpu_ib *ib, uint32_t id, int start) ++static int vcn_v4_0_enc_find_ib_param(struct amdgpu_ib *ib, uint32_t id, int start, uint32_t *length) + { + int i; + uint32_t len; + + for (i = start; (len = amdgpu_ib_get_value(ib, i)) >= 8; i += len / 4) { +- if (amdgpu_ib_get_value(ib, i + 1) == id) ++ if (amdgpu_ib_get_value(ib, i + 1) == id) { ++ if (length) ++ *length = len; + return i; ++ } + } + return -1; + } +@@ -1786,14 +1789,14 @@ static int vcn_v4_0_ring_patch_cs_in_pla + struct amdgpu_ib *ib) + { + struct amdgpu_ring *ring = amdgpu_job_ring(job); +- uint32_t val; ++ uint32_t val, len; + int idx = 0, sidx; + + /* The first instance can decode anything */ + if (!ring->me) + return 0; + +- while ((idx = vcn_v4_0_enc_find_ib_param(ib, RADEON_VCN_ENGINE_INFO, idx)) >= 0) { ++ while ((idx = vcn_v4_0_enc_find_ib_param(ib, RADEON_VCN_ENGINE_INFO, idx, &len)) >= 0) { + val = amdgpu_ib_get_value(ib, idx + 2); /* RADEON_VCN_ENGINE_TYPE */ + if (val == RADEON_VCN_ENGINE_TYPE_DECODE) { + uint32_t valid_buf_flag = amdgpu_ib_get_value(ib, idx + 6); +@@ -1806,12 +1809,12 @@ static int vcn_v4_0_ring_patch_cs_in_pla + amdgpu_ib_get_value(ib, idx + 8); + return vcn_v4_0_dec_msg(p, job, msg_buffer_addr); + } else if (val == RADEON_VCN_ENGINE_TYPE_ENCODE) { +- sidx = vcn_v4_0_enc_find_ib_param(ib, RENCODE_IB_PARAM_SESSION_INIT, idx); ++ sidx = vcn_v4_0_enc_find_ib_param(ib, RENCODE_IB_PARAM_SESSION_INIT, idx, NULL); + if (sidx >= 0 && + amdgpu_ib_get_value(ib, sidx + 2) == RENCODE_ENCODE_STANDARD_AV1) + return vcn_v4_0_limit_sched(p, job); + } +- idx += amdgpu_ib_get_value(ib, idx) / 4; ++ idx += len / 4; + } + return 0; + } diff --git a/queue-6.6/drm-dp_mst-handle-torn-down-topology-gracefully-in-drm_dp_mst_topology_queue_probe.patch b/queue-6.6/drm-dp_mst-handle-torn-down-topology-gracefully-in-drm_dp_mst_topology_queue_probe.patch new file mode 100644 index 0000000000..f0410e1b9c --- /dev/null +++ b/queue-6.6/drm-dp_mst-handle-torn-down-topology-gracefully-in-drm_dp_mst_topology_queue_probe.patch @@ -0,0 +1,57 @@ +From 613059875958e7b217b250ed14c3b189f9488421 Mon Sep 17 00:00:00 2001 +From: Luca Coelho +Date: Mon, 22 Jun 2026 17:03:58 +0300 +Subject: drm/dp_mst: Handle torn-down topology gracefully in drm_dp_mst_topology_queue_probe() + +From: Luca Coelho + +commit 613059875958e7b217b250ed14c3b189f9488421 upstream. + +A hotplug or link-loss event can tear down the MST topology +(setting mgr->mst_state = false and mgr->mst_primary = NULL) concurrently +with a caller invoking drm_dp_mst_topology_queue_probe(). Since the check +is already performed under mgr->lock, the condition is not a programming +error but a valid race -- the topology was valid when the caller decided +to call this function, but was torn down before the lock was acquired. + +Replace the drm_WARN_ON() with a graceful early return. This eliminates +spurious kernel warnings and the resulting compositor crashes observed +when connecting/disconnecting DP MST monitors, while keeping the correct +behavior of doing nothing when MST is not active. A drm_dbg_mst() trace +is added so the skipped probe remains observable under MST debug logging. + +The existing WARN_ON(mgr->mst_primary) in drm_dp_mst_topology_mgr_set_mst() +already catches the case where the topology is initialized twice, so no +diagnostic coverage is lost. + +Fixes: dbaeef363ea5 ("drm/dp_mst: Add a helper to queue a topology probe") +Cc: Imre Deak +Cc: Lyude Paul +Cc: stable@vger.kernel.org +Cc: intel-gfx@lists.freedesktop.org +Cc: dri-devel@lists.freedesktop.org +Signed-off-by: Jonas Emilsson +Signed-off-by: Luca Coelho +Link: https://lore.kernel.org/all/20260503034533.1023686-1-jonas.emilsson@gmail.com +Acked-by: Imre Deak +Link: https://patch.msgid.link/20260622140532.526722-1-luciano.coelho@intel.com +Signed-off-by: Maarten Lankhorst +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/display/drm_dp_mst_topology.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/display/drm_dp_mst_topology.c ++++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c +@@ -3703,8 +3703,10 @@ void drm_dp_mst_topology_queue_probe(str + { + mutex_lock(&mgr->lock); + +- if (drm_WARN_ON(mgr->dev, !mgr->mst_state || !mgr->mst_primary)) ++ if (!mgr->mst_state || !mgr->mst_primary) { ++ drm_dbg_kms(mgr->dev, "queue_probe skipped: topology torn down\n"); + goto out_unlock; ++ } + + drm_dp_mst_topology_mgr_invalidate_mstb(mgr->mst_primary); + drm_dp_mst_queue_probe_work(mgr); diff --git a/queue-6.6/series b/queue-6.6/series index 43007187ee..1d4acc3665 100644 --- a/queue-6.6/series +++ b/queue-6.6/series @@ -335,3 +335,16 @@ mctp-serial-handle-zero-length-frames-to-prevent-rx-buffer-overflow.patch pppoe-reload-header-pointer-after-dev_hard_header.patch tipc-clear-sock-sk-on-the-failed-insert-path-in-tipc_sk_create.patch vxlan-mdb-fix-source-list-corruption-on-a-failed-replace.patch +drm-amd-pm-make-pp_features-read-only-when-scpm-is-enabled.patch +drm-amdgpu-gfx10-replace-bug_on-with-warn_on.patch +drm-amdgpu-gfx11-replace-bug_on-with-warn_on.patch +drm-amdgpu-gfx8-drop-unecessary-bug_on.patch +drm-amdgpu-gfx9.4.3-replace-bug_on-with-warn_on.patch +drm-amdgpu-gfx9-replace-bug_on-with-warn_on.patch +drm-amdgpu-sdma4.4.2-replace-bug_on-with-warn_on.patch +drm-amdgpu-vce-fix-integer-overflow-in-image-size.patch +drm-amdgpu-vcn4-avoid-rereading-ib-param-length.patch +drm-dp_mst-handle-torn-down-topology-gracefully-in-drm_dp_mst_topology_queue_probe.patch +drm-amdgpu-fix-division-by-zero-with-invalid-uvd-dimensions.patch +drm-amdgpu-invoke-pm_genpd_remove-before-freeing-genpd.patch +drm-amdgpu-fix-aperture-mapping-leak.patch