From: Greg Kroah-Hartman Date: Wed, 29 Jul 2026 12:44:45 +0000 (+0200) Subject: 5.15-stable patches X-Git-Tag: v6.1.179~46 X-Git-Url: http://git.ipfire.org/gitweb/?a=commitdiff_plain;h=1a042341bac41ed9478fae42dfd4b27cbb6a92b6;p=thirdparty%2Fkernel%2Fstable-queue.git 5.15-stable patches added patches: drm-amd-pm-ci-don-t-disable-mclk-dpm-on-bonaire-0x6658-r7-260x.patch drm-amdgpu-fix-vfct-bus-number-matching-with-soft-filter.patch --- diff --git a/queue-5.15/drm-amd-pm-ci-don-t-disable-mclk-dpm-on-bonaire-0x6658-r7-260x.patch b/queue-5.15/drm-amd-pm-ci-don-t-disable-mclk-dpm-on-bonaire-0x6658-r7-260x.patch new file mode 100644 index 0000000000..667903af3d --- /dev/null +++ b/queue-5.15/drm-amd-pm-ci-don-t-disable-mclk-dpm-on-bonaire-0x6658-r7-260x.patch @@ -0,0 +1,63 @@ +From 85371c5ef502d10add72eab38711e191dccea981 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Timur=20Krist=C3=B3f?= +Date: Mon, 13 Jul 2026 08:14:43 +0200 +Subject: drm/amd/pm/ci: Don't disable MCLK DPM on Bonaire 0x6658 (R7 260X) +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Timur Kristóf + +commit 85371c5ef502d10add72eab38711e191dccea981 upstream. + +The old radeon driver has a documented workaround in ci_dpm.c +which claims that Bonaire 0x6658 with old memory controller +firmware is unstable with MCLK DPM, so as a precaution I +disabled MCLK DPM on this ASIC in amdgpu. + +Note that the old MC firmware is not actually used with +amdgpu, but in theory it's possible that the VBIOS sets +up the ASIC with an old MC firmware that is already running +when amdgpu initializes (in which case amdgpu doesn't +load its own firmware). + +What I expected to happen is that the GPU would simply use +its maximum memory clock, and indeed this is what seemed +to happen according to amdgpu_pm_info which reads the +current MCLK value from the SMU. +However, some users reported a huge perf regression +and upon a closer look it seems that the GPU seems to +not actually use the highest MCLK value, despite the SMU +reporting that it does. + +Let's not disable MCLK DPM on Bonaire 0x6658 (R7 260X). + +Keep MCLK DPM disabled on R9 M380 in the 2015 iMac +because that still hangs if we enable it. + +Fixes: 9851f29cb06c ("drm/amd/pm/ci: Disable MCLK DPM on problematic CI ASICs") +Signed-off-by: Timur Kristóf +Signed-off-by: Alex Deucher +(cherry picked from commit d34acad064ee7d82bd18f5d87592c422d4d323ac) +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/pm/powerplay/hwmgr/hwmgr.c | 7 ++----- + 1 file changed, 2 insertions(+), 5 deletions(-) + +--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/hwmgr.c ++++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/hwmgr.c +@@ -106,11 +106,8 @@ int hwmgr_early_init(struct pp_hwmgr *hw + hwmgr->od_enabled = false; + switch (hwmgr->chip_id) { + case CHIP_BONAIRE: +- /* R9 M380 in iMac 2015: SMU hangs when enabling MCLK DPM +- * R7 260X cards with old MC ucode: MCLK DPM is unstable +- */ +- if (adev->pdev->subsystem_vendor == 0x106B || +- adev->pdev->device == 0x6658) { ++ /* R9 M380 in iMac 2015: SMU hangs when enabling MCLK DPM */ ++ if (adev->pdev->subsystem_vendor == 0x106B) { + dev_info(adev->dev, "disabling MCLK DPM on quirky ASIC"); + adev->pm.pp_feature &= ~PP_MCLK_DPM_MASK; + hwmgr->feature_mask &= ~PP_MCLK_DPM_MASK; diff --git a/queue-5.15/drm-amdgpu-fix-vfct-bus-number-matching-with-soft-filter.patch b/queue-5.15/drm-amdgpu-fix-vfct-bus-number-matching-with-soft-filter.patch new file mode 100644 index 0000000000..ace3ed5ff8 --- /dev/null +++ b/queue-5.15/drm-amdgpu-fix-vfct-bus-number-matching-with-soft-filter.patch @@ -0,0 +1,95 @@ +From db7e8108809a2245f0a17ba323f027cac0941ffb Mon Sep 17 00:00:00 2001 +From: Mario Limonciello +Date: Wed, 8 Jul 2026 14:35:14 -0500 +Subject: drm/amdgpu: Fix VFCT bus number matching with soft filter + +From: Mario Limonciello + +commit db7e8108809a2245f0a17ba323f027cac0941ffb upstream. + +On systems where PCI bus renumbering occurs (e.g. pci=realloc, +resource conflicts), the runtime bus number may differ from the +BIOS POST bus number recorded in the VFCT table. This causes +amdgpu_acpi_vfct_bios() to fail finding the VBIOS even though +the correct device entry exists. + +Introduce amdgpu_acpi_vfct_match() which treats the bus number +as a soft filter: vendor/device/function identity is the hard +requirement, while exact bus match is the preferred path. When +bus numbers disagree but device identity matches, accept the +VFCT entry and log a dev_notice for diagnostics. + +Reported-by: Oz Tiram +Closes: https://lore.kernel.org/amd-gfx/20260621173211.28443-1-oz@shift-computing.de/ +Reviewed-by: Alex Deucher +Link: https://patch.msgid.link/20260708193518.702584-2-mario.limonciello@amd.com +Signed-off-by: Mario Limonciello +Signed-off-by: Alex Deucher +(cherry picked from commit 11c141672045ffc0187aa604f2c0f597bc334fb2) +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c | 45 +++++++++++++++++++++++++++---- + 1 file changed, 40 insertions(+), 5 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c +@@ -363,6 +363,45 @@ static bool amdgpu_read_disabled_bios(st + } + + #ifdef CONFIG_ACPI ++/** ++ * amdgpu_acpi_vfct_match() - Check if a VFCT entry matches the device ++ * @adev: AMDGPU device ++ * @vhdr: VFCT image header to check ++ * ++ * VFCT entries contain the PCI bus number as recorded during BIOS POST. ++ * On systems where the kernel renumbers PCI buses (e.g. pci=realloc or ++ * resource conflicts), the runtime bus number may differ from the POST ++ * value. Match by device identity (vendor + device + function) and use ++ * the bus number as a preference: exact bus match is preferred, but when ++ * the bus numbers disagree we accept the entry if the device identity ++ * matches. ++ * ++ * Returns: 0 on match, -ENODEV on no match ++ */ ++static int amdgpu_acpi_vfct_match(struct amdgpu_device *adev, ++ VFCT_IMAGE_HEADER *vhdr) ++{ ++ /* Vendor and device IDs must always match */ ++ if (vhdr->VendorID != adev->pdev->vendor || ++ vhdr->DeviceID != adev->pdev->device) ++ return -ENODEV; ++ ++ if (vhdr->PCIDevice != PCI_SLOT(adev->pdev->devfn) || ++ vhdr->PCIFunction != PCI_FUNC(adev->pdev->devfn)) ++ return -ENODEV; ++ ++ /* Exact bus number match - preferred */ ++ if (vhdr->PCIBus == adev->pdev->bus->number) ++ return 0; ++ ++ /* Bus mismatch but device identity matches (PCI renumbering case) */ ++ dev_notice(adev->dev, ++ "VFCT bus number mismatch: table %u != runtime %u, matching by device identity (vendor 0x%04x device 0x%04x)\n", ++ vhdr->PCIBus, adev->pdev->bus->number, ++ adev->pdev->vendor, adev->pdev->device); ++ return 0; ++} ++ + static bool amdgpu_acpi_vfct_bios(struct amdgpu_device *adev) + { + struct acpi_table_header *hdr; +@@ -398,11 +437,7 @@ static bool amdgpu_acpi_vfct_bios(struct + } + + if (vhdr->ImageLength && +- vhdr->PCIBus == adev->pdev->bus->number && +- vhdr->PCIDevice == PCI_SLOT(adev->pdev->devfn) && +- vhdr->PCIFunction == PCI_FUNC(adev->pdev->devfn) && +- vhdr->VendorID == adev->pdev->vendor && +- vhdr->DeviceID == adev->pdev->device) { ++ !amdgpu_acpi_vfct_match(adev, vhdr)) { + adev->bios = kmemdup(&vbios->VbiosContent, + vhdr->ImageLength, + GFP_KERNEL); diff --git a/queue-5.15/series b/queue-5.15/series index 3056d60255..57eccdc6b6 100644 --- a/queue-5.15/series +++ b/queue-5.15/series @@ -149,3 +149,5 @@ drm-amdgpu-sdma5.0-replace-bug_on-with-warn_on.patch drm-i915-return-null-on-error-in-active_instance.patch drm-i915-gem-do-not-leak-siblings-on-proto-context-error.patch drm-i915-gem-fix-null-deref-in-i915_context_param_sseu.patch +drm-amdgpu-fix-vfct-bus-number-matching-with-soft-filter.patch +drm-amd-pm-ci-don-t-disable-mclk-dpm-on-bonaire-0x6658-r7-260x.patch