From: Peng Yang Date: Mon, 8 Jun 2026 09:58:49 +0000 (+0800) Subject: spi: dw: fix race between IRQ handler and error handler on SMP X-Git-Url: http://git.ipfire.org/gitweb/?a=commitdiff_plain;h=3c60184e39b57e5efe664fe8540cdbc1bc7ea899;p=thirdparty%2Fkernel%2Flinux.git spi: dw: fix race between IRQ handler and error handler on SMP On SMP systems, dw_spi_handle_err() can be called from the SPI core kthread while the IRQ handler is still accessing the FIFO on another CPU. Resetting the chip via dw_spi_reset_chip() during an active FIFO read/write causes a bus error. Fix this by calling disable_irq() before the chip reset, which masks the IRQ and waits for any in-flight handler to complete via synchronize_irq(). This ensures no handler is accessing the FIFO when the reset occurs. Signed-off-by: Peng Yang Suggested-by: Jonathan Chocron Link: https://patch.msgid.link/20260608095849.3446-1-pyangyyd@amazon.com Signed-off-by: Mark Brown --- diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index b47637888c5c..4672bc2a873a 100644 --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -472,7 +472,9 @@ static inline void dw_spi_abort(struct spi_controller *ctlr) if (dws->dma_mapped) dws->dma_ops->dma_stop(dws); + disable_irq(dws->irq); dw_spi_reset_chip(dws); + enable_irq(dws->irq); } static void dw_spi_handle_err(struct spi_controller *ctlr,