From: Mark Rutland Date: Wed, 3 Jun 2026 11:06:21 +0000 (+0100) Subject: arm64: fpsimd: Move sve_get_vl() and sme_get_vl() inline X-Git-Url: http://git.ipfire.org/gitweb/?a=commitdiff_plain;h=3f26d7c6544cae590d8aa380aac62fe455dac2c3;p=thirdparty%2Fkernel%2Flinux.git arm64: fpsimd: Move sve_get_vl() and sme_get_vl() inline The sve_get_vl() and sme_get_vl() functions are wrappers for the RDVL and RDSVL instructions respectively. There's no need for those to be out-of-line. Replace the out-of-line assembly functions with equivalent inline functions. The _sve_rdvl assembly macro is unused, and so it is removed. The _sme_rdsvl assembly macro is still used elsewhere, and so is kept for now. Signed-off-by: Mark Rutland Reviewed-by: Mark Brown Reviewed-by: Vladimir Murzin Cc: Catalin Marinas Cc: Fuad Tabba Cc: James Morse Cc: Marc Zyngier Cc: Oliver Upton Cc: Will Deacon Signed-off-by: Will Deacon --- diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h index 8efa3c0402a7a..36cf528e64971 100644 --- a/arch/arm64/include/asm/fpsimd.h +++ b/arch/arm64/include/asm/fpsimd.h @@ -22,6 +22,9 @@ #include #include +#define __SVE_PREAMBLE ".arch_extension sve\n" +#define __SME_PREAMBLE ".arch_extension sme\n" + /* Masks for extracting the FPSR and FPCR from the FPSCR */ #define VFP_FPSCR_STAT_MASK 0xf800009f #define VFP_FPSCR_CTRL_MASK 0x07f79f00 @@ -141,11 +144,23 @@ static inline void *thread_zt_state(struct thread_struct *thread) return thread->sme_state + ZA_SIG_REGS_SIZE(sme_vq); } +static inline unsigned int sve_get_vl(void) +{ + unsigned int vl; + + asm volatile( + __SVE_PREAMBLE + " rdvl %x[vl], #1\n" + : [vl] "=r" (vl) + ); + + return vl; +} + extern void sve_save_state(void *state, u32 *pfpsr, int save_ffr); extern void sve_load_state(void const *state, u32 const *pfpsr, int restore_ffr); extern void sve_flush_live(bool flush_ffr, unsigned long vq_minus_1); -extern unsigned int sve_get_vl(void); extern void sme_save_state(void *state, int zt); extern void sme_load_state(void const *state, int zt); @@ -400,8 +415,20 @@ static inline int sme_max_virtualisable_vl(void) return vec_max_virtualisable_vl(ARM64_VEC_SME); } +static inline unsigned int sme_get_vl(void) +{ + unsigned int vl; + + asm volatile( + __SME_PREAMBLE + " rdsvl %x[vl], #1\n" + : [vl] "=r" (vl) + ); + + return vl; +} + extern void sme_alloc(struct task_struct *task, bool flush); -extern unsigned int sme_get_vl(void); extern int sme_set_current_vl(unsigned long arg); extern int sme_get_current_vl(void); extern void sme_suspend_exit(void); diff --git a/arch/arm64/include/asm/fpsimdmacros.h b/arch/arm64/include/asm/fpsimdmacros.h index 4a9bf46e52913..c724fcad7ee02 100644 --- a/arch/arm64/include/asm/fpsimdmacros.h +++ b/arch/arm64/include/asm/fpsimdmacros.h @@ -125,12 +125,6 @@ ldr p\np, [x\nxbase, #\offset, MUL VL] .endm -/* RDVL X\nx, #\imm */ -.macro _sve_rdvl nx, imm - .arch_extension sve - rdvl x\nx, #\imm -.endm - /* RDFFR (unpredicated): RDFFR P\np.B */ .macro _sve_rdffr np .arch_extension sve diff --git a/arch/arm64/kernel/entry-fpsimd.S b/arch/arm64/kernel/entry-fpsimd.S index bfa73f26653f2..a124c6d3766cf 100644 --- a/arch/arm64/kernel/entry-fpsimd.S +++ b/arch/arm64/kernel/entry-fpsimd.S @@ -57,11 +57,6 @@ SYM_FUNC_START(sve_load_state) ret SYM_FUNC_END(sve_load_state) -SYM_FUNC_START(sve_get_vl) - _sve_rdvl 0, 1 - ret -SYM_FUNC_END(sve_get_vl) - /* * Zero all SVE registers but the first 128-bits of each vector * @@ -84,11 +79,6 @@ SYM_FUNC_END(sve_flush_live) #ifdef CONFIG_ARM64_SME -SYM_FUNC_START(sme_get_vl) - _sme_rdsvl 0, 1 - ret -SYM_FUNC_END(sme_get_vl) - /* * Save the ZA and ZT state *