From: Wenxian Wang Date: Sat, 9 May 2026 02:46:23 +0000 (+0800) Subject: drm/amd/display: Add ADDR3 swizzle modes X-Git-Url: http://git.ipfire.org/gitweb/?a=commitdiff_plain;h=468b02d3f212b5e528d8a40d06bf26e7f3fb4a64;p=thirdparty%2Flinux.git drm/amd/display: Add ADDR3 swizzle modes [Why] New swizzle modes are needed for ADDR3 block support. [How] Add DC_ADDR3_SW_64KB_2D_Z and DC_ADDR3_SW_256KB_2D_Z enum values to dc_hw_types.h. Reviewed-by: Ilya Bakoulin Signed-off-by: Wenxian Wang Signed-off-by: Ivan Lipski Tested-by: Dan Wheeler Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h index c2ca08d26e37..fa64bf6e711c 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h +++ b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h @@ -346,7 +346,9 @@ enum swizzle_mode_addr3_values { DC_ADDR3_SW_4KB_3D = 5, DC_ADDR3_SW_64KB_3D = 6, DC_ADDR3_SW_256KB_3D = 7, - DC_ADDR3_SW_MAX = 8, + DC_ADDR3_SW_64KB_2D_Z = 8, + DC_ADDR3_SW_256KB_2D_Z = 9, + DC_ADDR3_SW_MAX = 10, DC_ADDR3_SW_UNKNOWN = DC_ADDR3_SW_MAX }; diff --git a/drivers/gpu/drm/amd/display/dc/hubbub/dcn401/dcn401_hubbub.c b/drivers/gpu/drm/amd/display/dc/hubbub/dcn401/dcn401_hubbub.c index e12ed7591848..bf30a1bb61b7 100644 --- a/drivers/gpu/drm/amd/display/dc/hubbub/dcn401/dcn401_hubbub.c +++ b/drivers/gpu/drm/amd/display/dc/hubbub/dcn401/dcn401_hubbub.c @@ -617,7 +617,9 @@ bool hubbub401_dcc_support_swizzle( swizzle_supported = true; break; case DC_ADDR3_SW_64KB_2D: + case DC_ADDR3_SW_64KB_2D_Z: case DC_ADDR3_SW_256KB_2D: + case DC_ADDR3_SW_256KB_2D_Z: swizzle_supported = true; break; default: