From: Shawn Guo Date: Sat, 14 Mar 2026 05:13:20 +0000 (+0800) Subject: phy: qcom-qmp: Add missing QSERDES COM v2 registers X-Git-Url: http://git.ipfire.org/gitweb/?a=commitdiff_plain;h=52595824b0027d075470f7f08afe805844c1b079;p=thirdparty%2Fkernel%2Flinux.git phy: qcom-qmp: Add missing QSERDES COM v2 registers A few registers that could be used by phy-qcom-qmp drivers are missing from qserdes-com-v2 header. Add them. Signed-off-by: Shawn Guo Reviewed-by: Dmitry Baryshkov Link: https://patch.msgid.link/20260314051325.198137-2-shengchao.guo@oss.qualcomm.com Signed-off-by: Vinod Koul --- diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v2.h b/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v2.h index 3ea1884f35dd5..cb599c113189c 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v2.h +++ b/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v2.h @@ -34,6 +34,7 @@ #define QSERDES_V2_COM_LOCK_CMP3_MODE1 0x060 #define QSERDES_V2_COM_EP_CLOCK_DETECT_CTR 0x068 #define QSERDES_V2_COM_SYSCLK_DET_COMP_STATUS 0x06c +#define QSERDES_V2_COM_BG_TRIM 0x070 #define QSERDES_V2_COM_CLK_EP_DIV 0x074 #define QSERDES_V2_COM_CP_CTRL_MODE0 0x078 #define QSERDES_V2_COM_CP_CTRL_MODE1 0x07c @@ -47,6 +48,7 @@ #define QSERDES_V2_COM_CML_SYSCLK_SEL 0x0b0 #define QSERDES_V2_COM_RESETSM_CNTRL 0x0b4 #define QSERDES_V2_COM_RESETSM_CNTRL2 0x0b8 +#define QSERDES_V2_COM_RESCODE_DIV_NUM 0x0c4 #define QSERDES_V2_COM_LOCK_CMP_EN 0x0c8 #define QSERDES_V2_COM_LOCK_CMP_CFG 0x0cc #define QSERDES_V2_COM_DEC_START_MODE0 0x0d0 @@ -83,6 +85,7 @@ #define QSERDES_V2_COM_RESTRIM_CODE_STATUS 0x164 #define QSERDES_V2_COM_PLLCAL_CODE1_STATUS 0x168 #define QSERDES_V2_COM_PLLCAL_CODE2_STATUS 0x16c +#define QSERDES_V2_COM_BG_CTRL 0x170 #define QSERDES_V2_COM_CLK_SELECT 0x174 #define QSERDES_V2_COM_HSCLK_SEL 0x178 #define QSERDES_V2_COM_INTEGLOOP_BINCODE_STATUS 0x17c