From: Russell King (Oracle) Date: Fri, 5 Dec 2025 15:34:42 +0000 (+0000) Subject: ARM: use BIT() and GENMASK() for fault status register fields X-Git-Tag: v7.1-rc1~8^2~1^2~2 X-Git-Url: http://git.ipfire.org/gitweb/?a=commitdiff_plain;h=5548e8a4663d9decc8215c53e4a41c704f183cbb;p=thirdparty%2Flinux.git ARM: use BIT() and GENMASK() for fault status register fields Modernise the fault status field definitions by using BIT() and GENMASK(). Reviewed-by: Sebastian Andrzej Siewior Signed-off-by: Russell King (Oracle) --- diff --git a/arch/arm/mm/fault.h b/arch/arm/mm/fault.h index e95f44757dc9..d2bdedaefe14 100644 --- a/arch/arm/mm/fault.h +++ b/arch/arm/mm/fault.h @@ -5,12 +5,12 @@ /* * Fault status register encodings. We steal bit 31 for our own purposes. */ -#define FSR_LNX_PF (1 << 31) -#define FSR_CM (1 << 13) -#define FSR_WRITE (1 << 11) -#define FSR_FS4 (1 << 10) -#define FSR_FS3_0 (15) -#define FSR_FS5_0 (0x3f) +#define FSR_LNX_PF BIT(31) +#define FSR_CM BIT(13) +#define FSR_WRITE BIT(11) +#define FSR_FS4 BIT(10) +#define FSR_FS3_0 GENMASK(3, 0) +#define FSR_FS5_0 GENMASK(5, 0) #ifdef CONFIG_ARM_LPAE #define FSR_FS_AEA 17