From: Peng Fan <peng.fan@nxp.com>
Date: Tue, 26 May 2026 08:09:13 +0000 (+0800)
Subject: pci: layerscape: ep: Use dev APIs
X-Git-Url: http://git.ipfire.org/gitweb/?a=commitdiff_plain;h=57abbbcc945079404ba8e3d4a68c991e3cd92a65;p=thirdparty%2Fu-boot.git

pci: layerscape: ep: Use dev APIs

Convert the Layerscape PCIe endpoint driver to use device and ofnode-based
APIs instead of legacy FDT interfaces.

Replace devfdt_get_addr_index_ptr(), fdt_get_named_resource(),
fdtdec_get_bool(), and fdtdec_get_int() with their modern counterparts such
as dev_read_addr_index_ptr(), dev_read_resource_byname(),
dev_read_bool(), and dev_read_s32_default().

Also remove the dependency on gd->fdt_blob and global data access.

No functional changes.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20260526-devfdt-pci-v1-5-ed7f31d73938@nxp.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---

diff --git a/drivers/pci/pcie_layerscape.h b/drivers/pci/pcie_layerscape.h
index d5f4930e181..e6d47241e71 100644
--- a/drivers/pci/pcie_layerscape.h
+++ b/drivers/pci/pcie_layerscape.h
@@ -10,6 +10,7 @@
 
 #include <fdtdec.h>
 #include <pci.h>
+#include <linux/ioport.h>
 #include <linux/sizes.h>
 #include <linux/types.h>
 #include <asm/arch-fsl-layerscape/svr.h>
@@ -164,7 +165,7 @@ struct ls_pcie_rc {
 };
 
 struct ls_pcie_ep {
-	struct fdt_resource addr_res;
+	struct resource addr_res;
 	struct ls_pcie *pcie;
 	struct udevice *bus;
 	void __iomem *addr;
diff --git a/drivers/pci/pcie_layerscape_ep.c b/drivers/pci/pcie_layerscape_ep.c
index 3520488b345..b7809857565 100644
--- a/drivers/pci/pcie_layerscape_ep.c
+++ b/drivers/pci/pcie_layerscape_ep.c
@@ -7,7 +7,6 @@
 #include <config.h>
 #include <asm/arch/fsl_serdes.h>
 #include <dm.h>
-#include <asm/global_data.h>
 #include <dm/devres.h>
 #include <errno.h>
 #include <pci_ep.h>
@@ -16,8 +15,6 @@
 #include <linux/log2.h>
 #include "pcie_layerscape.h"
 
-DECLARE_GLOBAL_DATA_PTR;
-
 static void ls_pcie_ep_enable_cfg(struct ls_pcie_ep *pcie_ep)
 {
 	struct ls_pcie *pcie = pcie_ep->pcie;
@@ -250,17 +247,15 @@ static int ls_pcie_ep_probe(struct udevice *dev)
 
 	pcie_ep->pcie = pcie;
 
-	pcie->dbi = devfdt_get_addr_index_ptr(dev, 0);
+	pcie->dbi = dev_read_addr_index_ptr(dev, 0);
 	if (!pcie->dbi)
 		return -EINVAL;
 
-	pcie->ctrl = devfdt_get_addr_index_ptr(dev, 1);
+	pcie->ctrl = dev_read_addr_index_ptr(dev, 1);
 	if (!pcie->ctrl)
 		return -EINVAL;
 
-	ret = fdt_get_named_resource(gd->fdt_blob, dev_of_offset(dev),
-				     "reg", "reg-names",
-				     "addr_space", &pcie_ep->addr_res);
+	ret = dev_read_resource_byname(dev, "addr_space", &pcie_ep->addr_res);
 	if (ret) {
 		printf("%s: resource \"addr_space\" not found\n", dev->name);
 		return ret;
@@ -273,8 +268,7 @@ static int ls_pcie_ep_probe(struct udevice *dev)
 	if (!is_serdes_configured(PCIE_SRDS_PRTCL(pcie->idx)))
 		return 0;
 
-	pcie->big_endian = fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev),
-					   "big-endian");
+	pcie->big_endian = dev_read_bool(dev, "big-endian");
 
 	svr = SVR_SOC_VER(get_svr());
 
@@ -294,13 +288,9 @@ static int ls_pcie_ep_probe(struct udevice *dev)
 	if (pcie->mode != PCI_HEADER_TYPE_NORMAL)
 		return 0;
 
-	pcie_ep->max_functions = fdtdec_get_int(gd->fdt_blob,
-						dev_of_offset(dev),
-						"max-functions", 1);
-	pcie_ep->num_ib_wins = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
-					      "num-ib-windows", 8);
-	pcie_ep->num_ob_wins = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
-					      "num-ob-windows", 8);
+	pcie_ep->max_functions = dev_read_s32_default(dev, "max-functions", 1);
+	pcie_ep->num_ib_wins = dev_read_s32_default(dev, "num-ib-windows", 8);
+	pcie_ep->num_ob_wins = dev_read_s32_default(dev, "num-ob-windows", 8);
 
 	printf("PCIe%u: %s %s", PCIE_SRDS_PRTCL(pcie->idx), dev->name,
 	       "Endpoint");