From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Tue, 16 Jun 2026 00:15:36 +0000 (+0530)
Subject: Merge tag 'x86_microcode_for_v7.2_rc1' of gitolite.kernel.org:pub/scm/linux/kernel... 
X-Git-Url: http://git.ipfire.org/gitweb/?a=commitdiff_plain;h=97cc7dc16aaee163e15173009c063fc9cd42b5ff;p=thirdparty%2Flinux.git

Merge tag 'x86_microcode_for_v7.2_rc1' of gitolite.kernel.org:pub/scm/linux/kernel/git/tip/tip

Pull x86 microcode loader updates from Borislav Petkov:

 - Move the zero-revision fixup for AMD microcode to the patch level
   retrieval function and restrict it to Zen family processors, ensuring
   patch level arithmetic always operates on a valid revision

 - Fix an incorrect comment about which CPUID bit is checked when
   determining whether the microcode loader should be disabled

 - Add the latest Intel microcode revision data for a broad range of
   processor models and steppings and add the script which generates the
   header of minimum expected Intel microcode revisions

* tag 'x86_microcode_for_v7.2_rc1' of gitolite.kernel.org:pub/scm/linux/kernel/git/tip/tip:
  x86/microcode/AMD: Move the no-revision fixup to get_patch_level()
  x86/microcode: Fix comment in microcode_loader_disabled()
  scripts/x86/intel: Add a script to update the old microcode list
  x86/microcode/intel: Refresh old_microcode defines with Nov 2025 release
---

97cc7dc16aaee163e15173009c063fc9cd42b5ff
diff --cc arch/x86/kernel/cpu/microcode/core.c
index f740b8f764903,68a1a893246c2..0dd0c7241c573
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@@ -119,10 -118,15 +119,10 @@@ bool __init microcode_loader_disabled(v
  	/*
  	 * Disable when:
  	 *
 -	 * 1) The CPU does not support CPUID.
 -	 */
 -	if (!cpuid_feature()) {
 -		dis_ucode_ldr = true;
 -		return dis_ucode_ldr;
 -	}
 -
 -	/*
 +	 * 1) The CPU does not support CPUID, detected below in
 +	 *    load_ucode_bsp().
 +	 *
- 	 * 2) Bit 31 in CPUID[1]:ECX is clear
+ 	 * 2) Bit 31 in CPUID[1]:ECX is set
  	 *    The bit is reserved for hypervisor use. This is still not
  	 *    completely accurate as XEN PV guests don't see that CPUID bit
  	 *    set, but that's good enough as they don't land on the BSP