From: Akhil R Date: Mon, 18 May 2026 11:40:12 +0000 (+0530) Subject: i2c: tegra: Update Tegra410 I2C timing parameters X-Git-Url: http://git.ipfire.org/gitweb/?a=commitdiff_plain;h=97d0a9c6e80903d342656ab8a7743a9ec50c92e1;p=thirdparty%2Fkernel%2Flinux.git i2c: tegra: Update Tegra410 I2C timing parameters Update Tegra410 I2C timing parameters based on hardware characterization results. This adjusts the fast mode and HS mode settings to be compliant with the I2C specification. Fixes: 59717f260183 ("i2c: tegra: Add support for Tegra410") Signed-off-by: Akhil R Reviewed-by: Jon Hunter Signed-off-by: Andi Shyti Link: https://lore.kernel.org/r/20260518114013.62065-4-akhilrajeev@nvidia.com --- diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index 479a1667e88d..efe93c5a7bb8 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c @@ -2115,9 +2115,9 @@ static const struct tegra_i2c_hw_feature tegra264_i2c_hw = { static const struct tegra_i2c_hw_feature tegra410_i2c_hw = { .has_continue_xfer_support = true, .has_per_pkt_xfer_complete_irq = true, - .clk_divisor_hs_mode = 1, + .clk_divisor_hs_mode = 2, .clk_divisor_std_mode = 0x3f, - .clk_divisor_fast_mode = 0x2c, + .clk_divisor_fast_mode = 0x2f, .clk_divisor_fast_plus_mode = 0x11, .has_config_load_reg = true, .has_multi_master_mode = true, @@ -2133,8 +2133,8 @@ static const struct tegra_i2c_hw_feature tegra410_i2c_hw = { .thigh_fast_mode = 0x2, .tlow_fastplus_mode = 0x2, .thigh_fastplus_mode = 0x2, - .tlow_hs_mode = 0x8, - .thigh_hs_mode = 0x6, + .tlow_hs_mode = 0x5, + .thigh_hs_mode = 0x2, .setup_hold_time_std_mode = 0x08080808, .setup_hold_time_fast_mode = 0x02020202, .setup_hold_time_fastplus_mode = 0x02020202,