From: Ronald Claveau Date: Thu, 26 Mar 2026 09:59:14 +0000 (+0100) Subject: arm64: dts: amlogic: t7: Add MMC controller nodes X-Git-Url: http://git.ipfire.org/gitweb/?a=commitdiff_plain;h=bd3454d5087d63dd68145d00bc3034b99e087782;p=thirdparty%2Flinux.git arm64: dts: amlogic: t7: Add MMC controller nodes Add device tree nodes for the three MMC controllers available on the Amlogic T7 SoC, using amlogic,meson-axg-mmc as fallback compatible. All nodes are disabled by default and should be enabled in the board-specific DTS file. Signed-off-by: Ronald Claveau Reviewed-by: Neil Armstrong Link: https://patch.msgid.link/20260326-add-emmc-t7-vim4-v5-3-d3f182b48e9d@aliel.fr Signed-off-by: Neil Armstrong --- diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi index 1a00a65db0c65..d45f360e3d671 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi @@ -645,6 +645,45 @@ reg = <0x0 0x10220 0x0 0x140>; amlogic,has-chip-id; }; + + sd_emmc_a: mmc@88000 { + compatible = "amlogic,t7-mmc", "amlogic,meson-axg-mmc"; + reg = <0x0 0x88000 0x0 0x800>; + interrupts = ; + clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_A>, + <&clkc_periphs CLKID_SD_EMMC_A>, + <&scmi_clk CLKID_FCLK_DIV2>; + clock-names = "core", "clkin0", "clkin1"; + assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_A_SEL>; + assigned-clock-parents = <&xtal>; + status = "disabled"; + }; + + sd_emmc_b: mmc@8a000 { + compatible = "amlogic,t7-mmc", "amlogic,meson-axg-mmc"; + reg = <0x0 0x8a000 0x0 0x800>; + interrupts = ; + clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_B>, + <&clkc_periphs CLKID_SD_EMMC_B>, + <&scmi_clk CLKID_FCLK_DIV2>; + clock-names = "core", "clkin0", "clkin1"; + assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_B_SEL>; + assigned-clock-parents = <&xtal>; + status = "disabled"; + }; + + sd_emmc_c: mmc@8c000 { + compatible = "amlogic,t7-mmc", "amlogic,meson-axg-mmc"; + reg = <0x0 0x8c000 0x0 0x800>; + interrupts = ; + clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_C>, + <&clkc_periphs CLKID_SD_EMMC_C>, + <&scmi_clk CLKID_FCLK_DIV2>; + clock-names = "core", "clkin0", "clkin1"; + assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_C_SEL>; + assigned-clock-parents = <&xtal>; + status = "disabled"; + }; }; };