From: Greg Kroah-Hartman Date: Tue, 2 Apr 2013 19:03:20 +0000 (-0700) Subject: 3.8-stable patches X-Git-Tag: v3.8.6~25 X-Git-Url: http://git.ipfire.org/gitweb/?a=commitdiff_plain;h=f404ed31b59a821d585a35cb9daa9fb7e83c7353;p=thirdparty%2Fkernel%2Fstable-queue.git 3.8-stable patches added patches: arm-cns3xxx-fix-mapping-of-private-memory-region.patch arm-imx-fix-sync-issue-between-imx_cpu_die-and-imx_cpu_kill.patch arm-kirkwood-fix-chip-delay-for-goflex-net.patch arm-omap-clocks-delay-clk-inits-atleast-until-slab-is-initialized.patch nfsd4-reject-negative-acl-lengths.patch virtio-console-add-locking-around-c_ovq-operations.patch virtio-console-rename-cvq_lock-to-c_ivq_lock.patch --- diff --git a/queue-3.8/arm-cns3xxx-fix-mapping-of-private-memory-region.patch b/queue-3.8/arm-cns3xxx-fix-mapping-of-private-memory-region.patch new file mode 100644 index 00000000000..c2599cdcbe1 --- /dev/null +++ b/queue-3.8/arm-cns3xxx-fix-mapping-of-private-memory-region.patch @@ -0,0 +1,105 @@ +From a3d9052c6296ad3398d3ad649c3c682c3e7ecfa6 Mon Sep 17 00:00:00 2001 +From: Mac Lin +Date: Mon, 25 Mar 2013 17:23:33 +0800 +Subject: ARM: cns3xxx: fix mapping of private memory region + +From: Mac Lin + +commit a3d9052c6296ad3398d3ad649c3c682c3e7ecfa6 upstream. + +Since commit 0536bdf33faf (ARM: move iotable mappings within the vmalloc +region), the Cavium CNS3xxx cannot boot anymore. + +This is caused by the pre-defined iotable mappings is not in the vmalloc +region. This patch move the iotable mappings into the vmalloc region, and +merge the MPCore private memory region (containing the SCU, the GIC and +the TWD) as a single region. + +Signed-off-by: Mac Lin +Signed-off-by: Anton Vorontsov +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/mach-cns3xxx/core.c | 16 +++------------- + arch/arm/mach-cns3xxx/include/mach/cns3xxx.h | 16 ++++++++-------- + 2 files changed, 11 insertions(+), 21 deletions(-) + +--- a/arch/arm/mach-cns3xxx/core.c ++++ b/arch/arm/mach-cns3xxx/core.c +@@ -22,19 +22,9 @@ + + static struct map_desc cns3xxx_io_desc[] __initdata = { + { +- .virtual = CNS3XXX_TC11MP_TWD_BASE_VIRT, +- .pfn = __phys_to_pfn(CNS3XXX_TC11MP_TWD_BASE), +- .length = SZ_4K, +- .type = MT_DEVICE, +- }, { +- .virtual = CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT, +- .pfn = __phys_to_pfn(CNS3XXX_TC11MP_GIC_CPU_BASE), +- .length = SZ_4K, +- .type = MT_DEVICE, +- }, { +- .virtual = CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT, +- .pfn = __phys_to_pfn(CNS3XXX_TC11MP_GIC_DIST_BASE), +- .length = SZ_4K, ++ .virtual = CNS3XXX_TC11MP_SCU_BASE_VIRT, ++ .pfn = __phys_to_pfn(CNS3XXX_TC11MP_SCU_BASE), ++ .length = SZ_8K, + .type = MT_DEVICE, + }, { + .virtual = CNS3XXX_TIMER1_2_3_BASE_VIRT, +--- a/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h ++++ b/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h +@@ -94,10 +94,10 @@ + #define RTC_INTR_STS_OFFSET 0x34 + + #define CNS3XXX_MISC_BASE 0x76000000 /* Misc Control */ +-#define CNS3XXX_MISC_BASE_VIRT 0xFFF07000 /* Misc Control */ ++#define CNS3XXX_MISC_BASE_VIRT 0xFB000000 /* Misc Control */ + + #define CNS3XXX_PM_BASE 0x77000000 /* Power Management Control */ +-#define CNS3XXX_PM_BASE_VIRT 0xFFF08000 ++#define CNS3XXX_PM_BASE_VIRT 0xFB001000 + + #define PM_CLK_GATE_OFFSET 0x00 + #define PM_SOFT_RST_OFFSET 0x04 +@@ -109,7 +109,7 @@ + #define PM_PLL_HM_PD_OFFSET 0x1C + + #define CNS3XXX_UART0_BASE 0x78000000 /* UART 0 */ +-#define CNS3XXX_UART0_BASE_VIRT 0xFFF09000 ++#define CNS3XXX_UART0_BASE_VIRT 0xFB002000 + + #define CNS3XXX_UART1_BASE 0x78400000 /* UART 1 */ + #define CNS3XXX_UART1_BASE_VIRT 0xFFF0A000 +@@ -130,7 +130,7 @@ + #define CNS3XXX_I2S_BASE_VIRT 0xFFF10000 + + #define CNS3XXX_TIMER1_2_3_BASE 0x7C800000 /* Timer */ +-#define CNS3XXX_TIMER1_2_3_BASE_VIRT 0xFFF10800 ++#define CNS3XXX_TIMER1_2_3_BASE_VIRT 0xFB003000 + + #define TIMER1_COUNTER_OFFSET 0x00 + #define TIMER1_AUTO_RELOAD_OFFSET 0x04 +@@ -227,16 +227,16 @@ + * Testchip peripheral and fpga gic regions + */ + #define CNS3XXX_TC11MP_SCU_BASE 0x90000000 /* IRQ, Test chip */ +-#define CNS3XXX_TC11MP_SCU_BASE_VIRT 0xFF000000 ++#define CNS3XXX_TC11MP_SCU_BASE_VIRT 0xFB004000 + + #define CNS3XXX_TC11MP_GIC_CPU_BASE 0x90000100 /* Test chip interrupt controller CPU interface */ +-#define CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT 0xFF000100 ++#define CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT (CNS3XXX_TC11MP_SCU_BASE_VIRT + 0x100) + + #define CNS3XXX_TC11MP_TWD_BASE 0x90000600 +-#define CNS3XXX_TC11MP_TWD_BASE_VIRT 0xFF000600 ++#define CNS3XXX_TC11MP_TWD_BASE_VIRT (CNS3XXX_TC11MP_SCU_BASE_VIRT + 0x600) + + #define CNS3XXX_TC11MP_GIC_DIST_BASE 0x90001000 /* Test chip interrupt controller distributor */ +-#define CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT 0xFF001000 ++#define CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT (CNS3XXX_TC11MP_SCU_BASE_VIRT + 0x1000) + + #define CNS3XXX_TC11MP_L220_BASE 0x92002000 /* L220 registers */ + #define CNS3XXX_TC11MP_L220_BASE_VIRT 0xFF002000 diff --git a/queue-3.8/arm-imx-fix-sync-issue-between-imx_cpu_die-and-imx_cpu_kill.patch b/queue-3.8/arm-imx-fix-sync-issue-between-imx_cpu_die-and-imx_cpu_kill.patch new file mode 100644 index 00000000000..c9f6d0b821a --- /dev/null +++ b/queue-3.8/arm-imx-fix-sync-issue-between-imx_cpu_die-and-imx_cpu_kill.patch @@ -0,0 +1,86 @@ +From 2f3edfd7e27ad4206acbc2ae99c9df5f46353024 Mon Sep 17 00:00:00 2001 +From: Shawn Guo +Date: Tue, 26 Mar 2013 16:46:07 +0800 +Subject: ARM: imx: fix sync issue between imx_cpu_die and imx_cpu_kill + +From: Shawn Guo + +commit 2f3edfd7e27ad4206acbc2ae99c9df5f46353024 upstream. + +There is a sync issue with hotplug operation. It's possible that when +imx_cpu_kill gets running on primary core, the imx_cpu_die execution +on the core which is to be killed hasn't been finished yet. The problem +will very likely be hit when running suspend without no_console_suspend +setting on kernel cmdline. + +It uses cpu jumping argument register to sync imx_cpu_die and +imx_cpu_kill. The register will be set in imx_cpu_die and imx_cpu_kill +will wait for the register being cleared to actually kill the cpu. + +Signed-off-by: Shawn Guo +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/mach-imx/common.h | 2 ++ + arch/arm/mach-imx/hotplug.c | 12 ++++++++++++ + arch/arm/mach-imx/src.c | 12 ++++++++++++ + 3 files changed, 26 insertions(+) + +--- a/arch/arm/mach-imx/common.h ++++ b/arch/arm/mach-imx/common.h +@@ -116,6 +116,8 @@ void tzic_handle_irq(struct pt_regs *); + + extern void imx_enable_cpu(int cpu, bool enable); + extern void imx_set_cpu_jump(int cpu, void *jump_addr); ++extern u32 imx_get_cpu_arg(int cpu); ++extern void imx_set_cpu_arg(int cpu, u32 arg); + #ifdef CONFIG_DEBUG_LL + extern void imx_lluart_map_io(void); + #else +--- a/arch/arm/mach-imx/hotplug.c ++++ b/arch/arm/mach-imx/hotplug.c +@@ -46,11 +46,23 @@ static inline void cpu_enter_lowpower(vo + void imx_cpu_die(unsigned int cpu) + { + cpu_enter_lowpower(); ++ /* ++ * We use the cpu jumping argument register to sync with ++ * imx_cpu_kill() which is running on cpu0 and waiting for ++ * the register being cleared to kill the cpu. ++ */ ++ imx_set_cpu_arg(cpu, ~0); + cpu_do_idle(); + } + + int imx_cpu_kill(unsigned int cpu) + { ++ unsigned long timeout = jiffies + msecs_to_jiffies(50); ++ ++ while (imx_get_cpu_arg(cpu) == 0) ++ if (time_after(jiffies, timeout)) ++ return 0; + imx_enable_cpu(cpu, false); ++ imx_set_cpu_arg(cpu, 0); + return 1; + } +--- a/arch/arm/mach-imx/src.c ++++ b/arch/arm/mach-imx/src.c +@@ -43,6 +43,18 @@ void imx_set_cpu_jump(int cpu, void *jum + src_base + SRC_GPR1 + cpu * 8); + } + ++u32 imx_get_cpu_arg(int cpu) ++{ ++ cpu = cpu_logical_map(cpu); ++ return readl_relaxed(src_base + SRC_GPR1 + cpu * 8 + 4); ++} ++ ++void imx_set_cpu_arg(int cpu, u32 arg) ++{ ++ cpu = cpu_logical_map(cpu); ++ writel_relaxed(arg, src_base + SRC_GPR1 + cpu * 8 + 4); ++} ++ + void imx_src_prepare_restart(void) + { + u32 val; diff --git a/queue-3.8/arm-kirkwood-fix-chip-delay-for-goflex-net.patch b/queue-3.8/arm-kirkwood-fix-chip-delay-for-goflex-net.patch new file mode 100644 index 00000000000..6450ed4ce53 --- /dev/null +++ b/queue-3.8/arm-kirkwood-fix-chip-delay-for-goflex-net.patch @@ -0,0 +1,33 @@ +From 2992714d431976c4b154875bd18ba61bf4df3b93 Mon Sep 17 00:00:00 2001 +From: Eric Hutter +Date: Mon, 18 Mar 2013 19:48:56 +0100 +Subject: ARM: kirkwood: Fix chip-delay for GoFlex Net + +From: Eric Hutter + +commit 2992714d431976c4b154875bd18ba61bf4df3b93 upstream. + +This fixes "Too few good blocks within range" issues on GoFlex Net by setting +chip-delay to 40. + +The basic problem was discussed at http://forum.doozan.com/read.php?2,7451 + +Signed-off-by: Eric Hutter +Acked-by: Andrew Lunn +Signed-off-by: Jason Cooper +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/boot/dts/kirkwood-goflexnet.dts | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/arm/boot/dts/kirkwood-goflexnet.dts ++++ b/arch/arm/boot/dts/kirkwood-goflexnet.dts +@@ -77,6 +77,7 @@ + }; + + nand@3000000 { ++ chip-delay = <40>; + status = "okay"; + + partition@0 { diff --git a/queue-3.8/arm-omap-clocks-delay-clk-inits-atleast-until-slab-is-initialized.patch b/queue-3.8/arm-omap-clocks-delay-clk-inits-atleast-until-slab-is-initialized.patch new file mode 100644 index 00000000000..1159bbd0a54 --- /dev/null +++ b/queue-3.8/arm-omap-clocks-delay-clk-inits-atleast-until-slab-is-initialized.patch @@ -0,0 +1,190 @@ +From ff931c821bab6713a52b768b0cd7ee7e90713b36 Mon Sep 17 00:00:00 2001 +From: Rajendra Nayak +Date: Thu, 21 Mar 2013 16:34:52 +0530 +Subject: ARM: OMAP: clocks: Delay clk inits atleast until slab is initialized + +From: Rajendra Nayak + +commit ff931c821bab6713a52b768b0cd7ee7e90713b36 upstream. + +clk inits on OMAP happen quite early, even before slab is available. +The dependency comes from the fact that the timer init code starts to +use clocks and hwmod and we need clocks to be initialized by then. + +There are various problems doing clk inits this early, one is, +not being able to do dynamic clk registrations and hence the +dependency on clk-private.h. The other is, inability to debug +early kernel crashes without enabling DEBUG_LL and earlyprintk. + +Doing early clk init also exposed another instance of a kernel +panic due to a BUG() when CONFIG_DEBUG_SLAB is enabled. + +[ 0.000000] Kernel BUG at c01174f8 [verbose debug info unavailable] +[ 0.000000] Internal error: Oops - BUG: 0 [#1] SMP ARM +[ 0.000000] Modules linked in: +[ 0.000000] CPU: 0 Not tainted (3.9.0-rc1-12179-g72d48f9 #6) +[ 0.000000] PC is at __kmalloc+0x1d4/0x248 +[ 0.000000] LR is at __clk_init+0x2e0/0x364 +[ 0.000000] pc : [] lr : [] psr: 600001d3 +[ 0.000000] sp : c076ff28 ip : c065cefc fp : c0441f54 +[ 0.000000] r10: 0000001c r9 : 000080d0 r8 : c076ffd4 +[ 0.000000] r7 : c074b578 r6 : c0794d88 r5 : 00000040 r4 : 00000000 +[ 0.000000] r3 : 00000000 r2 : c07cac70 r1 : 000080d0 r0 : 0000001c +[ 0.000000] Flags: nZCv IRQs off FIQs off Mode SVC_32 ISA ARM Segment kernel +[ 0.000000] Control: 10c53c7d Table: 8000404a DAC: 00000017 +[ 0.000000] Process swapper (pid: 0, stack limit = 0xc076e240) +[ 0.000000] Stack: (0xc076ff28 to 0xc0770000) +[ 0.000000] ff20: 22222222 c0794ec8 c06546e8 00000000 00000040 c0794d88 +[ 0.000000] ff40: c074b578 c076ffd4 c07951c8 c076e000 00000000 c0441f54 c074b578 c076ffd4 +[ 0.000000] ff60: c0793828 00000040 c0794d88 c074b578 c076ffd4 c0776900 c076e000 c07272ac +[ 0.000000] ff80: 2f800000 c074c968 c07f93d0 c0719780 c076ffa0 c076ff98 00000000 00000000 +[ 0.000000] ffa0: 00000000 00000000 00000000 00000001 c074cd6c c077b1ec 8000406a c0715724 +[ 0.000000] ffc0: 00000000 00000000 00000000 00000000 00000000 c074c968 10c53c7d c0776974 +[ 0.000000] ffe0: c074cd6c c077b1ec 8000406a 411fc092 00000000 80008074 00000000 00000000 +[ 0.000000] [] (__kmalloc+0x1d4/0x248) from [] (__clk_init+0x2e0/0x364) +[ 0.000000] [] (__clk_init+0x2e0/0x364) from [] (omap4xxx_clk_init+0xbc/0x140) +[ 0.000000] [] (omap4xxx_clk_init+0xbc/0x140) from [] (setup_arch+0x15c/0x284) +[ 0.000000] [] (setup_arch+0x15c/0x284) from [] (start_kernel+0x7c/0x334) +[ 0.000000] [] (start_kernel+0x7c/0x334) from [<80008074>] (0x80008074) +[ 0.000000] Code: e5883004 e1a00006 e28dd00c e8bd8ff0 (e7f001f2) +[ 0.000000] ---[ end trace 1b75b31a2719ed1c ]--- +[ 0.000000] Kernel panic - not syncing: Attempted to kill the idle task! + +It was a know issue, that slab allocations would fail when common +clock core tries to cache parent pointers for mux clocks on OMAP, +and hence a patch 'clk: Allow late cache allocation for clk->parents, +commit 7975059d' was added to work this problem around. +A BUG() within kmalloc() with CONFIG_DEBUG_SLAB enabled was completely +overlooked causing this regression. + +More details on the issue reported can be found here, +http://www.mail-archive.com/linux-omap@vger.kernel.org/msg85932.html + +With all these issues around clk inits happening way too early, it +makes sense to at least move them to a point where dynamic memory +allocations are possible. So move them to a point just before the +timer code starts using clocks and hwmod. + +This should at least pave way for clk inits on OMAP moving to dynamic +clock registrations instead of using the static macros defined in +clk-private.h. + +The issue with kernel panic while CONFIG_DEBUG_SLAB is enabled +was reported by Piotr Haber and Tony Lindgren and this patch +fixes the reported issue as well. + +Reported-by: Piotr Haber +Reported-by: Tony Lindgren +Signed-off-by: Rajendra Nayak +Acked-by: Santosh Shilimkar +Reviewed-by: Mike Turquette +Acked-by: Paul Walmsley +Signed-off-by: Tony Lindgren +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/mach-omap2/common.h | 3 +++ + arch/arm/mach-omap2/io.c | 18 ++++++++++++------ + arch/arm/mach-omap2/timer.c | 4 ++++ + 3 files changed, 19 insertions(+), 6 deletions(-) + +--- a/arch/arm/mach-omap2/common.h ++++ b/arch/arm/mach-omap2/common.h +@@ -286,5 +286,8 @@ extern void omap_reserve(void); + struct omap_hwmod; + extern int omap_dss_reset(struct omap_hwmod *); + ++/* SoC specific clock initializer */ ++extern int (*omap_clk_init)(void); ++ + #endif /* __ASSEMBLER__ */ + #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */ +--- a/arch/arm/mach-omap2/io.c ++++ b/arch/arm/mach-omap2/io.c +@@ -55,6 +55,12 @@ + #include "prm44xx.h" + + /* ++ * omap_clk_init: points to a function that does the SoC-specific ++ * clock initializations ++ */ ++int (*omap_clk_init)(void); ++ ++/* + * The machine specific code may provide the extra mapping besides the + * default mapping provided here. + */ +@@ -397,7 +403,7 @@ void __init omap2420_init_early(void) + omap242x_clockdomains_init(); + omap2420_hwmod_init(); + omap_hwmod_init_postsetup(); +- omap2420_clk_init(); ++ omap_clk_init = omap2420_clk_init; + } + + void __init omap2420_init_late(void) +@@ -427,7 +433,7 @@ void __init omap2430_init_early(void) + omap243x_clockdomains_init(); + omap2430_hwmod_init(); + omap_hwmod_init_postsetup(); +- omap2430_clk_init(); ++ omap_clk_init = omap2430_clk_init; + } + + void __init omap2430_init_late(void) +@@ -462,7 +468,7 @@ void __init omap3_init_early(void) + omap3xxx_clockdomains_init(); + omap3xxx_hwmod_init(); + omap_hwmod_init_postsetup(); +- omap3xxx_clk_init(); ++ omap_clk_init = omap3xxx_clk_init; + } + + void __init omap3430_init_early(void) +@@ -500,7 +506,7 @@ void __init ti81xx_init_early(void) + omap3xxx_clockdomains_init(); + omap3xxx_hwmod_init(); + omap_hwmod_init_postsetup(); +- omap3xxx_clk_init(); ++ omap_clk_init = omap3xxx_clk_init; + } + + void __init omap3_init_late(void) +@@ -568,7 +574,7 @@ void __init am33xx_init_early(void) + am33xx_clockdomains_init(); + am33xx_hwmod_init(); + omap_hwmod_init_postsetup(); +- am33xx_clk_init(); ++ omap_clk_init = am33xx_clk_init; + } + #endif + +@@ -593,7 +599,7 @@ void __init omap4430_init_early(void) + omap44xx_clockdomains_init(); + omap44xx_hwmod_init(); + omap_hwmod_init_postsetup(); +- omap4xxx_clk_init(); ++ omap_clk_init = omap4xxx_clk_init; + } + + void __init omap4430_init_late(void) +--- a/arch/arm/mach-omap2/timer.c ++++ b/arch/arm/mach-omap2/timer.c +@@ -554,6 +554,8 @@ static inline void __init realtime_count + clksrc_nr, clksrc_src) \ + static void __init omap##name##_gptimer_timer_init(void) \ + { \ ++ if (omap_clk_init) \ ++ omap_clk_init(); \ + omap_dmtimer_init(); \ + omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop); \ + omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src); \ +@@ -563,6 +565,8 @@ static void __init omap##name##_gptimer_ + clksrc_nr, clksrc_src) \ + static void __init omap##name##_sync32k_timer_init(void) \ + { \ ++ if (omap_clk_init) \ ++ omap_clk_init(); \ + omap_dmtimer_init(); \ + omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop); \ + /* Enable the use of clocksource="gp_timer" kernel parameter */ \ diff --git a/queue-3.8/nfsd4-reject-negative-acl-lengths.patch b/queue-3.8/nfsd4-reject-negative-acl-lengths.patch new file mode 100644 index 00000000000..4af5ce5165e --- /dev/null +++ b/queue-3.8/nfsd4-reject-negative-acl-lengths.patch @@ -0,0 +1,34 @@ +From 64a817cfbded8674f345d1117b117f942a351a69 Mon Sep 17 00:00:00 2001 +From: "J. Bruce Fields" +Date: Tue, 26 Mar 2013 14:11:13 -0400 +Subject: nfsd4: reject "negative" acl lengths + +From: "J. Bruce Fields" + +commit 64a817cfbded8674f345d1117b117f942a351a69 upstream. + +Since we only enforce an upper bound, not a lower bound, a "negative" +length can get through here. + +The symptom seen was a warning when we attempt to a kmalloc with an +excessive size. + +Reported-by: Toralf Förster +Signed-off-by: J. Bruce Fields +Signed-off-by: Greg Kroah-Hartman + +--- + fs/nfsd/nfs4xdr.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/fs/nfsd/nfs4xdr.c ++++ b/fs/nfsd/nfs4xdr.c +@@ -264,7 +264,7 @@ nfsd4_decode_fattr(struct nfsd4_compound + iattr->ia_valid |= ATTR_SIZE; + } + if (bmval[0] & FATTR4_WORD0_ACL) { +- int nace; ++ u32 nace; + struct nfs4_ace *ace; + + READ_BUF(4); len += 4; diff --git a/queue-3.8/series b/queue-3.8/series index 58300f7f40a..de4150ac65d 100644 --- a/queue-3.8/series +++ b/queue-3.8/series @@ -78,3 +78,10 @@ usb-gadget-udc-core-fix-a-regression-during-gadget-driver-unbinding.patch signal-define-__arch_has_sa_restorer-so-we-know-whether-to-clear-3.8.patch kernel-signal.c-use-__arch_has_sa_restorer-instead-of-sa_restorer.patch loop-prevent-bdev-freeing-while-device-in-use.patch +arm-cns3xxx-fix-mapping-of-private-memory-region.patch +arm-imx-fix-sync-issue-between-imx_cpu_die-and-imx_cpu_kill.patch +arm-kirkwood-fix-chip-delay-for-goflex-net.patch +arm-omap-clocks-delay-clk-inits-atleast-until-slab-is-initialized.patch +virtio-console-rename-cvq_lock-to-c_ivq_lock.patch +virtio-console-add-locking-around-c_ovq-operations.patch +nfsd4-reject-negative-acl-lengths.patch diff --git a/queue-3.8/virtio-console-add-locking-around-c_ovq-operations.patch b/queue-3.8/virtio-console-add-locking-around-c_ovq-operations.patch new file mode 100644 index 00000000000..23495330407 --- /dev/null +++ b/queue-3.8/virtio-console-add-locking-around-c_ovq-operations.patch @@ -0,0 +1,73 @@ +From 9ba5c80b1aea8648a3efe5f22dc1f7cacdfbeeb8 Mon Sep 17 00:00:00 2001 +From: Amit Shah +Date: Fri, 29 Mar 2013 16:30:08 +0530 +Subject: virtio: console: add locking around c_ovq operations + +From: Amit Shah + +commit 9ba5c80b1aea8648a3efe5f22dc1f7cacdfbeeb8 upstream. + +When multiple ovq operations are being performed (lots of open/close +operations on virtio_console fds), the __send_control_msg() function can +get confused without locking. + +A simple recipe to cause badness is: +* create a QEMU VM with two virtio-serial ports +* in the guest, do + while true;do echo abc >/dev/vport0p1;done + while true;do echo edf >/dev/vport0p2;done + +In one run, this caused a panic in __send_control_msg(). In another, I +got + + virtio_console virtio0: control-o:id 0 is not a head! + +This also results repeated messages similar to these on the host: + + qemu-kvm: virtio-serial-bus: Unexpected port id 478762112 for device virtio-serial-bus.0 + qemu-kvm: virtio-serial-bus: Unexpected port id 478762368 for device virtio-serial-bus.0 + +Reported-by: FuXiangChun +Signed-off-by: Amit Shah +Reviewed-by: Wanlong Gao +Reviewed-by: Asias He +Signed-off-by: Rusty Russell +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/char/virtio_console.c | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/drivers/char/virtio_console.c ++++ b/drivers/char/virtio_console.c +@@ -153,6 +153,7 @@ struct ports_device { + + /* To protect the vq operations for the control channel */ + spinlock_t c_ivq_lock; ++ spinlock_t c_ovq_lock; + + /* The current config space is stored here */ + struct virtio_console_config config; +@@ -575,11 +576,14 @@ static ssize_t __send_control_msg(struct + vq = portdev->c_ovq; + + sg_init_one(sg, &cpkt, sizeof(cpkt)); ++ ++ spin_lock(&portdev->c_ovq_lock); + if (virtqueue_add_buf(vq, sg, 1, 0, &cpkt, GFP_ATOMIC) == 0) { + virtqueue_kick(vq); + while (!virtqueue_get_buf(vq, &len)) + cpu_relax(); + } ++ spin_unlock(&portdev->c_ovq_lock); + return 0; + } + +@@ -1997,6 +2001,7 @@ static int virtcons_probe(struct virtio_ + unsigned int nr_added_bufs; + + spin_lock_init(&portdev->c_ivq_lock); ++ spin_lock_init(&portdev->c_ovq_lock); + INIT_WORK(&portdev->control_work, &control_work_handler); + + nr_added_bufs = fill_queue(portdev->c_ivq, diff --git a/queue-3.8/virtio-console-rename-cvq_lock-to-c_ivq_lock.patch b/queue-3.8/virtio-console-rename-cvq_lock-to-c_ivq_lock.patch new file mode 100644 index 00000000000..91b03f8f703 --- /dev/null +++ b/queue-3.8/virtio-console-rename-cvq_lock-to-c_ivq_lock.patch @@ -0,0 +1,87 @@ +From 165b1b8bbc17c9469b053bab78b11b7cbce6d161 Mon Sep 17 00:00:00 2001 +From: Amit Shah +Date: Fri, 29 Mar 2013 16:30:07 +0530 +Subject: virtio: console: rename cvq_lock to c_ivq_lock + +From: Amit Shah + +commit 165b1b8bbc17c9469b053bab78b11b7cbce6d161 upstream. + +The cvq_lock was taken for the c_ivq. Rename the lock to make that +obvious. + +We'll also add a lock around the c_ovq in the next commit, so there's no +ambiguity. + +Signed-off-by: Amit Shah +Reviewed-by: Asias He +Reviewed-by: Wanlong Gao +Signed-off-by: Rusty Russell +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/char/virtio_console.c | 17 +++++++++-------- + 1 file changed, 9 insertions(+), 8 deletions(-) + +--- a/drivers/char/virtio_console.c ++++ b/drivers/char/virtio_console.c +@@ -152,7 +152,7 @@ struct ports_device { + spinlock_t ports_lock; + + /* To protect the vq operations for the control channel */ +- spinlock_t cvq_lock; ++ spinlock_t c_ivq_lock; + + /* The current config space is stored here */ + struct virtio_console_config config; +@@ -1715,23 +1715,23 @@ static void control_work_handler(struct + portdev = container_of(work, struct ports_device, control_work); + vq = portdev->c_ivq; + +- spin_lock(&portdev->cvq_lock); ++ spin_lock(&portdev->c_ivq_lock); + while ((buf = virtqueue_get_buf(vq, &len))) { +- spin_unlock(&portdev->cvq_lock); ++ spin_unlock(&portdev->c_ivq_lock); + + buf->len = len; + buf->offset = 0; + + handle_control_message(portdev, buf); + +- spin_lock(&portdev->cvq_lock); ++ spin_lock(&portdev->c_ivq_lock); + if (add_inbuf(portdev->c_ivq, buf) < 0) { + dev_warn(&portdev->vdev->dev, + "Error adding buffer to queue\n"); + free_buf(buf, false); + } + } +- spin_unlock(&portdev->cvq_lock); ++ spin_unlock(&portdev->c_ivq_lock); + } + + static void out_intr(struct virtqueue *vq) +@@ -1996,10 +1996,11 @@ static int virtcons_probe(struct virtio_ + if (multiport) { + unsigned int nr_added_bufs; + +- spin_lock_init(&portdev->cvq_lock); ++ spin_lock_init(&portdev->c_ivq_lock); + INIT_WORK(&portdev->control_work, &control_work_handler); + +- nr_added_bufs = fill_queue(portdev->c_ivq, &portdev->cvq_lock); ++ nr_added_bufs = fill_queue(portdev->c_ivq, ++ &portdev->c_ivq_lock); + if (!nr_added_bufs) { + dev_err(&vdev->dev, + "Error allocating buffers for control queue\n"); +@@ -2150,7 +2151,7 @@ static int virtcons_restore(struct virti + return ret; + + if (use_multiport(portdev)) +- fill_queue(portdev->c_ivq, &portdev->cvq_lock); ++ fill_queue(portdev->c_ivq, &portdev->c_ivq_lock); + + list_for_each_entry(port, &portdev->ports, list) { + port->in_vq = portdev->in_vqs[port->id];