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20 months agoMerge tag 'renesas-dts-for-v6.12-tag2' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Thu, 5 Sep 2024 10:13:40 +0000 (10:13 +0000)] 
Merge tag 'renesas-dts-for-v6.12-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DTS updates for v6.12 (take two)

  - Add support for Ethernet TSN and PCIe on the R-Car V4H SoC and the
    White-Hawk (Single) development board,
  - Add display support for the RZ/G2UL SoC and the RZ/G2UL SMARC EVk
    board,
  - Add I2C support for the RZ/G3S SoC and the RZ/G3S SMARC EVK board,
  - Add support for HDMI audio on the RZ/G2L and RZ/G2LC SMARC EVK
    boards,
  - Add initial support for the RZ/V2H(P) (R9A09G057) SoC and the RZ/V2H
    EVK board,
  - Miscellaneous fixes and improvements.

* tag 'renesas-dts-for-v6.12-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (34 commits)
  arm64: dts: renesas: r8a779h0: Add family fallback for CSISP IP
  arm64: dts: renesas: r8a779a0: Add family fallback for CSISP IP
  arm64: dts: renesas: r8a779g0: Add family fallback for CSISP IP
  arm64: dts: renesas: r8a779h0: Add family fallback for VIN IP
  arm64: dts: renesas: r8a779a0: Add family fallback for VIN IP
  arm64: dts: renesas: r8a779g0: Add family fallback for VIN IP
  arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable watchdog
  arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable OSTM, I2C, and SDHI
  arm64: dts: renesas: r9a09g057: Add WDT0-WDT3 nodes
  arm64: dts: renesas: r9a09g057: Add SDHI0-SDHI2 nodes
  arm64: dts: renesas: r9a09g057: Add RIIC0-RIIC8 nodes
  arm64: dts: renesas: r9a09g057: Add OSTM0-OSTM7 nodes
  arm64: dts: renesas: Add initial DTS for RZ/V2H EVK board
  arm64: dts: renesas: Add initial SoC DTSI for RZ/V2H(P) SoC
  dt-bindings: soc: renesas: Document RZ/V2H EVK board
  dt-bindings: clock: renesas: Document RZ/V2H(P) SoC CPG
  arm64: dts: renesas: r9a07g043u11-smarc: Enable DU
  arm64: dts: renesas: rzg2lc-smarc: Enable HDMI audio
  arm64: dts: renesas: rzg2l-smarc: Enable HDMI audio
  arm64: dts: renesas: r9a07g043u: Add DU node
  ...

Link: https://lore.kernel.org/r/cover.1725374275.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
20 months agoMerge tag 'v6.12-rockchip-dts32-1' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Tue, 3 Sep 2024 10:40:27 +0000 (10:40 +0000)] 
Merge tag 'v6.12-rockchip-dts32-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt

spidev on the elgin-r1 got a real compatible, the rk3128 could enable its
VPU for video decoding and the rk3128 sfc node can use the clock constant
now after the merge-window.

* tag 'v6.12-rockchip-dts32-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: Do not describe unexisting DAC device on rv1108-elgin-r1
  ARM: dts: rockchip: Add vpu nodes for RK3128
  ARM: dts: rockchip: use constant for HCLK_SFC on rk3128

Link: https://lore.kernel.org/r/3405397.RL5eaSpR8r@diego
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
20 months agoMerge tag 'v6.12-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Tue, 3 Sep 2024 10:38:36 +0000 (10:38 +0000)] 
Merge tag 'v6.12-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt

New boards: Firefly PX30 Core SoM with JD4 baseboard, NanoPi 2S Plus,
Taishan Pi RK3566, ODROID-M1S,NanoPC-T6 LTS, Cool Pi CM5 GenBook

Big number of improvements for NanoPC-T6,QNAP-TS433 and FastRhino R66S
With recent dtc changes making it into linux-next the Wolfvision Visualizer
overlay finally compiles without warnings. And smaller number of
improvements on a number of Radxa boards.

Interesting new additions on a soc-level are the hardware RNG on rk3568,
an additional sdmmc-controller (not supported before) on rk3328 and
v4l video codecs for the rk3588 (decoding of h.264 amongst others).

* tag 'v6.12-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (62 commits)
  arm64: dts: rockchip: drop unsupported regulator-property from NanoPC-T6
  arm64: dts: rockchip: drop unsupported regulator property from NanoPC-T6
  arm64: dts: rockchip: use correct fcs,suspend-voltage-selector on NanoPC-T6
  arm64: dts: rockchip: add Mask Rom key on NanoPC-T6
  arm64: dts: rockchip: enable USB-C on NanoPC-T6
  arm64: dts: rockchip: enable GPU on NanoPC-T6
  arm64: dts: rockchip: add IR-receiver to NanoPC-T6
  arm64: dts: rockchip: add SPI flash on NanoPC-T6
  arm64: dts: rockchip: add NanoPC-T6 LTS
  arm64: dts: rockchip: move NanoPC-T6 parts to DTS
  arm64: dts: rockchip: prepare NanoPC-T6 for LTS board
  dt-bindings: arm: rockchip: Add NanoPC-T6 LTS
  arm64: dts: rockchip: disable display subsystem only for Radxa E25
  arm64: dts: rockchip: enable PCIe on M.2 E key for Radxa ROCK 5A
  arm64: dts: rockchip: remove unnecessary properties for Radxa ROCK 5A
  arm64: dts: rockchip: add dts for LCKFB Taishan Pi RK3566
  dt-bindings: arm: rockchip: Add LCKFB Taishan Pi RK3566
  dt-bindings: vendor-prefixes: Add Shenzhen JLC Technology Group LCKFB
  arm64: dts: rockchip: Add Hardkernel ODROID-M1S
  dt-bindings: arm: rockchip: Add Hardkernel ODROID-M1S
  ...

Link: https://lore.kernel.org/r/6322098.17fYzF0512@diego
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
20 months agoMerge tag 'at91-dt-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/at91...
Arnd Bergmann [Tue, 3 Sep 2024 10:36:57 +0000 (10:36 +0000)] 
Merge tag 'at91-dt-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt

Microchip AT91 device tree updates for v6.12

It contains:
- SAMA7G5-EK DTS was updated with EEPROM nodes containing Ethernet
  addresses (needed, at least, when U-Boot is removed from the booting
  chain)
- 5V supplies were added to to MCP16502 PMIC nodes for better hardware
  description
- cleanups around pinctrl nodes which removed many dtbs_check warnings;
  along with it the pinctrl documentation was converted to json schema
- fixes for the RTC and RTT supply clocks on SAMA7G5 and SAM9X60
- other cleanups to fix dtbs_check warnings

* tag 'at91-dt-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: microchip: sama7g5: Fix RTT clock
  ARM: dts: microchip: sam9x60: Fix rtc/rtt clocks
  dt-bindings: pinctrl: Convert Atmel PIO3 pinctrl to json-schema
  ARM: dts: microchip: sam9x60: Remove additional compatible string from GPIO node
  ARM: dts: microchip: Remove additional compatible string from PIO3 pinctrl nodes
  ARM: dts: microchip: change to simple-mfd from simple-bus for PIO3 pinumux controller
  ARM: dts: microchip: sama5d29_curiosity: Add reg_5v to supply PMIC nodes
  ARM: dts: microchip: at91-sama5d27_wlsom1: Add reg_5v to supply PMIC nodes
  ARM: dts: microchip: at91-sama5d2_icp: Add reg_5v to supply PMIC nodes
  ARM: dts: microchip: at91-sama7g54_curiosity: Add reg_5v to supply PMIC nodes
  ARM: dts: microchip: at91-sama7g5ek: Add reg_5v to supply PMIC nodes
  ARM: dts: microchip: at91: align LED node name with bindings
  ARM: dts: microchip: sam9x60: Move i2c address/size to dtsi
  ARM: dts: microchip: at91-sama7g5ek: add EEPROMs

Link: https://lore.kernel.org/r/20240901133110.2038675-2-claudiu.beznea@tuxon.dev
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
20 months agoMerge tag 'tegra-for-6.12-arm64-dt' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Tue, 3 Sep 2024 10:34:39 +0000 (10:34 +0000)] 
Merge tag 'tegra-for-6.12-arm64-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt

arm64: tegra: Device tree changes for v6.12-rc1

This contains a slew of cleanups and consolidation changes for several
Orin boards and also fix some minor issues and enable more features on
the Jetson TX1.

* tag 'tegra-for-6.12-arm64-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Add thermal nodes to AGX Orin SKU8
  arm64: tegra: Move BPMP nodes to AGX Orin module
  arm64: tegra: Move padctl supply nodes to AGX Orin module
  arm64: tegra: Move AGX Orin nodes to correct location
  arm64: tegra: Combine IGX Orin board files
  arm64: tegra: Combine AGX Orin board files
  arm64: tegra: Add common nodes to AGX Orin module
  arm64: tegra: Wire up WiFi on Jetson TX1 module
  arm64: tegra: Wire up Bluetooth on Jetson TX1 module
  arm64: tegra: Wire up power sensors on Jetson TX1 DevKit
  arm64: tegra: Add p3767 PCIe C4 EP details
  arm64: tegra: Add Tegra234 PCIe C4 EP definition
  arm64: tegra: Add wp-gpio for P2597's external card slot
  arm64: tegra: Fix gpio for P2597 vmmc regulator
  arm64: tegra: Correct location of power-sensors for IGX Orin
  arm64: tegra: enable same UARTs for Orin NX/Nano
  arm64: tegra: Add DMA properties for Tegra234 UARTA

Link: https://lore.kernel.org/r/20240830141004.3195210-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
20 months agoMerge tag 'tegra-for-6.12-arm-dt' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Tue, 3 Sep 2024 10:32:43 +0000 (10:32 +0000)] 
Merge tag 'tegra-for-6.12-arm-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt

ARM: tegra: Device tree changes for v6.12-rc1

These patches add a bunch more features for the TF701T board and wire up
the front panel LEDs on TrimSlice.

* tag 'tegra-for-6.12-arm-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: tegra: Wire up two front panel LEDs on TrimSlice
  ARM: tegra: tf701t: Configure USB
  ARM: tegra: tf701t: Use dedicated backlight regulator
  ARM: tegra: tf701t: Re-group GPIO keys
  ARM: tegra: tf701t: Bind WIFI SDIO and EMMC
  ARM: tegra: tf701t: Complete sound bindings
  ARM: tegra: tf701t: Adjust sensors nodes
  ARM: tegra: tf701t: Add Bluetooth node
  ARM: tegra: tf701t: Add HDMI bindings
  ARM: tegra: tf701t: Correct and complete PMIC and PMC bindings
  ARM: tegra: tf701t: Bind VDE device
  ARM: tegra: tf701t: Use unimomentary pinmux setup

Link: https://lore.kernel.org/r/20240830141004.3195210-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
20 months agoMerge tag 'tegra-for-6.12-dt-bindings' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Tue, 3 Sep 2024 10:32:07 +0000 (10:32 +0000)] 
Merge tag 'tegra-for-6.12-dt-bindings' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt

dt-bindings: Changes for v6.12-rc1

This adds compatible strings for all revisions of the Nyan board.

* tag 'tegra-for-6.12-dt-bindings' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: arm: tegra: Document Nyan, all revisions in kernel tree

Link: https://lore.kernel.org/r/20240830141004.3195210-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
20 months agoMerge tag 'juno-update-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sudee...
Arnd Bergmann [Tue, 3 Sep 2024 10:31:31 +0000 (10:31 +0000)] 
Merge tag 'juno-update-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/dt

Armv8 Juno/FVP update for v6.12

Just a single update adding stdout-path to the fast models(FVP and
Foundation) which eliminates the need to specify any platform-specific
kernel command line parameters to get working earlycon or console.

* tag 'juno-update-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  arm64: dts: fvp: Set stdout-path to serial0 in the chosen node

Link: https://lore.kernel.org/r/20240830135837.2383557-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
20 months agoMerge tag 'samsung-dt64-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Tue, 3 Sep 2024 10:30:09 +0000 (10:30 +0000)] 
Merge tag 'samsung-dt64-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt

Samsung DTS ARM64 changes for v6.12

1. Exynos7885: Correct amount of RAM on Samsung Galaxy A8.
2. ExynosAutov9: Add new DPUM clock controller and DPUM IOMMU (SysMMU).
3. ExynosAutov920: Add initial (incomplete) clock controllers: TOP and
   PERIC0 controllers.
4. Google GS101: Add reboot and poweroff support.
5. Add binding headers with clock IDs for several devices, used by the
   DTS.

* tag 'samsung-dt64-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: exynosautov920: add initial CMU clock nodes in ExynosAuto v920
  dt-bindings: clock: add ExynosAuto v920 SoC CMU bindings
  arm64: dts: exynosautov9: Add dpum SysMMU
  arm64: dts: exynosautov9: add dpum clock DT nodes
  dt-bindings: clock: exynosautov9: add dpum clock
  dt-bindings: clock: exynos7885: Add indices for USB clocks
  dt-bindings: clock: exynos7885: Add CMU_TOP PLL MUX indices
  dt-bindings: clock: exynos7885: Fix duplicated binding
  dt-bindings: clock: exynos850: Add TMU clock
  arm64: dts: exynos: gs101: add syscon-poweroff and syscon-reboot nodes
  arm64: dts: exynos: exynos7885-jackpotlte: Correct RAM amount to 4GB

Link: https://lore.kernel.org/r/20240827121638.29707-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
20 months agoMerge tag 'renesas-dts-for-v6.12-tag1' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Tue, 3 Sep 2024 10:28:40 +0000 (10:28 +0000)] 
Merge tag 'renesas-dts-for-v6.12-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DTS updates for v6.12

  - Add support for sound, push switches, and GP LEDs on the Gray Hawk
    Single development board,
  - Add missing iommus properties on R-Car Gen3/Gen4 and RZ/G2 SoCs,
  - Add PWM support for the R-Car V4M SoC,
  - Improve Ethernet descriptions on the RZ/G2L, RZ/G2LC, and RZ/G2UL
    SMARC SoMs,
  - Add DMAC support for the RZ/G3S SoC,
  - Add CAN-FD support for the R-Car V4M SoC and the Gray Hawk Single
    development board.

* tag 'renesas-dts-for-v6.12-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (25 commits)
  arm64: dts: renesas: gray-hawk-single: Add CAN-FD support
  arm64: dts: renesas: r8a779h0: Add CAN-FD node
  arm64: dts: renesas: r9a08g045: Add DMAC node
  arm64: dts: renesas: rzg2ul: Set Ethernet PVDD to 1.8V
  arm64: dts: renesas: rzg2lc: Set Ethernet PVDD to 1.8V
  arm64: dts: renesas: rzg2l: Set Ethernet PVDD to 1.8V
  arm64: dts: renesas: rzg2ul: Enable Ethernet TXC output
  arm64: dts: renesas: rzg2lc: Enable Ethernet TXC output
  arm64: dts: renesas: rzg2l: Enable Ethernet TXC output
  arm64: dts: renesas: r8a779h0: Add PWM device nodes
  arm64: dts: renesas: gray-hawk-single: Add GP LEDs
  arm64: dts: renesas: gray-hawk-single: Add push switches
  arm64: dts: renesas: r8a779h0: Add missing iommus properties
  arm64: dts: renesas: r8a779g0: Add missing iommus properties
  arm64: dts: renesas: r8a779a0: Add missing iommus properties
  arm64: dts: renesas: r8a77980: Add missing iommus properties
  arm64: dts: renesas: r8a77970: Add missing iommus property
  arm64: dts: renesas: r8a77965: Add missing iommus properties
  arm64: dts: renesas: r8a77961: Add missing iommus properties
  arm64: dts: renesas: r8a77960: Add missing iommus properties
  ...

Link: https://lore.kernel.org/r/cover.1724316485.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
20 months agoMerge tag 'renesas-dt-bindings-for-v6.12-tag1' of https://git.kernel.org/pub/scm...
Arnd Bergmann [Tue, 3 Sep 2024 10:27:58 +0000 (10:27 +0000)] 
Merge tag 'renesas-dt-bindings-for-v6.12-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DT binding updates for v6.12

  - Document support for the Renesas RZ/G2M v3.0 (r8a774a3) SoC.

* tag 'renesas-dt-bindings-for-v6.12-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  dt-bindings: reset: renesas: Document RZ/G2M v3.0 (r8a774a3) reset module
  dt-bindings: power: renesas: Document RZ/G2M v3.0 (r8a774a3) SYSC binding
  dt-bindings: soc: renesas: Document RZ/G2M v3.0 (r8a774a3) SoC

Link: https://lore.kernel.org/r/cover.1724316483.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
20 months agoMerge tag 'thead-dt-for-v6.12' of https://github.com/pdp7/linux into soc/dt
Arnd Bergmann [Tue, 3 Sep 2024 10:24:31 +0000 (10:24 +0000)] 
Merge tag 'thead-dt-for-v6.12' of https://github.com/pdp7/linux into soc/dt

T-HEAD Devicetrees for v6.12

Add SPI controller node to th1520.dtsi and enable spi0 on the BeagleV
Ahead and LicheePi 4A.

The TH1520 AP_SYS clock driver landed in v6.11 so convert multiple
peripherals like mmc and uart from fixed clocks to the clock controller.

All of these patches have been successfully tested in the latest
linux-next releases.

Signed-off-by: Drew Fustini <drew@pdp7.com>
* tag 'thead-dt-for-v6.12' of https://github.com/pdp7/linux:
  riscv: dts: thead: change TH1520 SPI node to use clock controller
  riscv: dts: thead: add clock to TH1520 gpio nodes
  riscv: dts: thead: update TH1520 dma and timer nodes to use clock controller
  riscv: dts: thead: change TH1520 mmc nodes to use clock controller
  riscv: dts: thead: change TH1520 uart nodes to use clock controller
  riscv: dts: thead: Add TH1520 AP_SUBSYS clock controller
  riscv: dts: thead: add basic spi node

Link: https://lore.kernel.org/r/ZsWs8QiVruMXjzPc@x1
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
20 months agoarm64: dts: renesas: r8a779h0: Add family fallback for CSISP IP
Niklas Söderlund [Mon, 26 Aug 2024 14:43:52 +0000 (16:43 +0200)] 
arm64: dts: renesas: r8a779h0: Add family fallback for CSISP IP

The usage of the R-Car V4M CSISP bindings where merged before the
bindings where approved. At that time the family fallback compatible
where not part of the bindings, add them.

Fixes: 2bb78d9fb7c9 ("arm64: dts: renesas: r8a779h0: Add video capture nodes")
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Link: https://lore.kernel.org/20240826144352.3026980-7-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
20 months agoarm64: dts: renesas: r8a779a0: Add family fallback for CSISP IP
Niklas Söderlund [Mon, 26 Aug 2024 14:43:49 +0000 (16:43 +0200)] 
arm64: dts: renesas: r8a779a0: Add family fallback for CSISP IP

To make it easier to support new R-Car Gen4 SoCs add a family fallback
compatible similar to what was done for VIN on R-Car Gen4.

There is no functional change, but the addition of the family fallback
in the bindings produces warnings for R-Car V3U for DTS checks if they
are not added.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240826144352.3026980-4-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
20 months agoarm64: dts: renesas: r8a779g0: Add family fallback for CSISP IP
Niklas Söderlund [Mon, 26 Aug 2024 14:43:48 +0000 (16:43 +0200)] 
arm64: dts: renesas: r8a779g0: Add family fallback for CSISP IP

To make it easier to support new R-Car Gen4 SoCs add a family fallback
compatible similar to what was done for VIN on R-Car Gen4.

There is no functional change, but the addition of the family fallback
in the bindings produces warnings for R-Car V4H for DTS checks if they
are not added.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240826144352.3026980-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
20 months agoarm64: dts: renesas: r8a779h0: Add family fallback for VIN IP
Niklas Söderlund [Thu, 4 Jul 2024 16:16:20 +0000 (18:16 +0200)] 
arm64: dts: renesas: r8a779h0: Add family fallback for VIN IP

The usage of the R-Car V4M VIN bindings where merged before the bindings
where approved.  At that time the family fallback compatible was not
part of the bindings, add it.

Fixes: 2bb78d9fb7c9 ("arm64: dts: renesas: r8a779h0: Add video capture nodes")
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Link: https://lore.kernel.org/20240704161620.1425409-7-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
20 months agoarm64: dts: renesas: r8a779a0: Add family fallback for VIN IP
Niklas Söderlund [Thu, 4 Jul 2024 16:16:17 +0000 (18:16 +0200)] 
arm64: dts: renesas: r8a779a0: Add family fallback for VIN IP

To make it easier to support new R-Car Gen4 SoCs a family fallback
compatible similar to what is used for R-Car Gen2 has been added to the
VIN bindings.  Add this fallback to the R-Car V3U DTSI.

There is no functional change, but the addition of the family fallback
in the bindings produces warnings for R-Car V3U for DTS checks if they
are not added.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Link: https://lore.kernel.org/20240704161620.1425409-4-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
20 months agoarm64: dts: renesas: r8a779g0: Add family fallback for VIN IP
Niklas Söderlund [Thu, 4 Jul 2024 16:16:16 +0000 (18:16 +0200)] 
arm64: dts: renesas: r8a779g0: Add family fallback for VIN IP

To make it easier to support new R-Car Gen4 SoCs a family fallback
compatible similar to what is used for R-Car Gen2 has been added to the
VIN bindings.  Add this fallback to the R-Car V4H DTSI.

There is no functional change, but the addition of the family fallback
in the bindings produces warnings for R-Car V4H for DTS checks if they
are not added.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Link: https://lore.kernel.org/20240704161620.1425409-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
21 months agoarm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable watchdog
Lad Prabhakar [Wed, 28 Aug 2024 12:41:34 +0000 (13:41 +0100)] 
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable watchdog

Enable WDT1 watchdog on RZ/V2H EVK platform.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-10-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
21 months agoarm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable OSTM, I2C, and SDHI
Lad Prabhakar [Wed, 28 Aug 2024 12:41:33 +0000 (13:41 +0100)] 
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable OSTM, I2C, and SDHI

Enable OSTM0-OSTM7, RIIC{0,1,2,3,6,7,8}, and SDHI1 (available on the SD2
connector) on the RZ/V2H EVK platform.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-9-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
21 months agoarm64: dts: renesas: r9a09g057: Add WDT0-WDT3 nodes
Lad Prabhakar [Wed, 28 Aug 2024 12:41:32 +0000 (13:41 +0100)] 
arm64: dts: renesas: r9a09g057: Add WDT0-WDT3 nodes

Add WDT0-WDT3 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-8-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
21 months agoarm64: dts: renesas: r9a09g057: Add SDHI0-SDHI2 nodes
Lad Prabhakar [Wed, 28 Aug 2024 12:41:31 +0000 (13:41 +0100)] 
arm64: dts: renesas: r9a09g057: Add SDHI0-SDHI2 nodes

Add SDHI0-SDHI2 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-7-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
21 months agoarm64: dts: renesas: r9a09g057: Add RIIC0-RIIC8 nodes
Lad Prabhakar [Wed, 28 Aug 2024 12:41:30 +0000 (13:41 +0100)] 
arm64: dts: renesas: r9a09g057: Add RIIC0-RIIC8 nodes

Add RIIC0-RIIC8 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-6-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
21 months agoarm64: dts: renesas: r9a09g057: Add OSTM0-OSTM7 nodes
Lad Prabhakar [Wed, 28 Aug 2024 12:41:29 +0000 (13:41 +0100)] 
arm64: dts: renesas: r9a09g057: Add OSTM0-OSTM7 nodes

Add OSTM0-OSTM7 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
21 months agoarm64: dts: renesas: Add initial DTS for RZ/V2H EVK board
Lad Prabhakar [Wed, 28 Aug 2024 12:41:28 +0000 (13:41 +0100)] 
arm64: dts: renesas: Add initial DTS for RZ/V2H EVK board

Add initial DTS for RZ/V2H EVK board (based on R9A09G057H44), adding
the below support:
- Memory
- Clock inputs
- PINCTRL
- SCIF

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
21 months agoarm64: dts: renesas: Add initial SoC DTSI for RZ/V2H(P) SoC
Lad Prabhakar [Wed, 28 Aug 2024 12:41:27 +0000 (13:41 +0100)] 
arm64: dts: renesas: Add initial SoC DTSI for RZ/V2H(P) SoC

Add initial SoC DTSI for Renesas RZ/V2H(P) ("R9A09G057") SoC, below are
the list of blocks added:
- EXT CLKs
- 4X CA55
- SCIF
- PFC
- CPG
- SYS
- GIC
- ARMv8 Timer

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
21 months agoMerge tag 'renesas-r9a09g057-dt-binding-defs-tag' into renesas-dts-for-v6.12
Geert Uytterhoeven [Mon, 2 Sep 2024 09:23:32 +0000 (11:23 +0200)] 
Merge tag 'renesas-r9a09g057-dt-binding-defs-tag' into renesas-dts-for-v6.12

Renesas RZ/V2H DT Binding Definitions

DT bindings and binding definitions for the Renesas RZ/V2H (R9A09G057)
SoC, shared by driver and DT source files.

21 months agodt-bindings: soc: renesas: Document RZ/V2H EVK board
Lad Prabhakar [Wed, 28 Aug 2024 12:41:26 +0000 (13:41 +0100)] 
dt-bindings: soc: renesas: Document RZ/V2H EVK board

Add "renesas,rzv2h-evk" which targets the Renesas RZ/V2H ("R9A09G057")
EVK board.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
21 months agodt-bindings: clock: renesas: Document RZ/V2H(P) SoC CPG
Lad Prabhakar [Mon, 29 Jul 2024 20:26:43 +0000 (21:26 +0100)] 
dt-bindings: clock: renesas: Document RZ/V2H(P) SoC CPG

Document the device tree bindings for the Renesas RZ/V2H(P) SoC
Clock Pulse Generator (CPG).

CPG block handles the below operations:
- Generation and control of clock signals for the IP modules
- Generation and control of resets
- Control over booting
- Low power consumption and power supply domains

Also define constants for the core clocks of the RZ/V2H(P) SoC. Note the
core clocks are a subset of the ones which are listed as part of section
4.4.2 of HW manual Rev.1.01 which cannot be controlled by CLKON register.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240729202645.263525-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
21 months agoARM: dts: microchip: sama7g5: Fix RTT clock
Claudiu Beznea [Mon, 26 Aug 2024 16:53:20 +0000 (19:53 +0300)] 
ARM: dts: microchip: sama7g5: Fix RTT clock

According to datasheet, Chapter 34. Clock Generator, section 34.2,
Embedded characteristics, source clock for RTT is the TD_SLCK, registered
with ID 1 by the slow clock controller driver. Fix RTT clock.

Fixes: 7540629e2fc7 ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Link: https://lore.kernel.org/r/20240826165320.3068359-1-claudiu.beznea@tuxon.dev
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
21 months agoarm64: dts: rockchip: drop unsupported regulator-property from NanoPC-T6
Heiko Stuebner [Thu, 29 Aug 2024 13:21:00 +0000 (15:21 +0200)] 
arm64: dts: rockchip: drop unsupported regulator-property from NanoPC-T6

vcc3v3-sd-s0-regulator used enable-active-low. According the binding
of the fixed regulator, that is the assumed mode of operation if
enable-active-high is not specified. So this is property is not part
of the binding, therefore remove it.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240829132100.1723127-4-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
21 months agoarm64: dts: rockchip: drop unsupported regulator property from NanoPC-T6
Heiko Stuebner [Thu, 29 Aug 2024 13:20:59 +0000 (15:20 +0200)] 
arm64: dts: rockchip: drop unsupported regulator property from NanoPC-T6

regulator-init-microvolt is used in the vendor-kernel, but not part
of the specification.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240829132100.1723127-3-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
21 months agoarm64: dts: rockchip: use correct fcs,suspend-voltage-selector on NanoPC-T6
Heiko Stuebner [Thu, 29 Aug 2024 13:20:58 +0000 (15:20 +0200)] 
arm64: dts: rockchip: use correct fcs,suspend-voltage-selector on NanoPC-T6

A remant from moving from the vendor kernel, the regulator is using
a fairchild fcs prefix instead of rockchip,* in the mainline kernel
according to its binding.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240829132100.1723127-2-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
21 months agoARM: dts: rockchip: Do not describe unexisting DAC device on rv1108-elgin-r1
Fabio Estevam [Thu, 29 Aug 2024 11:31:58 +0000 (08:31 -0300)] 
ARM: dts: rockchip: Do not describe unexisting DAC device on rv1108-elgin-r1

There is no DAC connected to the SPI bus of the Elgin RV1108 R1 board.

There is a JG10309-01 LCD controlled via SPI though.

Properly describe it by adding the "elgin,jg10309-01" compatible
string.

Reported-by: Conor Dooley <conor.dooley@microchip.com>
Closes: https://lore.kernel.org/linux-arm-kernel/20240717-parrot-malt-83cc04bf6b36@spud/
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240829113158.3324928-3-festevam@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
21 months agoarm64: tegra: Add thermal nodes to AGX Orin SKU8
Dara Stotland [Mon, 26 Aug 2024 16:47:25 +0000 (16:47 +0000)] 
arm64: tegra: Add thermal nodes to AGX Orin SKU8

One of the key differences between p3701-0000 and p3701-0008 is the
temperature range. Add this info for p3701-0008.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoarm64: tegra: Move BPMP nodes to AGX Orin module
Dara Stotland [Mon, 26 Aug 2024 16:47:24 +0000 (16:47 +0000)] 
arm64: tegra: Move BPMP nodes to AGX Orin module

All SKUs of the p3701 module contain a temp sensor connected to the
BPMP I2C. Move the associated nodes from tegra234-p3701-0008.dtsi
to tegra234-p3701.dtsi. Add missing compatible.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoarm64: tegra: Move padctl supply nodes to AGX Orin module
Dara Stotland [Mon, 26 Aug 2024 16:47:23 +0000 (16:47 +0000)] 
arm64: tegra: Move padctl supply nodes to AGX Orin module

Some padctl supply nodes currently reside in board file, when they
should reside on module level. The nodes are part of module,
not board. Move these nodes to the correct AGX Orin
module file.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoarm64: tegra: Move AGX Orin nodes to correct location
Dara Stotland [Mon, 26 Aug 2024 16:47:22 +0000 (16:47 +0000)] 
arm64: tegra: Move AGX Orin nodes to correct location

Some of the nodes inside the AGX Orin module file are in the
wrong location. In particular, the SD card interface and
two of the PCIe regulators in the module file should instead
reside in the board file. These components are not part of the
module. They are part of the carrier board. Move these
nodes to the correct location.

Fixes: cd42b26a527f ("arm64: tegra: Add regulators required for PCIe")
Fixes: d71b893a119d ("arm64: tegra: Add Tegra234 SDMMC1 device tree node")
Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoarm64: tegra: Combine IGX Orin board files
Dara Stotland [Mon, 26 Aug 2024 16:47:21 +0000 (16:47 +0000)] 
arm64: tegra: Combine IGX Orin board files

Current IGX Orin structure has both a top-level module+board
file as well as a board file. Most of the data in the board-file
is closely related to the module itself. The benefit of this
extra file is outweighed by the additional complexity. Merge
the board file into the module+board file for simplicity.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoarm64: tegra: Combine AGX Orin board files
Dara Stotland [Mon, 26 Aug 2024 16:47:20 +0000 (16:47 +0000)] 
arm64: tegra: Combine AGX Orin board files

The current AGX Orin structure has both a top-level module+board
file as well as a board file. Most of the data in the board-file
is closely related to the module itself. The benefit of this
extra file is outweighed by the additional complexity. Merge
the board file into the module+board file for simplicity.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoarm64: tegra: Add common nodes to AGX Orin module
Dara Stotland [Mon, 26 Aug 2024 16:47:19 +0000 (16:47 +0000)] 
arm64: tegra: Add common nodes to AGX Orin module

The AGX Orin module boards contain common nodes that can
be moved to the included module dtsi. This eliminates
redundancy within the files and reduces lines of code.
Data from tegra234-p3701-0000 and tegra234-p3701-0008 that
is common is now in tegra234-p3701.dtsi.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoARM: tegra: Wire up two front panel LEDs on TrimSlice
Tomasz Maciej Nowak [Thu, 22 Aug 2024 18:41:02 +0000 (20:41 +0200)] 
ARM: tegra: Wire up two front panel LEDs on TrimSlice

Pins responsible for controlling these LEDs need to have tristate
control removed if we want them as GPIOs. This change aligns with
pinmux configuration of "dte" pin group in downstream kernel[1].
These LEDs had no function assigned on vendor kernel and there is no
label on the case, the only markings are on PCB which are part of node
names (ds1 marking is on power LED controlled by PMIC), so generic term
is assigned as the function.

1. https://github.com/compulab/trimslice-android-kernel/blob/upstream/arch/arm/mach-tegra/board-trimslice-pinmux.c#L45

Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoarm64: tegra: Wire up WiFi on Jetson TX1 module
Tomasz Maciej Nowak [Wed, 21 Aug 2024 18:58:05 +0000 (20:58 +0200)] 
arm64: tegra: Wire up WiFi on Jetson TX1 module

P2180 modules have WiFi in form of BCM4354 chip, and kernel driver
supports this one, so enable it for all users. The necessary calibration
file can be obtained from Jetson Linux Archive. nvram.txt file is
located in "Driver Package (BSP)" in
nv_tegra/l4t_deb_packages/nvidia-l4t-firmware_<version>_arm64.deb
archive. The rest of necessary blobs can be obtained from official
Linux Firmware repository or (newer ones) from Infineon
ifx-linux-firmware repository (look in older releases).

Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoarm64: tegra: Wire up Bluetooth on Jetson TX1 module
Tomasz Maciej Nowak [Wed, 21 Aug 2024 18:58:04 +0000 (20:58 +0200)] 
arm64: tegra: Wire up Bluetooth on Jetson TX1 module

P2180 modules have Bluetooth in form of BCM4354 chip, and kernel driver
supports this one, so enable it for all users. The necessary firmware
can be obtained from Jetson Linux Archive. bcm4354.hcd file is located
in "Driver Package (BSP)" in
nv_tegra/l4t_deb_packages/nvidia-l4t-firmware_<version>_arm64.deb
archive.

Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoarm64: tegra: Wire up power sensors on Jetson TX1 DevKit
Tomasz Maciej Nowak [Wed, 21 Aug 2024 18:58:03 +0000 (20:58 +0200)] 
arm64: tegra: Wire up power sensors on Jetson TX1 DevKit

One INA3221 sensor is located on P2180 module and the other two are on
P2597 base board.

Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoarm64: tegra: Add p3767 PCIe C4 EP details
Vedant Deshpande [Fri, 16 Aug 2024 18:43:48 +0000 (18:43 +0000)] 
arm64: tegra: Add p3767 PCIe C4 EP details

Add implementation details for Orin NX/Nano PCIe EP on C4.

Signed-off-by: Vedant Deshpande <vedantd@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoarm64: tegra: Add Tegra234 PCIe C4 EP definition
Vedant Deshpande [Fri, 16 Aug 2024 18:43:47 +0000 (18:43 +0000)] 
arm64: tegra: Add Tegra234 PCIe C4 EP definition

Add PCIe C4 EP controller definition in device tree for Tegra234
devices.

Signed-off-by: Vedant Deshpande <vedantd@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoarm64: tegra: Add wp-gpio for P2597's external card slot
Diogo Ivo [Thu, 15 Aug 2024 15:50:40 +0000 (16:50 +0100)] 
arm64: tegra: Add wp-gpio for P2597's external card slot

Add the definition for the wp-gpio of the P2597's external card slot,
enabling this functionality.

Tested on a P2597 board.

Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoarm64: tegra: Fix gpio for P2597 vmmc regulator
Diogo Ivo [Thu, 15 Aug 2024 15:50:39 +0000 (16:50 +0100)] 
arm64: tegra: Fix gpio for P2597 vmmc regulator

The current declaration is off-by-one and actually corresponds to the
wp-gpio of the external slot.

Tested on a P2597 board.

Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agodt-bindings: arm: tegra: Document Nyan, all revisions in kernel tree
David Heidelberg [Fri, 5 Jul 2024 23:52:43 +0000 (16:52 -0700)] 
dt-bindings: arm: tegra: Document Nyan, all revisions in kernel tree

Avoid firing useless warnings when running make dtbs_check

Signed-off-by: David Heidelberg <david@ixit.cz>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoARM: tegra: tf701t: Configure USB
Svyatoslav Ryhel [Tue, 6 Aug 2024 12:39:06 +0000 (15:39 +0300)] 
ARM: tegra: tf701t: Configure USB

Fixes issue when resuming after suspend made USB in peripheral
mode inaccessible.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoARM: tegra: tf701t: Use dedicated backlight regulator
Svyatoslav Ryhel [Tue, 6 Aug 2024 12:39:05 +0000 (15:39 +0300)] 
ARM: tegra: tf701t: Use dedicated backlight regulator

Downstream kernel states that backlight has no actual enable GPIO
and uses fixed regulator.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoARM: tegra: tf701t: Re-group GPIO keys
Svyatoslav Ryhel [Tue, 6 Aug 2024 12:39:04 +0000 (15:39 +0300)] 
ARM: tegra: tf701t: Re-group GPIO keys

Group GPIO keys into keys and switches.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoARM: tegra: tf701t: Bind WIFI SDIO and EMMC
Svyatoslav Ryhel [Tue, 6 Aug 2024 12:39:03 +0000 (15:39 +0300)] 
ARM: tegra: tf701t: Bind WIFI SDIO and EMMC

Add MMC nodes configuration along with WIFI binding to ASUS TF701T
device-tree.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoARM: tegra: tf701t: Complete sound bindings
Svyatoslav Ryhel [Tue, 6 Aug 2024 12:39:02 +0000 (15:39 +0300)] 
ARM: tegra: tf701t: Complete sound bindings

With these changes sound works, only UCM configs are needed for
complete support.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoARM: tegra: tf701t: Adjust sensors nodes
Svyatoslav Ryhel [Tue, 6 Aug 2024 12:39:01 +0000 (15:39 +0300)] 
ARM: tegra: tf701t: Adjust sensors nodes

Complete and adjust magnetometer, thermal sensor, motion tracker,
power and light sensors according to available sources.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoARM: tegra: tf701t: Add Bluetooth node
Svyatoslav Ryhel [Tue, 6 Aug 2024 12:39:00 +0000 (15:39 +0300)] 
ARM: tegra: tf701t: Add Bluetooth node

Add serial node along with bluetooth node to ASUS TF701T device-tree.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoARM: tegra: tf701t: Add HDMI bindings
Svyatoslav Ryhel [Tue, 6 Aug 2024 12:38:59 +0000 (15:38 +0300)] 
ARM: tegra: tf701t: Add HDMI bindings

Add HDMI nodes to ASUS TF701T device-tree.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoARM: tegra: tf701t: Correct and complete PMIC and PMC bindings
Svyatoslav Ryhel [Tue, 6 Aug 2024 12:38:58 +0000 (15:38 +0300)] 
ARM: tegra: tf701t: Correct and complete PMIC and PMC bindings

Add missing parts of PMIC complex, extend PMC binding and add missing
fixed regulators. Additionally, refresh naming to better reflect
regulator purpose.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoARM: tegra: tf701t: Bind VDE device
Svyatoslav Ryhel [Tue, 6 Aug 2024 12:38:57 +0000 (15:38 +0300)] 
ARM: tegra: tf701t: Bind VDE device

Add Video Decoder Engine node to ASUS TF701T device-tree.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoARM: tegra: tf701t: Use unimomentary pinmux setup
Svyatoslav Ryhel [Tue, 6 Aug 2024 12:38:56 +0000 (15:38 +0300)] 
ARM: tegra: tf701t: Use unimomentary pinmux setup

Mimic original downstream board behavior to set up all pinmux at once.
Per-device pinmux is good but we have no complete board schematics
to allow such luxury.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoarm64: dts: rockchip: add Mask Rom key on NanoPC-T6
Marcin Juszkiewicz [Thu, 29 Aug 2024 12:27:00 +0000 (14:27 +0200)] 
arm64: dts: rockchip: add Mask Rom key on NanoPC-T6

Mask Rom key is connected to SARADC and can be read from OS.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-9-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
21 months agoarm64: dts: rockchip: enable USB-C on NanoPC-T6
Marcin Juszkiewicz [Thu, 29 Aug 2024 12:26:59 +0000 (14:26 +0200)] 
arm64: dts: rockchip: enable USB-C on NanoPC-T6

Enable the USB-C port on FriendlyELEC NanoPC-T6.

Works one way so far but still better than before.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-8-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
21 months agoarm64: dts: rockchip: enable GPU on NanoPC-T6
Marcin Juszkiewicz [Thu, 29 Aug 2024 12:26:58 +0000 (14:26 +0200)] 
arm64: dts: rockchip: enable GPU on NanoPC-T6

Enable the Mali GPU on FriendlyELEC NanoPC-T6

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-7-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
21 months agoarm64: dts: rockchip: add IR-receiver to NanoPC-T6
Marcin Juszkiewicz [Thu, 29 Aug 2024 12:26:57 +0000 (14:26 +0200)] 
arm64: dts: rockchip: add IR-receiver to NanoPC-T6

FriendlyELEC NanoPC-T6 has IR receiver connected to PWM3_IR_M0 line
which ends as GPIO0_D4.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-6-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
21 months agoarm64: dts: rockchip: add SPI flash on NanoPC-T6
Marcin Juszkiewicz [Thu, 29 Aug 2024 12:26:56 +0000 (14:26 +0200)] 
arm64: dts: rockchip: add SPI flash on NanoPC-T6

FriendlyELEC NanoPC-T6 has optional SPI flash chip on-board.
It is populated with 32MB one on LTS version.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-5-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
21 months agoarm64: dts: rockchip: add NanoPC-T6 LTS
Marcin Juszkiewicz [Thu, 29 Aug 2024 12:26:55 +0000 (14:26 +0200)] 
arm64: dts: rockchip: add NanoPC-T6 LTS

In the LTS (2310) version the miniPCIe slot got removed and USB 2.0
setup has changed. There are two external accessible ports and two ports
on the internal header.

There is an on-board USB hub which provides:
- one external connector (bottom one)
- two internal ports on pin header
- one port for m.2 E connector

The top USB 2.0 connector comes directly from the SoC.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-4-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
21 months agoarm64: dts: rockchip: move NanoPC-T6 parts to DTS
Marcin Juszkiewicz [Thu, 29 Aug 2024 12:26:54 +0000 (14:26 +0200)] 
arm64: dts: rockchip: move NanoPC-T6 parts to DTS

MiniPCIe slot is present only in first version of NanoPC-T6 (2301).

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-3-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
21 months agoarm64: dts: rockchip: prepare NanoPC-T6 for LTS board
Marcin Juszkiewicz [Thu, 29 Aug 2024 12:26:53 +0000 (14:26 +0200)] 
arm64: dts: rockchip: prepare NanoPC-T6 for LTS board

FriendlyELEC introduced a second version of NanoPC-T6 SBC.

Create common include file and make NanoPC-T6 use it. Following
patches will add LTS version.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-2-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
21 months agodt-bindings: arm: rockchip: Add NanoPC-T6 LTS
Marcin Juszkiewicz [Thu, 29 Aug 2024 12:26:52 +0000 (14:26 +0200)] 
dt-bindings: arm: rockchip: Add NanoPC-T6 LTS

Add devicetree binding for the NanoPC-T6 LTS board.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-1-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
21 months agoarm64: dts: renesas: r9a07g043u11-smarc: Enable DU
Biju Das [Mon, 26 Aug 2024 10:16:46 +0000 (11:16 +0100)] 
arm64: dts: renesas: r9a07g043u11-smarc: Enable DU

Enable the Display Unit and link with the HDMI add-on board connected
to the parallel connector on the RZ/G2UL SMARC EVK by using a Device
Tree overlay.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240826101648.176647-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
21 months agoarm64: dts: renesas: rzg2lc-smarc: Enable HDMI audio
Biju Das [Mon, 26 Aug 2024 09:08:00 +0000 (10:08 +0100)] 
arm64: dts: renesas: rzg2lc-smarc: Enable HDMI audio

Enable HDMI audio on the RZ/G2LC SMARC EVK.  Set SW 1.5 on the SoM
module to the OFF position to turn on HDMI audio.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240826090803.56176-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
21 months agoarm64: dts: renesas: rzg2l-smarc: Enable HDMI audio
Biju Das [Mon, 26 Aug 2024 09:07:59 +0000 (10:07 +0100)] 
arm64: dts: renesas: rzg2l-smarc: Enable HDMI audio

Enable HDMI audio on the RZ/{G2L,V2L} SMARC EVK.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240826090803.56176-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
21 months agoarm64: dts: rockchip: disable display subsystem only for Radxa E25
Chukun Pan [Tue, 20 Aug 2024 12:00:20 +0000 (20:00 +0800)] 
arm64: dts: rockchip: disable display subsystem only for Radxa E25

The SoM board has reserved HDMI output, while the Radxa E25
is not connected. So disable the display subsystem only for
Radxa E25.

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/20240820120020.469375-1-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
21 months agoarm64: dts: rockchip: enable PCIe on M.2 E key for Radxa ROCK 5A
FUKAUMI Naoki [Mon, 26 Aug 2024 08:04:56 +0000 (17:04 +0900)] 
arm64: dts: rockchip: enable PCIe on M.2 E key for Radxa ROCK 5A

Enable pcie2x1l2 and related combphy/regulator routed to M.2 E key
connector on Radxa ROCK 5A.

Tested with Radxa Wireless Module A8:

$ lspci
0004:40:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3588 (rev 01)
0004:41:00.0 Network controller: Realtek Semiconductor Co., Ltd. RTL8852BE PCIe 802.11ax Wireless Network Controller

$ ip l
1: lo: <LOOPBACK,UP,LOWER_UP> mtu 65536 qdisc noqueue state UNKNOWN mode DEFAULT group default qlen 1000
    link/loopback 00:00:00:00:00:00 brd 00:00:00:00:00:00
2: end0: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc mq state UP mode DEFAULT group default qlen 1000
    link/ether c2:58:fc:70:55:86 brd ff:ff:ff:ff:ff:ff
3: wlP4p65s0: <BROADCAST,MULTICAST> mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000
    link/ether 2c:05:47:65:5b:ed brd ff:ff:ff:ff:ff:ff

$ lsusb
Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
Bus 001 Device 002: ID 1a40:0101 Terminus Technology Inc. Hub
Bus 001 Device 003: ID 0bda:b85b Realtek Semiconductor Corp. Bluetooth Radio
Bus 002 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub
Bus 003 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub
Bus 004 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
Bus 005 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
Bus 006 Device 001: ID 1d6b:0003 Linux Foundation 3.0 root hub
Bus 006 Device 002: ID 0789:0336 Logitec Corp. LMD USB Device
Bus 007 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
Bus 008 Device 001: ID 1d6b:0003 Linux Foundation 3.0 root hub

$ hciconfig
hci0: Type: Primary  Bus: USB
BD Address: 2C:05:47:65:5B:EE  ACL MTU: 1021:6  SCO MTU: 255:12
UP RUNNING
RX bytes:2698 acl:0 sco:0 events:329 errors:0
TX bytes:69393 acl:0 sco:0 commands:329 errors:0

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://lore.kernel.org/r/20240826080456.525-1-naoki@radxa.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
21 months agoarm64: dts: rockchip: remove unnecessary properties for Radxa ROCK 5A
FUKAUMI Naoki [Mon, 26 Aug 2024 07:51:29 +0000 (16:51 +0900)] 
arm64: dts: rockchip: remove unnecessary properties for Radxa ROCK 5A

There is no "on-board WLAN/BT chip" on Radxa ROCK 5A. remove related
properties.

Fixes: 1642bf66e270 ("arm64: dts: rockchip: add USB2 to rk3588s-rock5a")
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://lore.kernel.org/r/20240826075130.546-1-naoki@radxa.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
21 months agoarm64: dts: rockchip: add dts for LCKFB Taishan Pi RK3566
Junhao Xie [Mon, 26 Aug 2024 11:02:26 +0000 (19:02 +0800)] 
arm64: dts: rockchip: add dts for LCKFB Taishan Pi RK3566

Add dts for LCKFB Taishan Pi.
Working IO:
* UART
* RGB LED
* AP6212 WiFi
* AP6212 Bluetooth
* SD Card
* eMMC
* HDMI
* USB Type-C
* USB Type-A

Signed-off-by: Junhao Xie <bigfoot@classfun.cn>
Link: https://lore.kernel.org/r/20240826110300.735350-1-bigfoot@classfun.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
21 months agodt-bindings: arm: rockchip: Add LCKFB Taishan Pi RK3566
Junhao Xie [Mon, 26 Aug 2024 04:44:12 +0000 (12:44 +0800)] 
dt-bindings: arm: rockchip: Add LCKFB Taishan Pi RK3566

This documents LCKFB Taishan Pi which is a SBC based on the RK3566 SoC.

Signed-off-by: Junhao Xie <bigfoot@classfun.cn>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240826044530.726458-3-bigfoot@classfun.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
21 months agodt-bindings: vendor-prefixes: Add Shenzhen JLC Technology Group LCKFB
Junhao Xie [Mon, 26 Aug 2024 04:44:11 +0000 (12:44 +0800)] 
dt-bindings: vendor-prefixes: Add Shenzhen JLC Technology Group LCKFB

Add an entry for Shenzhen JLC Technology LCKFB (https://lckfb.com/)

Signed-off-by: Junhao Xie <bigfoot@classfun.cn>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240826044530.726458-2-bigfoot@classfun.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
21 months agoarm64: dts: rockchip: Add Hardkernel ODROID-M1S
Jonas Karlman [Tue, 27 Aug 2024 21:18:18 +0000 (21:18 +0000)] 
arm64: dts: rockchip: Add Hardkernel ODROID-M1S

The Hardkernel ODROID-M1S is a single-board computer based on Rockchip
RK3566 SoC. It features e.g. 4/8 GB LPDDR4 RAM, 64 GB eMMC, SD-card,
GbE LAN, HDMI 2.0, M.2 NVMe and USB 2.0/3.0.

Add initial support for eMMC, SD-card, Ethernet, HDMI, PCIe and USB.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20240827211825.1419820-5-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
21 months agodt-bindings: arm: rockchip: Add Hardkernel ODROID-M1S
Jonas Karlman [Tue, 27 Aug 2024 21:18:17 +0000 (21:18 +0000)] 
dt-bindings: arm: rockchip: Add Hardkernel ODROID-M1S

The Hardkernel ODROID-M1S is a single-board computer based on Rockchip
RK3566 SoC. It features e.g. 4/8 GB LPDDR4 RAM, 64 GB eMMC, SD-card,
GbE LAN, HDMI 2.0, M.2 NVMe and USB 2.0/3.0.

Add devicetree binding documentation for the Hardkernel ODROID-M1S board.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240827211825.1419820-4-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
21 months agoarm64: dts: rockchip: Correct vendor prefix for Hardkernel ODROID-M1
Jonas Karlman [Tue, 27 Aug 2024 21:18:16 +0000 (21:18 +0000)] 
arm64: dts: rockchip: Correct vendor prefix for Hardkernel ODROID-M1

The vendor prefix for Hardkernel ODROID-M1 is incorrectly listed as
rockchip. Use the proper hardkernel vendor prefix for this board, while
at it also drop the redundant soc prefix.

Fixes: fd3583267703 ("arm64: dts: rockchip: Add Hardkernel ODROID-M1 board")
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20240827211825.1419820-3-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
21 months agodt-bindings: arm: rockchip: Correct vendor for Hardkernel ODROID-M1
Jonas Karlman [Tue, 27 Aug 2024 21:18:15 +0000 (21:18 +0000)] 
dt-bindings: arm: rockchip: Correct vendor for Hardkernel ODROID-M1

The vendor prefix for Hardkernel ODROID-M1 is incorrectly listed as
rockchip. Use the proper hardkernel vendor prefix for this board, while
at it also drop the redundant soc prefix.

Fixes: 19cc53eb2ce6 ("dt-bindings: rockchip: Add Hardkernel ODROID-M1 board")
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240827211825.1419820-2-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
21 months agoarm64: dts: rockchip: Enable RK809 audio codec for Radxa ROCK 4C+
Jonathan Liu [Wed, 28 Aug 2024 07:47:53 +0000 (17:47 +1000)] 
arm64: dts: rockchip: Enable RK809 audio codec for Radxa ROCK 4C+

This adds the necessary device tree changes to enable analog audio
output for the 3.5 mm TRS headphone jack on the Radxa ROCK 4C+ with
its RK809 audio codec.

Signed-off-by: Jonathan Liu <net147@gmail.com>
Link: https://lore.kernel.org/r/20240828074755.1320692-1-net147@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
21 months agoarm64: dts: rockchip: Add VPU121 support for RK3588
Jianfeng Liu [Tue, 27 Aug 2024 18:10:21 +0000 (20:10 +0200)] 
arm64: dts: rockchip: Add VPU121 support for RK3588

Enable Hantro G1 video decoder in RK3588's devicetree.

Tested with FFmpeg v4l2_request code taken from [1]
with MPEG2, H.264 and VP8 samples.

[1] https://github.com/LibreELEC/LibreELEC.tv/blob/master/packages/multimedia/ffmpeg/patches/v4l2-request/ffmpeg-001-v4l2-request.patch

Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com>
Tested-by: Hugh Cole-Baker <sigmaris@gmail.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20240827181206.147617-3-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
21 months agoarm64: dts: rockchip: Add VEPU121 to RK3588
Emmanuel Gil Peyrot [Tue, 27 Aug 2024 18:10:20 +0000 (20:10 +0200)] 
arm64: dts: rockchip: Add VEPU121 to RK3588

RK3588 has 4 Hantro G1 encoder-only cores. They are all independent IP,
but can be used as a cluster (i.e. sharing work between the cores).
These cores are called VEPU121 in the TRM. The TRM describes one more
VEPU121, but that is combined with a Hantro H1. That one will be handled
using the VPU binding instead.

Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20240827181206.147617-2-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
21 months agoARM: dts: rockchip: Add vpu nodes for RK3128
Alex Bee [Thu, 23 May 2024 18:56:33 +0000 (20:56 +0200)] 
ARM: dts: rockchip: Add vpu nodes for RK3128

Add nodes for the vpu and it's attached iommu which are both part of the
RK3128_PD_VIDEO powerdomain.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Link: https://lore.kernel.org/r/20240523185633.71355-4-knaerzche@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
21 months agoarm64: tegra: Correct location of power-sensors for IGX Orin
Jon Hunter [Fri, 12 Jul 2024 13:20:20 +0000 (14:20 +0100)] 
arm64: tegra: Correct location of power-sensors for IGX Orin

The power-sensors are located on the carrier board and not the
module board and so update the IGX Orin device-tree files to fix this.

Fixes: 9152ed09309d ("arm64: tegra: Add power-sensors for Tegra234 boards")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoarm64: tegra: enable same UARTs for Orin NX/Nano
Vedant Deshpande [Thu, 11 Jul 2024 17:11:01 +0000 (17:11 +0000)] 
arm64: tegra: enable same UARTs for Orin NX/Nano

This patch ensures that Orin NX and Orin Nano enable an identical
set of serial ports. UARTA/UARTE will be enabled by adding
respective nodes to the board dtsi file.

Signed-off-by: Vedant Deshpande <vedantd@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoarm64: tegra: Add DMA properties for Tegra234 UARTA
Vedant Deshpande [Thu, 11 Jul 2024 17:11:00 +0000 (17:11 +0000)] 
arm64: tegra: Add DMA properties for Tegra234 UARTA

Adding the missing dmas and dma-names properties which are required
for UARTA when using with the Tegra HSUART driver.

Signed-off-by: Vedant Deshpande <vedantd@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
21 months agoARM: dts: microchip: sam9x60: Fix rtc/rtt clocks
Alexander Dahl [Wed, 21 Aug 2024 05:51:36 +0000 (07:51 +0200)] 
ARM: dts: microchip: sam9x60: Fix rtc/rtt clocks

The RTC and RTT peripherals use the timing domain slow clock (TD_SLCK),
sourced from the 32.768 kHz crystal oscillator or slow rc oscillator.

The previously used Monitoring domain slow clock (MD_SLCK) is sourced
from an internal RC oscillator which is most probably not precise enough
for real time clock purposes.

Fixes: 1e5f532c2737 ("ARM: dts: at91: sam9x60: add device tree for soc and board")
Fixes: 5f6b33f46346 ("ARM: dts: sam9x60: add rtt")
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Link: https://lore.kernel.org/r/20240821055136.6858-1-ada@thorsis.com
[claudiu.beznea: removed () around the last commit description paragraph,
 removed " in front of "timing domain slow clock", described that
 TD_SLCK can also be sourced from slow rc oscillator]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
21 months agodt-bindings: pinctrl: Convert Atmel PIO3 pinctrl to json-schema
Manikandan Muralidharan [Wed, 14 Aug 2024 06:13:15 +0000 (11:43 +0530)] 
dt-bindings: pinctrl: Convert Atmel PIO3 pinctrl to json-schema

Convert Atmel PIO3 pinctrl binding document to DT schema format
json-schema.

Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240814061315.112564-5-manikandan.m@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
21 months agoARM: dts: microchip: sam9x60: Remove additional compatible string from GPIO node
Manikandan Muralidharan [Wed, 14 Aug 2024 06:13:14 +0000 (11:43 +0530)] 
ARM: dts: microchip: sam9x60: Remove additional compatible string from GPIO node

The driver data specific to each pinctrl GPIO bank compatible nodes are not
the same and declaring additional compatible string as fallback has no
specific purpose, hence, removing the "atmel,at91sam9x5-gpio" compatible from
sam9x60 SoC DT.

Note: The at91 pinctrl driver uses "atmel,at91rm9200-gpio" compatible string
to find the number of active GPIO banks and identify the pinmux nodes.It
should used as a constant across all DT for GPIO node banks that uses PIO3
based pinctrl driver

Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20240814061315.112564-4-manikandan.m@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
21 months agoARM: dts: microchip: Remove additional compatible string from PIO3 pinctrl nodes
Manikandan Muralidharan [Wed, 14 Aug 2024 06:13:13 +0000 (11:43 +0530)] 
ARM: dts: microchip: Remove additional compatible string from PIO3 pinctrl nodes

The driver data specific to each pinctrl GPIO bank compatible nodes are not
the same and declaring additional compatible string as fallback has no
specific purpose, hence, removing the additional compatible string from the
pinctrl nodes in DT to comply with atmel,at91-pinctrl.txt documentation.

Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20240814061315.112564-3-manikandan.m@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
21 months agoARM: dts: microchip: change to simple-mfd from simple-bus for PIO3 pinumux controller
Manikandan Muralidharan [Wed, 14 Aug 2024 06:13:12 +0000 (11:43 +0530)] 
ARM: dts: microchip: change to simple-mfd from simple-bus for PIO3 pinumux controller

The pinctrl subnodes that define the pin configuration of other devices
under PIO3 pinmux controller are not simple memory mapped nodes.Ergo,
change simple-bus to simple-mfd.

Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20240814061315.112564-2-manikandan.m@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
21 months agoarm64: dts: renesas: r9a07g043u: Add DU node
Biju Das [Thu, 22 Aug 2024 16:23:16 +0000 (17:23 +0100)] 
arm64: dts: renesas: r9a07g043u: Add DU node

Add DU node to RZ/G2UL SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240822162320.5084-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
21 months agoarm64: dts: renesas: white-hawk-cpu-common: Enable PCIe Host ch0
Yoshihiro Shimoda [Thu, 22 Aug 2024 00:44:54 +0000 (09:44 +0900)] 
arm64: dts: renesas: white-hawk-cpu-common: Enable PCIe Host ch0

Enable PCIe Host controller channel 0 on R-Car V4H White Hawk boards.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240822004454.1087582-3-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
21 months agoarm64: dts: renesas: r8a779g0: Add PCIe Host and Endpoint nodes
Yoshihiro Shimoda [Thu, 22 Aug 2024 00:44:53 +0000 (09:44 +0900)] 
arm64: dts: renesas: r8a779g0: Add PCIe Host and Endpoint nodes

Add PCIe Host and Endpoint nodes for R-Car V4H (R8A779G0).

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240822004454.1087582-2-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
21 months agoarm64: dts: renesas: rzg3s-smarc-som: Enable I2C1 node
Claudiu Beznea [Tue, 20 Aug 2024 10:19:18 +0000 (13:19 +0300)] 
arm64: dts: renesas: rzg3s-smarc-som: Enable I2C1 node

Enable I2C1 node.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240820101918.2384635-12-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
21 months agoarm64: dts: renesas: rzg3s-smarc: Enable I2C0 node
Claudiu Beznea [Tue, 20 Aug 2024 10:19:17 +0000 (13:19 +0300)] 
arm64: dts: renesas: rzg3s-smarc: Enable I2C0 node

Enable I2C0 node.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240820101918.2384635-11-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>