]> git.ipfire.org Git - thirdparty/u-boot.git/log
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16 hours agoPrepare v2026.07-rc1 master 943/head v2026.07-rc1
Tom Rini [Mon, 27 Apr 2026 23:03:18 +0000 (17:03 -0600)] 
Prepare v2026.07-rc1

Signed-off-by: Tom Rini <trini@konsulko.com>
20 hours agoMerge patch series "scsi: Replace SYNC_CACHE with FUA for scsi write"
Tom Rini [Mon, 27 Apr 2026 19:44:11 +0000 (13:44 -0600)] 
Merge patch series "scsi: Replace SYNC_CACHE with FUA for scsi write"

Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com> says:

This series replaces the SYNC_CACHE approach with FUA (Force Unit
Access) to prevent data loss during board resets while avoiding
system hangs during large sparse image flashing operations.

The previous SYNC_CACHE implementation caused timeouts and hangs
when flashing large sparse images because it issued cache sync
commands after every write operation. The FUA approach achieves
the same data integrity goal by setting the FUA bit in
WRITE10 commands.

Link: https://lore.kernel.org/r/20260416-enable_fua-v3-0-84508de2bfd9@oss.qualcomm.com
20 hours agoscsi: Enable FUA bit in WRITE10 commands
Aswin Murugan [Thu, 16 Apr 2026 09:10:47 +0000 (14:40 +0530)] 
scsi: Enable FUA bit in WRITE10 commands

Enable the Force Unit Access (FUA) bit in SCSI WRITE10 commands to
ensure writes bypass the device's volatile cache and go directly to
non-volatile storage. This provides write-through behavior that prevents
data loss during board resets.

Reviewed-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
20 hours agoRevert "scsi: sync cache on write"
Balaji Selvanathan [Thu, 16 Apr 2026 09:10:46 +0000 (14:40 +0530)] 
Revert "scsi: sync cache on write"

While the SYNC_CACHE approach prevents data loss during board resets,
it causes system hangs during large sparse image flashing operations.
This will be replaced with a FUA (Force Unit Access) approach in future
commit, which achieves the same data integrity goal more efficiently.

This reverts commit ffe4e6ab42d2534302be825e49a2d085acf80f30.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
22 hours agoMerge patch series "net: migrate NO_NET out of the networking stack choice"
Tom Rini [Mon, 27 Apr 2026 17:28:25 +0000 (11:28 -0600)] 
Merge patch series "net: migrate NO_NET out of the networking stack choice"

Quentin Schulz <foss+uboot@0leil.net> says:

This migrates the net options away from the main Kconfig to net/Kconfig,
rename the current NET option to NET_LEGACY to really highlight what it
is and hopefully encourage more people to use lwIP, add a new NET
menuconfig (but keep NO_NET as an alias to NET=n for now) which then
allows us to replace all the "if legacy_stack || lwip_stack" checks with
"if net_support" which is easier to read and maintain.

The only doubt I have is wrt SYS_RX_ETH_BUFFER which seems to be needed
for now even when no network is configured? Likely due to
include/net-common.h with PKTBUFSRX?

No change in behavior is intended. Only change in defconfig including
other defconfigs where NO_NET=y or NET is not set, in which case NO_NET
is not set or NET=y should be set in the top defconfig. Similar change
required for config fragments. See commit log in patch adding NET
menuconfig for details.

This was tested based on 70fd0c3bb7c2 ("x86: there is no
CONFIG_UBOOT_ROMSIZE_KB_12288"), from within the GitLab CI container
trini/u-boot-gitlab-ci-runner:noble-20251013-23Jan2026 and set up
similarly as in "build all platforms in a single job" GitLab CI job.

 #!/usr/bin/env bash
 set -o pipefail
 set -eux

 ARGS="-BvelPEWM --reproducible-builds --step 0"
 ./tools/buildman/buildman -o ${O} --force-build $ARGS -CE $*
 ./tools/buildman/buildman -o ${O} $ARGS -Ssd $*

O=../build/u-boot/ ../u-boot.sh -b master^..b4/net-kconfig |& tee ../log.txt

I can't really decipher the log.txt, but there's no line starting with
+ which would be an error according to tools/buildman/builder.py help
text. Additionally, because I started the script with set -e set and
because buildman has an exit code != 0 when it fails to build a board,
and I have the summary printed (which is the second buildman call), I
believe it means all builds passed.

The summary is the following:
   aarch64: (for 537/537 boards) all +0.0 rodata +0.0
            uniphier_v8    : all +1 rodata +1
               u-boot: add: 0/0, grow: 1/0 bytes: 1/0 (1)
                 function                                   old     new   delta
                 data_gz                                  10640   10641      +1
       arm: (for 733/733 boards) all -0.0 rodata -0.0
            uniphier_v7    : all -1 rodata -1
               u-boot: add: 0/0, grow: 0/-1 bytes: 0/-1 (-1)
                 function                                   old     new   delta
                 data_gz                                  11919   11918      -1
            opos6uldev     : all -3 rodata -3
               u-boot: add: 0/0, grow: 0/-1 bytes: 0/-3 (-3)
                 function                                   old     new   delta
                 data_gz                                  18778   18775      -3
            uniphier_ld4_sld8: all -3 rodata -3
               u-boot: add: 0/0, grow: 0/-1 bytes: 0/-3 (-3)
                 function                                   old     new   delta
                 data_gz                                  11276   11273      -3
            stemmy         : all -20 rodata -20
               u-boot: add: 0/0, grow: 0/-1 bytes: 0/-20 (-20)
                 function                                   old     new   delta
                 data_gz                                  15783   15763     -20

As far as I could tell this data_gz is an automatically generated array
when CONFIG_CMD_CONFIG is enabled. It is the compressed .config stored
in binary form. Because I'm changing the name of symbols, replacing a
menu with a menuconfig, additional text makes it to .config and the
"# Networking" section in .config disappears.

Here is the diff for the 5 defconfigs listed above, generated with:

for f in build/*-m; do
diff --unified=0 $f/.config $(dirname $f)/$(basename -a -s '-m' $f)/.config
done

(-m is the build directory for master, and without the suffix, it's the
top commit of this series)

"""
 --- build/opos6uldev-m/.config 2026-04-20 10:53:49.804528526 +0200
 +++ build/opos6uldev/.config 2026-04-20 11:03:37.430242767 +0200
 @@ -970,4 +969,0 @@
 -
 -#
 -# Networking
 -#
 @@ -975,0 +972 @@
 +CONFIG_NET_LEGACY=y
 --- build/stemmy-m/.config 2026-04-20 11:01:33.653698123 +0200
 +++ build/stemmy/.config 2026-04-20 11:04:53.452577311 +0200
 @@ -733,4 +732,0 @@
 -
 -#
 -# Networking
 -#
 @@ -738,2 +733,0 @@
 -# CONFIG_NET is not set
 -# CONFIG_NET_LWIP is not set
 --- build/uniphier_ld4_sld8-m/.config 2026-04-20 11:00:41.605469071 +0200
 +++ build/uniphier_ld4_sld8/.config 2026-04-20 11:04:22.226439899 +0200
 @@ -997,4 +996,0 @@
 -
 -#
 -# Networking
 -#
 @@ -1002,0 +999 @@
 +CONFIG_NET_LEGACY=y
 --- build/uniphier_v7-m/.config 2026-04-20 10:53:04.019307319 +0200
 +++ build/uniphier_v7/.config 2026-04-20 11:03:01.688085486 +0200
 @@ -1004,4 +1003,0 @@
 -
 -#
 -# Networking
 -#
 @@ -1009,0 +1006 @@
 +CONFIG_NET_LEGACY=y
 --- build/uniphier_v8-m/.config 2026-04-20 10:43:05.614441175 +0200
 +++ build/uniphier_v8/.config 2026-04-20 10:41:03.214852130 +0200
 @@ -875,4 +874,0 @@
 -
 -#
 -# Networking
 -#
 @@ -880,0 +877 @@
 +CONFIG_NET_LEGACY=y
"""

This is fine:
- Networking menu doesn't exist anymore so "#\n# Networking\n#\n" won't
  be in .config anymore.
- opos6uldev, uniphier_ld4_sld8, uniphier_v7 and uniphier_v8 all have
  (old) CONFIG_NET enabled, (new) CONFIG_NET will still be set but
  CONFIG_NET_LEGACY also needs to be defined now to reflect the stack
  choice (even if default),
- stemmy has CONFIG_NO_NET set, which means CONFIG_NET and
  CONFIG_NET_LWIP are not reachable anymore hence why they don't need to
  be part of .config,

GitLab CI was run on this series (well, not exactly, but it's only
changes to the git logs that were made):
https://source.denx.de/u-boot/contributors/qschulz/u-boot/-/pipelines/29849

It passes.

Link: https://lore.kernel.org/r/20260420-net-kconfig-v1-0-9900002d8e72@cherry.de
22 hours agoboot: remove NO_NET use
Quentin Schulz [Mon, 20 Apr 2026 11:36:12 +0000 (13:36 +0200)] 
boot: remove NO_NET use

NO_NET is now a transitional symbol which may eventually be removed. Its
meaning is the opposite of the new meaning of NET (that is, any
networking stack).

Update the symbol dependency by using NET instead of !NO_NET.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
22 hours agodoc: remove mention to non-existing TPL_NET
Quentin Schulz [Mon, 20 Apr 2026 11:36:11 +0000 (13:36 +0200)] 
doc: remove mention to non-existing TPL_NET

TPL_NET symbol never existed in the first place, so let's remove this
misleading piece of documentation.

Fixes: 143c9a7e9d68 ("doc: describe TPL/VPL/SPL boot")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
22 hours agosimplify NET_LEGACY || NET_LWIP condition with NET condition
Quentin Schulz [Mon, 20 Apr 2026 11:36:10 +0000 (13:36 +0200)] 
simplify NET_LEGACY || NET_LWIP condition with NET condition

Since the move to make NET a menuconfig and NO_NET a synonym of NET=n,
when NET is enabled, NET_LEGACY || NET_LWIP is necessarily true, so
let's simplify the various checks across the codebase.

SPL_NET_LWIP doesn't exist but SPL_NET_LEGACY is an alias for SPL_NET so
the proper symbol is still defined in SPL whenever needed.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
22 hours agonet: make NET a menuconfig (and downgrade NO_NET to a simple config)
Quentin Schulz [Mon, 20 Apr 2026 11:36:09 +0000 (13:36 +0200)] 
net: make NET a menuconfig (and downgrade NO_NET to a simple config)

This will allow a bunch of simplifications across the code base.
Disabling NET is the equivalent of today's NO_NET choice. This means
that if NET is enabled, either the legacy or lwIP stack is necessarily
selected, which allows us to simplify if NET_LEGACY || NET_LWIP into
if NET in a later commit.

Config fragments - or defconfigs including other defconfigs - setting
the network stack (NET_LEGACY or NET_LWIP) must also set NET (or unset
NO_NET) if the config they apply to - or the included defconfigs -
unsets NET (or selects NO_NET) as otherwise the NET_LEGACY and NET_LWIP
symbols are unreachable. This is the case for the two defconfig modified
in this commit.

NO_NET is now a convenience symbol which hides NET entirely to avoid
modifying many defconfigs. If one selected NO_NET to disable the
networking stack in the past, this will still work for now. Technically,
we should be using the "transitional" Kconfig attribute but that is only
available since Kconfig from Linux kernel v6.18 and we're on 6.1 right
now.

Note that this moves CONFIG_SYS_RX_ETH_BUFFER from under the Network
menu back into the main menu as it seems like it needs to be defined
even when there's no need for NET support at all and menuconfig option
doesn't work the same way as a menu.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
22 hours agorename NET to NET_LEGACY
Quentin Schulz [Mon, 20 Apr 2026 11:36:08 +0000 (13:36 +0200)] 
rename NET to NET_LEGACY

Highlight that NET really is the legacy networking stack by renaming the
option to NET_LEGACY.

This requires us to add an SPL_NET_LEGACY alias to SPL_NET as otherwise
CONFIG_IS_ENABLED(NET_LEGACY) will not work for SPL.

The "depends on !NET_LWIP" for SPL_NET clearly highlights that it is
using the legacy networking app so this seems fine to do.

This also has the benefit of removing potential confusion on NET being a
specific networking stack instead of "any" network stack.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
22 hours agomove networking menu in net/Kconfig
Quentin Schulz [Mon, 20 Apr 2026 11:36:07 +0000 (13:36 +0200)] 
move networking menu in net/Kconfig

In the main Kconfig, there are only two more menus, General Setup and
Expert, in addition to the net menu. Since the part in the main Kconfig
is mostly about selecting the network stack (legacy or lwIP), and that
we already have a net/Kconfig, let's move those to net/Kconfig to have
everything in the same place.

No intended change in behavior.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
22 hours agoMerge patch series "board: toradex: aquila-am69: Fix 16GB dual-rank DDR cfg and memor...
Tom Rini [Mon, 27 Apr 2026 17:26:25 +0000 (11:26 -0600)] 
Merge patch series "board: toradex: aquila-am69: Fix 16GB dual-rank DDR cfg and memory size detection"

Emanuele Ghidoli <emanuele.ghidoli@toradex.com> says:

This patch series:
 - fix an oversight in 16GB dual-rank DDR configuration
 - fix the memory size setup logic

Link: https://lore.kernel.org/r/20260421151604.1141082-1-ghidoliemanuele@gmail.com
22 hours agoboard: toradex: aquila-am69: Fix memory size setup logic
Emanuele Ghidoli [Tue, 21 Apr 2026 15:15:56 +0000 (17:15 +0200)] 
board: toradex: aquila-am69: Fix memory size setup logic

The hardware configuration pins are used both to select the DDR
configuration and to determine the installed memory size.

On Aquila AM69, the DDR timing patch is applied in the R5 SPL, while the
memory size fixup for the next-stage U-Boot DT is done later in the A72
SPL path.
The previous immplementation was not taking in account that the hw_cfg
value is lost both during SPL execution (board_init_f and board_init_r)
and between SPL and U-Boot proper.

Fix this by reading the hardware configuration pins when the memory size
is actually needed:
- in the R5 SPL, to select the correct DDR configuration
- in the A72 SPL, to fix up the U-Boot DT memory size and bank layout

Fixes: 3f0528882c0d ("board: toradex: add aquila am69 support")
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
22 hours agoboard: toradex: aquila-am69: Fix 16GB dual-rank DDR configuration
Emanuele Ghidoli [Tue, 21 Apr 2026 15:15:55 +0000 (17:15 +0200)] 
board: toradex: aquila-am69: Fix 16GB dual-rank DDR configuration

The 16GB dual-rank DDR configuration uses an incorrect DDRSS_PLL_FHS_CNT
value. This makes DDR initialization hang during the DDR frequency
handshake sequence.

Update DDRSS_PLL_FHS_CNT to the correct value for the 16GB dual-rank
configuration.

Fixes: 39e014f43a15 ("board: toradex: aquila-am69: Add support for 16GB dual rank memory configuration")
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
22 hours agoMerge patch series "k3-am69-aquila: Migrate to OF_UPSTREAM and add remoteproc FW...
Tom Rini [Mon, 27 Apr 2026 17:19:46 +0000 (11:19 -0600)] 
Merge patch series "k3-am69-aquila: Migrate to OF_UPSTREAM and add remoteproc FW pre-loading"

Ernest Van Hoecke <ernestvanhoecke@gmail.com> says:

This patch series migrates the Aquila AM69 to OF_UPSTREAM to receive
automatic device tree updates. It also adds remoteproc firmware
pre-loading to the environment.

Link: https://lore.kernel.org/r/20260417-elb-6911-aquila69-ofupstr-v1-0-400d93db3747@toradex.com
22 hours agoboard: toradex: aquila-am69: add remoteproc firmware pre-loading
Vitor Soares [Fri, 17 Apr 2026 13:42:04 +0000 (15:42 +0200)] 
board: toradex: aquila-am69: add remoteproc firmware pre-loading

Some use cases require remoteproc firmware to be loaded before Linux
boots. Introduce rprocsemmcboot and rproc_fw_binaries to load the
remoteproc cores from U-Boot, relying on the TI k3_rproc framework
which already handles the secure firmware variants, firmware loading,
and proper initialization.

The firmware binaries are expected to be present in the eMMC rootfs
under /lib/firmware/.

To activate, run rprocsemmcboot or add it to bootcmd:
  bootcmd=run rprocsemmcboot; bootflow scan -b

The upstream U-Boot does not yet have the remoteproc DT nodes enabled
for the Aquila AM69, making firmware loading fail. Marking as pending
waiting for remoteproc enabling, which could happen along with the
OF_UPSTREAM migration.

Signed-off-by: Vitor Soares <vitor.soares@toradex.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
22 hours agoarm: dts: k3-am69-aquila: migrate to OF_UPSTREAM
Ernest Van Hoecke [Fri, 17 Apr 2026 13:42:03 +0000 (15:42 +0200)] 
arm: dts: k3-am69-aquila: migrate to OF_UPSTREAM

Enable CONFIG_OF_UPSTREAM to receive automatic
device tree updates for the Aquila AM69.

Remove the now-obsolete device tree files:
- arch/arm/dts/k3-am69-aquila-dev.dts
- arch/arm/dts/k3-am69-aquila.dtsi

Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
22 hours agovirtio: add support for SIZE_MAX & SEG_MAX features
Christian Pötzsch [Fri, 17 Apr 2026 12:03:19 +0000 (14:03 +0200)] 
virtio: add support for SIZE_MAX & SEG_MAX features

Some virtio implementations may forward the virtio requests directly to
the underlying hw. The hw may have some restrictions in how many and how
big the requests can be. Therefore, the corresponding virtio device will
announce this limitations with the SIZE_MAX & SEG_MAX feature.

Add support for those features. Split an io request into multiple virtio
requests if more than seg_max segments would be used. Also split a
single buffer request into multiple segments if the buffer is bigger
then size_max.

Signed-off-by: Christian Pötzsch <christian.poetzsch@kernkonzept.com>
Signed-off-by: Adam Lackorzynski <adam@l4re.org>
22 hours agopci: correct PCI device enumeration to include all functions on device 0
Maximilian Brune [Wed, 22 Apr 2026 12:57:53 +0000 (14:57 +0200)] 
pci: correct PCI device enumeration to include all functions on device 0

Currently the implementation does not just skip all devices beside
device 0, it also skips all functions (besides 0) on device 0. This
broke basically all AMD platforms, since they have a lot of internal SOC
devices behind these functions.

This was detected, because the XHCI controller and therefore the USB
devices were not found by u-boot on AMD/crater platform.

PCI_MASK_BUS() returns both device and function bits, so it skips any
bdf where either device > 0 or function > 0. Using PCI_DEV() extracts
only the device number, matching the intent in only_one_child().
It therefore now checks all functions on device 0 (Linux does the same).

I build tested u-boot as coreboot payload and run it on a recent x86 AMD
platform. Devices like the XHCI controller are now found again.

Fixes: fbde868ba4aa ("pci: skip unnecessary PCIe scanning")
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
CC: Tom Rini <trini@konsulko.com>
CC: Andrew Goodbody <andrew.goodbody@linaro.org>
CC: George McCollister <george.mccollister@konsulko.com>
CC: Simon Glass <sjg@chromium.org>
24 hours agoMerge patch series "Add support for DT overlays handoff"
Tom Rini [Mon, 27 Apr 2026 15:44:40 +0000 (09:44 -0600)] 
Merge patch series "Add support for DT overlays handoff"

Raymond Mao <raymond.mao@linaro.org> says:

The series include refactoring on bloblist and fdtdec to support handoff
of multiple DT overlays and applying them into the DT base during setup.
All changes are aligned to the spec update for supporting DT overlay
handoff[1].

Notes for testing:

Currently DT overlay is not yet enabled in TF-A, but with the test
patches I provided for TF-A and OP-TEE build, importing a DT overlay
blob file from QEMU to TF-A reserved memory is supported.
Follow below instructions to build and run for test:
$ repo init -u https://github.com/OP-TEE/manifest.git -m qemu_v8.xml
Replace your local qemu_v8.xml with [2], which contains all necessary
changes in both TF-A and OP-TEE build.
$ repo sync
$ cd build
$ make toolchains
$ make ARM_FIRMWARE_HANDOFF=y all
Copy and rename your DT overlay blob as 'qemu_v8.dtb' into out/bin
$ make ARM_FIRMWARE_HANDOFF=y run-only

[1] Add Transfer Entry for Devicetree Overlay
https://github.com/FirmwareHandoff/firmware_handoff/pull/74

[2] https://github.com/raymo200915/optee_manifest/blob/dt_overlay_handoff/qemu_v8.xml

Link: https://lore.kernel.org/r/20250718141621.3147633-1-raymond.mao@linaro.org
24 hours agoconfigs: Select OF_LIBFDT_OVERLAY to hand over DTO via bloblist
Raymond Mao [Fri, 18 Jul 2025 14:16:19 +0000 (07:16 -0700)] 
configs: Select OF_LIBFDT_OVERLAY to hand over DTO via bloblist

Select OF_LIBFDT_OVERLAY for qemu_arm64 and vexpress_fvp_bloblist
to hand over DTO via bloblist.

Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Tested-by: Michal Simek <michal.simek@amd.com>
24 hours agofdtdec: apply DT overlays from bloblist
Raymond Mao [Fri, 18 Jul 2025 14:16:18 +0000 (07:16 -0700)] 
fdtdec: apply DT overlays from bloblist

During FDT setup, apply all existing DT overlays from the bloblist
to the base FDT if bloblist is being used for handoff from previous
boot stage.
According to the Firmware Handoff spec update to support DT overlay [1],
an overlay must have the same top-level compatible string as its target
base DT has.
Before applying the overlays, check whether sufficient space is
reserved in the base DT blob, if not, resize the blob to the allowed
padded size, which is limited by CONFIG_SYS_FDT_PAD and the bloblist
spare space size.
After all overlays are applied, resize the merged DT to its actual size.

[1] Add Transfer Entry for Devicetree Overlay
https://github.com/FirmwareHandoff/firmware_handoff/pull/74

Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Michal Simek <michal.simek@amd.com>
24 hours agobloblist: add API for applying blobs with specified tag
Raymond Mao [Fri, 18 Jul 2025 14:16:17 +0000 (07:16 -0700)] 
bloblist: add API for applying blobs with specified tag

Add an API to search for the blobs with specified tag and use the
hook function to apply the blob data.
Add a helper function to return the inline header size as according
to recent spec[1] updates, the actual data can be following an inline
header instead of following the TE header immediately.

[1] Firmware Handoff spec:
https://github.com/FirmwareHandoff/firmware_handoff

Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Michal Simek <michal.simek@amd.com>
24 hours agobloblist: fix a potential negative size for memmove
Raymond Mao [Fri, 18 Jul 2025 14:16:16 +0000 (07:16 -0700)] 
bloblist: fix a potential negative size for memmove

It causes a panic when blob is shrunk and 'new_alloced' is less than
'next_ofs'. The data area that needs to be moved should end up at
'hdr->used_size'.

Fixes: 1fe59375498f ("bloblist: Support resizing a blob")
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Michal Simek <michal.simek@amd.com>
24 hours agobloblist: add helper functions
Raymond Mao [Fri, 18 Jul 2025 14:16:15 +0000 (07:16 -0700)] 
bloblist: add helper functions

Add two helper functions for:
1. marking a blob void
2. getting blob record from a given blob data pointer.

Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Michal Simek <michal.simek@amd.com>
24 hours agobloblist: add blob type for DT overlay
Raymond Mao [Fri, 18 Jul 2025 14:16:14 +0000 (07:16 -0700)] 
bloblist: add blob type for DT overlay

Add blob type for DT overlay according to the update of Firmware
Handoff spec[1].
Add an inline header to represent the 'subtype' in a DT overlay
blob payload.

[1] Add Transfer Entry for Devicetree Overlay
https://github.com/FirmwareHandoff/firmware_handoff/pull/74

Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Michal Simek <michal.simek@amd.com>
25 hours agoMerge branch 'casey/qcom-main-13Apr2026' of https://source.denx.de/u-boot/custodians...
Tom Rini [Mon, 27 Apr 2026 14:05:40 +0000 (08:05 -0600)] 
Merge branch 'casey/qcom-main-13Apr2026' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon

Various Qualcomm additions this cycle:
* USB superspeed support for 1 platform
* Initial support for the Milos platform and the Fairphone Gen 6
  (chainloaded from ABL)
* Improved support for booting with OP-TEE on supported platforms
* Initial basic power domain support

Notably there is a generic change to the device core, missing power
domains will no longer cause a device to fail probe and instead will
just print a warning. This shouldn't affect any existing platforms.

25 hours agoMerge tag 'u-boot-ufs-20260427' of https://source.denx.de/u-boot/custodians/u-boot-ufs
Tom Rini [Mon, 27 Apr 2026 14:04:22 +0000 (08:04 -0600)] 
Merge tag 'u-boot-ufs-20260427' of https://source.denx.de/u-boot/custodians/u-boot-ufs

- Update line reset configuration for rcar-gen5
- core: Fix heap corruption due to out of bounds write
- rockchip: Make use of controller resets

25 hours agoMerge tag 'u-boot-amlogic-next-20260427' of https://source.denx.de/u-boot/custodians...
Tom Rini [Mon, 27 Apr 2026 14:04:06 +0000 (08:04 -0600)] 
Merge tag 'u-boot-amlogic-next-20260427' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

- enable EFI Capsule on Disk (+ sysreset fixup/cleanup)
- do not fail when setting SD_EMMC_x_CLK0 on GX/G12

29 hours agoqcom_defconfig: Disable EFI_HAVE_RUNTIME_RESET in qcom_defconfig
Aswin Murugan [Tue, 24 Mar 2026 17:59:13 +0000 (23:29 +0530)] 
qcom_defconfig: Disable EFI_HAVE_RUNTIME_RESET in qcom_defconfig

Qualcomm platforms rely on the kernel to manage specialized reboot modes
such as EDL, bootloader entry, and other vendor-specific reset flows.
Allowing U-Boot to override these via EFI runtime reset services leads to
incorrect behavior when the kernel issues advanced reboot requests.

Now that EFI_HAVE_RUNTIME_RESET is exposed as a user-configurable Kconfig
option, disable it for qcom_defconfig so that the kernel retains full
control over reboot handling on Qualcomm SoCs.

This ensures that EFI runtime reboot callbacks are not registered on
these platforms, preventing conflicts with kernel-managed PSCI reset
paths.

Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Link: https://patch.msgid.link/20260324175913.92858-3-aswinm@qti.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agoefi_loader: make EFI_HAVE_RUNTIME_RESET a user-selectable option
Aswin Murugan [Tue, 24 Mar 2026 17:59:12 +0000 (23:29 +0530)] 
efi_loader: make EFI_HAVE_RUNTIME_RESET a user-selectable option

Expose EFI_HAVE_RUNTIME_RESET as a proper Kconfig boolean with a prompt
so platforms can explicitly enable or disable advertising the EFI reset
runtime service.

The current PSCI-based EFI runtime reset implementation is always
enabled whenever CONFIG_PSCI_RESET is selected, but it does not support
passing the additional arguments required for specialized reset modes.
As a result, reboot requests such as bootloader mode or EDL mode cannot
be propagated correctly and instead fall back to a normal reboot.

By making EFI_HAVE_RUNTIME_RESET user-configurable, platforms that
depend on extended PSCI reset can now explicitly disable EFI runtime
reset handling even when CONFIG_PSCI_RESET is enabled, ensuring
that the kernel retains full control of advanced reboot paths.

Default behavior for existing platforms remains unchanged.

Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Link: https://patch.msgid.link/20260324175913.92858-2-aswinm@qti.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agodts: qcs6490-rb3gen2: Remove USB controller dr_mode override
Balaji Selvanathan [Tue, 24 Mar 2026 15:46:55 +0000 (21:16 +0530)] 
dts: qcs6490-rb3gen2: Remove USB controller dr_mode override

Remove the USB controller dr_mode override from the u-boot device
tree. The upstream Linux device tree already configures the USB
controller with dr_mode = "otg", which supports both host and
peripheral modes including fastboot.

The previous override to "host" mode prevented fastboot from working
as it requires peripheral mode support. By removing this override,
the upstream OTG configuration is inherited, enabling fastboot while
maintaining host mode capability through the usb-role-switch
property.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://patch.msgid.link/20260324-kodiak_dts-v2-1-243c28a3ffb9@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agoboard/qualcomm: add debug config fragment for Milos
Luca Weiss [Wed, 18 Mar 2026 12:46:33 +0000 (13:46 +0100)] 
board/qualcomm: add debug config fragment for Milos

Add a fragment similar to others to enable earlycon.

Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://patch.msgid.link/20260318-milos-bringup-v2-7-650b91dd75d8@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agoqcom_defconfig: Enable Milos clock driver
Luca Weiss [Wed, 18 Mar 2026 12:46:32 +0000 (13:46 +0100)] 
qcom_defconfig: Enable Milos clock driver

Enable the driver so that Milos devices can boot with qcom_defconfig.

Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://patch.msgid.link/20260318-milos-bringup-v2-6-650b91dd75d8@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agogpio: qcom: Support GPIOs on PM7550 PMIC
Luca Weiss [Wed, 18 Mar 2026 12:46:31 +0000 (13:46 +0100)] 
gpio: qcom: Support GPIOs on PM7550 PMIC

The GPIOs on PM7550 work fine using the qcom_spmi_gpio driver and
enables the use of the Volume Up button on the Fairphone (Gen. 6)
smartphone.

Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://patch.msgid.link/20260318-milos-bringup-v2-5-650b91dd75d8@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agoregulator: qcom-rpmh-regulator: add support for PM7550 regulators
Luca Weiss [Wed, 18 Mar 2026 12:46:30 +0000 (13:46 +0100)] 
regulator: qcom-rpmh-regulator: add support for PM7550 regulators

Add the PM7550 regulator data found on Qualcomm Milos devices.
The tables are imported from the Linux driver (tag v7.0-rc4). The SMPS
regulators were not added now.

Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://patch.msgid.link/20260318-milos-bringup-v2-4-650b91dd75d8@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agophy: qcom: Add Milos to QMP UFS PHY driver
Luca Weiss [Wed, 18 Mar 2026 12:46:29 +0000 (13:46 +0100)] 
phy: qcom: Add Milos to QMP UFS PHY driver

Import the configuration for the Milos SoC from Linux (tag v7.0-rc4).

Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://patch.msgid.link/20260318-milos-bringup-v2-3-650b91dd75d8@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agoclk/qcom: Add Milos clock driver
Luca Weiss [Wed, 18 Mar 2026 12:46:28 +0000 (13:46 +0100)] 
clk/qcom: Add Milos clock driver

Add Clock driver for the GCC block found in the Milos SoC.

The qcom-snps-eusb2-hsphy driver requires the TCXO frequency ("ref"
clock), so we need to pass that as well.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://patch.msgid.link/20260318-milos-bringup-v2-2-650b91dd75d8@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agodrivers: pinctrl: Add Qualcomm Milos TLMM driver
Luca Weiss [Wed, 18 Mar 2026 12:46:27 +0000 (13:46 +0100)] 
drivers: pinctrl: Add Qualcomm Milos TLMM driver

Add support for TLMM pin controller block (Top Level Mode Multiplexer)
on Milos SoC, with support for special pins.

Correct pin configuration is required for working debug UART and eMMC/SD
cards.

Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://patch.msgid.link/20260318-milos-bringup-v2-1-650b91dd75d8@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agoclk: qcom: sc7280: add missing SDCC1 clocks
Ajit Singh [Thu, 26 Feb 2026 19:32:17 +0000 (01:02 +0530)] 
clk: qcom: sc7280: add missing SDCC1 clocks

Add GCC_SDCC1_AHB_CLK and GCC_SDCC1_APPS_CLK gate clocks.
Required on platforms where SDCC1 is used for eMMC.

Link: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit?id=a3cc092196ef63570c8744c3ac88c3c6c67ab44b
Signed-off-by: Ajit Singh <blfizzyy@gmail.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://patch.msgid.link/20260226193217.82657-1-blfizzyy@gmail.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agoboard/qualcomm: Introduce TF-A and OP-TEE config fragment
Sumit Garg [Tue, 27 Jan 2026 06:23:41 +0000 (11:53 +0530)] 
board/qualcomm: Introduce TF-A and OP-TEE config fragment

Recently upstream TF-A/OP-TEE has started gaining support for Qcom
platforms. RB3Gen2 being the first one and more to come. U-Boot in
corresponding boot flow is packaged as a position independent executable.

So, lets add a generic U-Boot config fragment for Qcom platforms to
support TF-A/OP-TEE based TrustZone stack. Build command:

$ ./scripts/kconfig/merge_config.sh \
       configs/qcom_defconfig \
       board/qualcomm/tfa-optee.config
$ make -j`nproc` DEVICE_TREE=qcom/qcs6490-rb3gen2

For more information refer here:
https://trustedfirmware-a.readthedocs.io/en/latest/plat/qti/rb3gen2.html

Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20260127062341.723966-4-sumit.garg@kernel.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agomach-snapdragon: of_fixup: Add OP-TEE DT fixup support
Sumit Garg [Tue, 27 Jan 2026 06:23:40 +0000 (11:53 +0530)] 
mach-snapdragon: of_fixup: Add OP-TEE DT fixup support

Add support for OP-TEE live tree DT fixup support which enables U-Boot
OP-TEE driver to be probed. As well as the EFI DT fixup protocol allows
the live tree fixup to be carried over to the OS for the OP-TEE driver
in the OS to probe as well.

Note that this fixup only gets applied if OP-TEE support is detected via
checking for OP-TEE message UID.

Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://patch.msgid.link/20260127062341.723966-3-sumit.garg@kernel.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agotee: optee: Export OP-TEE message UID check API
Sumit Garg [Tue, 27 Jan 2026 06:23:39 +0000 (11:53 +0530)] 
tee: optee: Export OP-TEE message UID check API

OP-TEE message UID check API can be useful to know whether OP-TEE
is enabled on not assuming the corresponding SMC call is properly
handled if OP-TEE is not supported.

This API can be used by platform code to know OP-TEE presence and
on that basis OP-TEE DT node can be added as part of DT fixups for
the OP-TEE driver probe to happen for both U-Boot and Linux.

Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20260127062341.723966-2-sumit.garg@kernel.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agoqcom_defconfig: enable psci based sysreset
Varadarajan Narayanan [Wed, 21 Jan 2026 06:39:20 +0000 (12:09 +0530)] 
qcom_defconfig: enable psci based sysreset

Enable CONFIG_SYSRESET_QCOM_PSCI to allow U-Boot to reset to Emergency
Download mode.

Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Link: https://patch.msgid.link/20260121063920.1500293-6-varadarajan.narayanan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agocmd: boot: Add '-edl' option to reset command documentation
Varadarajan Narayanan [Wed, 21 Jan 2026 06:39:19 +0000 (12:09 +0530)] 
cmd: boot: Add '-edl' option to reset command documentation

Add help text about '-edl' option to reset command definition and
related documentation.

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Link: https://patch.msgid.link/20260121063920.1500293-5-varadarajan.narayanan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agosysreset: Implement PSCI based reset to EDL mode for QCOM SoCs
Varadarajan Narayanan [Wed, 21 Jan 2026 06:39:18 +0000 (12:09 +0530)] 
sysreset: Implement PSCI based reset to EDL mode for QCOM SoCs

Implement request_arg() sysreset_op for QCOM SoCs that use
PSCI to reset to EDL (Emergency Download) mode.

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Link: https://patch.msgid.link/20260121063920.1500293-4-varadarajan.narayanan@oss.qualcomm.com
[casey: add missing ARM_SMCCC depends to kconfig to fix CI allyesconfig]
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agodrivers: sysreset: Add sysreset op that can take arguments
Varadarajan Narayanan [Wed, 21 Jan 2026 06:39:17 +0000 (12:09 +0530)] 
drivers: sysreset: Add sysreset op that can take arguments

Add a 'request_arg' op to struct sysreset_ops to enable sysreset drivers
to receive arguments given to the 'reset' command. Process the
request_arg() op before the usual request() op.

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Link: https://patch.msgid.link/20260121063920.1500293-3-varadarajan.narayanan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agoarm: psci: Add API to check for support of specific PSCI function
Varadarajan Narayanan [Wed, 21 Jan 2026 06:39:16 +0000 (12:09 +0530)] 
arm: psci: Add API to check for support of specific PSCI function

Add an API to check if a specific PSCI function is supported or not.
This is based on the psci_features() function present in Linux kernel
(drivers/firmware/psci/psci.c).

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Link: https://patch.msgid.link/20260121063920.1500293-2-varadarajan.narayanan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agoMAINTAINERS: Add entry for Qualcomm PHY drivers
Balaji Selvanathan [Wed, 3 Dec 2025 11:07:35 +0000 (16:37 +0530)] 
MAINTAINERS: Add entry for Qualcomm PHY drivers

Add the file pattern for Qualcomm PHY drivers to the MAINTAINERS file.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Link: https://patch.msgid.link/20251203110735.1959862-7-balaji.selvanathan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agoconfigs: qcm6490: Enable super-speed USB support
Balaji Selvanathan [Wed, 3 Dec 2025 11:07:34 +0000 (16:37 +0530)] 
configs: qcm6490: Enable super-speed USB support

Enable the QMP Combo PHY driver to allow super-speed USB
operation on QCM6490 platforms.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Link: https://patch.msgid.link/20251203110735.1959862-6-balaji.selvanathan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agoarch: arm: mach-snapdragon: Auto-detect USB SSPHY driver support
Balaji Selvanathan [Wed, 3 Dec 2025 11:07:33 +0000 (16:37 +0530)] 
arch: arm: mach-snapdragon: Auto-detect USB SSPHY driver support

Automatically detect super-speed USB PHY driver availability and
skip the USB speed fixup if driver is available, eliminating the need
for manual configuration.

Previously, U-Boot unconditionally limited USB to high-speed mode
on all Qualcomm platforms because most lacked super-speed PHY
drivers.

This change implements runtime detection that checks if a PHY
driver exists for the super-speed PHY node referenced by the DWC3
controller. The fixup is automatically skipped when a compatible
driver is found, allowing the hardware to operate at full
capability. Platforms without super-speed PHY drivers continue to
receive the fixup automatically.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
[casey: rebased on flat-dwc3 dt support + fix Balaji's signoff]
[casey: make erroneous printf() a debug() again]
Link: https://patch.msgid.link/20251203110735.1959862-5-balaji.selvanathan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agodrivers: phy: qcom: Add QMP USB3-DP Combo PHY driver
Balaji Selvanathan [Wed, 3 Dec 2025 11:07:32 +0000 (16:37 +0530)] 
drivers: phy: qcom: Add QMP USB3-DP Combo PHY driver

Add support for the Qualcomm QMP USB3-DP Combo PHY found on
SC7280 and QCM6490 platforms. This driver currently implements
USB3 super-speed functionality of the combo PHY.

The QMP Combo PHY is a dual-mode PHY
that can operate in either USB3 mode or DisplayPort mode. This
initial implementation focuses on USB3 mode to enable Super-Speed
USB support.

Taken from Linux commit 3d25d46a255a ("pmdomain: qcom: rpmhpd: Add rpmhpd support for SM8750")

This patch is dependent on this patch: https://lore.kernel.org/u-boot/20251112164204.1557934-1-aswin.murugan@oss.qualcomm.com/

Enabled and tested the driver on Qualcomm RB3 Gen2 (QCS6490) board.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Link: https://patch.msgid.link/20251203110735.1959862-4-balaji.selvanathan@oss.qualcomm.com
[casey: fix unused variable warning]
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agodrivers: usb: dwc3: Add delay after core soft reset
Balaji Selvanathan [Wed, 3 Dec 2025 11:07:31 +0000 (16:37 +0530)] 
drivers: usb: dwc3: Add delay after core soft reset

Add a 100 ms delay after clearing the core soft reset bit to ensure
the DWC3 controller has sufficient time to complete its reset
sequence before subsequent register accesses.

Without this delay, USB initialization can fail on some Qualcomm
platforms, particularly when using super-speed capable PHYs like
the QMP USB3-DP Combo PHY on SC7280/QCM6490.

Taken from Linux commit f88359e1588b ("usb: dwc3: core: Do core softreset when switch mode")

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Link: https://patch.msgid.link/20251203110735.1959862-3-balaji.selvanathan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agodrivers: clk: qcom: sc7280: Add USB3 PHY pipe clock
Balaji Selvanathan [Wed, 3 Dec 2025 11:07:30 +0000 (16:37 +0530)] 
drivers: clk: qcom: sc7280: Add USB3 PHY pipe clock

Add support for GCC_USB3_PRIM_PHY_PIPE_CLK which is required by
the USB3 PHY on SC7280/QCM6490 platforms.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20251203110735.1959862-2-balaji.selvanathan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agomach-snapdragon: allocate memory for DT overlays
Antony Kurniawan Soemardi [Tue, 17 Feb 2026 08:51:34 +0000 (08:51 +0000)] 
mach-snapdragon: allocate memory for DT overlays

Allocate a 1 MiB LMB region for fdtoverlay_addr_r when
CONFIG_OF_LIBFDT_OVERLAY is enabled, allowing runtime application of
DT overlays on Snapdragon platforms.

This is useful for Android-based boot flows where the final DT passed
to the kernel must contain modified /firmware/android/fstab entries.
One use case is redirecting system and vendor partitions to microSD
storage instead of internal eMMC without rebuilding the base DTB.

The allocation is conditional on CONFIG_OF_LIBFDT_OVERLAY and has no
effect on boards that do not enable overlay support.

Signed-off-by: Antony Kurniawan Soemardi <linux@smankusors.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20260217-qcom-fdt-overlay-v1-1-d0fa0e70d738@smankusors.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agoqcom_defconfig: Add QCOM_RPMH_POWER_DOMAIN config
Aswin Murugan [Fri, 13 Feb 2026 11:10:09 +0000 (16:40 +0530)] 
qcom_defconfig: Add QCOM_RPMH_POWER_DOMAIN config

Enable QCOM_RPMH_POWER_DOMAIN config for qualcomm devices

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://patch.msgid.link/20260213111009.1254360-5-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agomach-snapdragon: Remove RPMH power domain DT fixup code
Aswin Murugan [Fri, 13 Feb 2026 11:10:08 +0000 (16:40 +0530)] 
mach-snapdragon: Remove RPMH power domain DT fixup code

Remove the device tree fixup code that was stripping power-domains
properties from device tree nodes. This fixup was a temporary
workaround needed when RPMH power domain driver support was not
available in U-Boot.

Now that RPMH power domain driver support has been added, the power
domain properties can be preserved in the device tree, allowing proper
power domain management. If a suitable power domain driver is not found
for the power-controller node, it will be handled with a warning in
dev_power_domain_ctrl().

Reviewed-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://patch.msgid.link/20260213111009.1254360-4-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agopower-domain: Add warning when power-domain driver is missing
Aswin Murugan [Fri, 13 Feb 2026 11:10:07 +0000 (16:40 +0530)] 
power-domain: Add warning when power-domain driver is missing

Update dev_power_domain_ctrl() to log a warning if the power-domain
driver is not found (-ENODEV). Return 0 in this case to allow continued
execution, while preserving error handling for other failures.

Reviewed-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://patch.msgid.link/20260213111009.1254360-3-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agopower-domain: Add QCOM RPMH Power Domain Driver Support
Balaji Selvanathan [Fri, 13 Feb 2026 11:10:06 +0000 (16:40 +0530)] 
power-domain: Add QCOM RPMH Power Domain Driver Support

Added support for Qualcomm RPMH power domain driver, responsible
for managing power domains on Qualcomm SoCs. This is a port of
the Linux RPMHPD driver [1] and sa8775p related changes. The
power domain driver currently has support to power on and off
MMCX power domain of sa8775p; support for other soc entries power
domains are stubbed, in future, the required soc support can be
added.

[1]:
https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/pmdomain/qcom/rpmhpd.c?id=3d25d46a255a83f94d7d4d4216f38aafc8e116b

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://patch.msgid.link/20260213111009.1254360-2-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
29 hours agopinctrl: qcom: Add pingroup definitions for SC7280
Aswin Murugan [Wed, 12 Nov 2025 16:54:59 +0000 (22:24 +0530)] 
pinctrl: qcom: Add pingroup definitions for SC7280

Added pingrp support to sc7280 pinctrl driver based on the
similar U-Boot and Linux drivers.

Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://patch.msgid.link/20251112165459.1560966-1-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
43 hours agoMerge branch 'master' of git://source.denx.de/u-boot-usb
Tom Rini [Sun, 26 Apr 2026 20:06:53 +0000 (14:06 -0600)] 
Merge branch 'master' of git://source.denx.de/u-boot-usb

- Renesas RZ/G2L (R9A07G044) USB gadget support

43 hours agoMAINTAINERS, mailmap: Change email for Eugen Hristev
Eugen Hristev [Sun, 26 Apr 2026 05:47:39 +0000 (08:47 +0300)] 
MAINTAINERS, mailmap: Change email for Eugen Hristev

Replace old bouncing emails with ehristev@kernel.org

Signed-off-by: Eugen Hristev <ehristev@kernel.org>
2 days agousb: gadget: rcar: Add support for RZ/G2L (R9A07G044)
Michele Bisogno [Sun, 26 Apr 2026 07:43:19 +0000 (09:43 +0200)] 
usb: gadget: rcar: Add support for RZ/G2L (R9A07G044)

The Renesas RZ/G2L (and RZ/G2LC) USBHS controller requires the
CNEN bit in the SYSCFG register to be set for function operation.
Additionally, its CFIFO is byte-addressable.

Introduce a new renesas_usbhs_driver_param structure for the
RZ/G2L SoC and link it via the udevice_id data pointer. Update
usbhs_probe() to accept the udevice pointer to retrieve these
parameters during initialization.

This alignment follows the logic used in the Linux kernel
renesas_usbhs driver.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Michele Bisogno <micbis.openwrt@gmail.com>
2 days agousb: gadget: rcar: Add support for reset controller
Michele Bisogno [Sun, 26 Apr 2026 07:43:18 +0000 (09:43 +0200)] 
usb: gadget: rcar: Add support for reset controller

Some Renesas SoCs, such as the RZ/G2L, require the USBHS core to
be explicitly deasserted from reset before register access is
possible.

Update the OTG probe to handle a bulk reset controller. To maintain
hardware stability, the reset is deasserted after clocks are
enabled in probe(), and asserted before clocks are disabled
in remove().

Update the error paths in probe to ensures clocks are disabled
if the reset initialization fails.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Michele Bisogno <micbis.openwrt@gmail.com>
2 days agousb: gadget: rcar: Fix gadget registration lifecycle in remove
Michele Bisogno [Sun, 26 Apr 2026 07:43:17 +0000 (09:43 +0200)] 
usb: gadget: rcar: Fix gadget registration lifecycle in remove

The driver currently fails to unregister the USB gadget when the
device is removed or the driver is unbound. This leads to dangling
pointers in the UDC core and potential memory corruption.

Add a call to usb_del_gadget_udc() in the remove path to ensure
a clean teardown of the gadget interface.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Michele Bisogno <micbis.openwrt@gmail.com>
3 days agoMakefile: fix host CPP pollution in cmd_gen_envp 939/head
Levi Shafter [Fri, 17 Apr 2026 22:45:09 +0000 (16:45 -0600)] 
Makefile: fix host CPP pollution in cmd_gen_envp

Commit 2956a84ba701 ("Makefile: don't use CFLAGS for environment text
file") switched cmd_gen_envp to use $(cpp_flags) so that KCPPFLAGS would
be honored when preprocessing the environment text file. However,
cpp_flags also includes $(PLATFORM_CPPFLAGS), which carries
architecture-specific flags such as -march=armv8-a+crc set by
arch/arm/Makefile for CONFIG_ARM64_CRC32=y targets. These flags are
appropriate for cross-compiled object files but cause the host CPP
invocation to fail on x86 build machines:

  cc1: error: bad value ('armv8-a+crc') for '-march=' switch

KBUILD_CPPFLAGS already accumulates the user-supplied KCPPFLAGS via
"KBUILD_CPPFLAGS += $(KCPPFLAGS)", providing the behaviour 2956a84
intended without pulling in target architecture flags. Use it directly.

Fixes: 2956a84ba701 ("Makefile: don't use CFLAGS for environment text file")
Signed-off-by: Levi Shafter <levi.shafter@elder-tomes.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 days agoscripts/dtc: avoid discarded qualifiers in overlay_fixup_phandle
Heinrich Schuchardt [Sat, 18 Apr 2026 18:15:10 +0000 (20:15 +0200)] 
scripts/dtc: avoid discarded qualifiers in overlay_fixup_phandle

When building with GCC 15.2 the following warning show up:

    scripts/dtc/libfdt/fdt_overlay.c:422:21: warning:
    assignment discards ‘const’ qualifier from pointer target type
    [-Wdiscarded-qualifiers]
      422 |                 sep = memchr(fixup_str, ':', fixup_len);
          |                     ^
    scripts/dtc/libfdt/fdt_overlay.c:432:21: warning:
    assignment discards ‘const’ qualifier from pointer target type
    [-Wdiscarded-qualifiers]
      432 |                 sep = memchr(name, ':', fixup_len);
          |                     ^

Define sep as const char *.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
3 days agotools/asn1_compiler: avoid -Wdiscarded-qualifiers
Heinrich Schuchardt [Sat, 18 Apr 2026 06:32:13 +0000 (08:32 +0200)] 
tools/asn1_compiler: avoid -Wdiscarded-qualifiers

Building with GCC 15.2 results in warnings:

    tools/asn1_compiler.c: In function ‘tokenise’:
    tools/asn1_compiler.c:442:37: warning:
    assignment discards ‘const’ qualifier from pointer target type
    [-Wdiscarded-qualifiers]
      442 |             dir = bsearch(&tokens[tix], directives,
          |                 ^

    tools/asn1_compiler.c: In function ‘main’:
    tools/asn1_compiler.c:632:11: warning:
    assignment discards ‘const’ qualifier from pointer target type
    [-Wdiscarded-qualifiers]
      632 |         p = strchr(grammar_name, '.');
          |           ^

bsearch() is defined as

       void *bsearch(size_t n, size_t size;
                     const void key[size], const void base[size * n],
                     size_t n, size_t size,
                     typeof(int (const void [size], const void [size]))
                         *compar);

* Use the correct type for dir.

strchr() is defined as

        char *strchr(const char *s, int c).

* Use a conversion for the assignment to p.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 days agocommon: update: Fix TFTP return value handling
Marek Vasut [Mon, 20 Apr 2026 01:23:07 +0000 (03:23 +0200)] 
common: update: Fix TFTP return value handling

The net_loop() returns 1 on success, but update_load() returns 0 on
success. Do not assign rv which is the return value of update_load()
to net_loop(), instead assign net_loop() return value to a temporary
variable and then update rv only if the temporary variable is negative.
This way the update_load() now correctly returns 0 on tftp success and
1 only on failure.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
3 days agofs/squashfs: Set ret to 0 on successful read
Michael Zimmermann [Mon, 20 Apr 2026 16:35:31 +0000 (18:35 +0200)] 
fs/squashfs: Set ret to 0 on successful read

It might still be a positive number due to the call to sqfs_disk_read.
This only happens when reading a file from an uncompressed squashfs.

I found this by trying to boot using the extlinux bootmethod, where
positive values are treated as errors.

Signed-off-by: Michael Zimmermann <sigmaepsilon92@gmail.com>
Acked-by: Richard Genoud <richard.genoud@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 days agoMailmap entry for Javier Tia
Heinrich Schuchardt [Fri, 17 Apr 2026 17:33:45 +0000 (19:33 +0200)] 
Mailmap entry for Javier Tia

Javier has left Linaro. Forward to his new email address.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Javier Tia <floss@jetm.me>
4 days agolib/Kconfig: Fix SUPPORTS_FW_LOADER option
David Lechner [Wed, 15 Apr 2026 21:37:27 +0000 (16:37 -0500)] 
lib/Kconfig: Fix SUPPORTS_FW_LOADER option

Change the SUPPORTS_FW_LOADER option to be enabled by default.

This is a dependency-only option intended to be used like:
    depends on SUPPORTS_FW_LOADER

Instead of having to always remember to do both:
    depends on CMDLINE
    depends on ENV_SUPPORT

In order to actually work though, the option has to be enabled.

Reported-by: Weijie Gao <weijie.gao@mediatek.com>
Closes: https://lore.kernel.org/u-boot/20260410015311.4066075-1-weijie.gao@mediatek.com/
Fixes: 4ed440e6be80 ("fw_loader: Introduce SUPPORTS_FW_LOADER symbol")
Signed-off-by: David Lechner <dlechner@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
5 days agoMerge tag 'xilinx-for-v2026.07-rc1-v3' of https://source.denx.de/u-boot/custodians...
Tom Rini [Thu, 23 Apr 2026 13:46:01 +0000 (07:46 -0600)] 
Merge tag 'xilinx-for-v2026.07-rc1-v3' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

AMD/Xilinx/FPGA changes for v2026.07-rc1 v3. The biggest part is new
pcie driver for Versal Gen 2 SOC. Others are small fixes and
adjustments.

versal2:
- Wire PCIe IP

cmd/fpga:
- Fix loadb help text guarding
- Add support for skipping fpga ID check

zynqmp:
- Describe missing devices/IDs
- Fix issue around zu63dr_SE

clk/versal:
- Fix out-of-bounds parent id for DUMMY_PARENT

net/gem:
- Add support for 10GBE
- Clear stale speed bits in NWCFG

net/axi_emac:
- Filter out broadcast and multicast packets

pci:
- Add driver for AMD PCIe IP based on DesignWare core

5 days agonet: zynq_gem: Clear stale speed bits in NWCFG before setting new ones
Rafał Hibner [Mon, 20 Apr 2026 07:46:40 +0000 (07:46 +0000)] 
net: zynq_gem: Clear stale speed bits in NWCFG before setting new ones

Commit ecba4380ad26 ("net: zynq_gem: Update the MDC clock divisor in the
probe function") changed zynq_gem_init() from a direct register write to
a read-modify-write pattern in order to preserve MDC clock divider bits.
However, the old speed selection bits (SPEED100/SPEED1000) are never
cleared before OR-ing in the new value.

When the PHY renegotiates at a different speed between successive calls
to zynq_gem_init() (e.g. link flapping from 1 Gbps to 100 Mbps on a
marginal cable), both SPEED100 and SPEED1000 end up set simultaneously
in NWCFG. This confuses the GEM hardware and no frames are received.

Fix by explicitly clearing both speed bits before merging the new
configuration, so only the currently negotiated speed is ever active.

Fixes: ecba4380ad26 ("net: zynq_gem: Update the MDC clock divisor in the probe function")
Signed-off-by: Rafał Hibner <rafal.hibner@secom.com.pl>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260420074640.4036119-1-rafal.hibner@secom.com.pl
5 days agofpga: xilinx: Add option to skip bitstream ID check
Michal Simek [Thu, 16 Apr 2026 17:32:02 +0000 (19:32 +0200)] 
fpga: xilinx: Add option to skip bitstream ID check

Add environment variable 'fpga_skip_idcheck' that when set to '1' or
'y' allows bypassing the device ID validation during bitstream loading.
This is useful for loading bitstreams on devices whose ID codes are not
yet recorded in the SOC driver.

Usage: setenv fpga_skip_idcheck 1
  fpga loadb 0 ${loadaddr} ${filesize}

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/d0f11d0a8d48b284683f00d20dfbe323c11f2943.1776360720.git.michal.simek@amd.com
5 days agonet: zynq_gem: reinitialize RX BDs on every init
Pranav Tilak [Fri, 10 Apr 2026 09:30:18 +0000 (15:00 +0530)] 
net: zynq_gem: reinitialize RX BDs on every init

Reinitialize RX BDs and rewrite rxqbase on every init instead of only
on the first init. This ensures a clean BD state on every init for all
GEM configurations.
For AMD Versal Gen 2 10GBE this is required since the USX block
resets the RX DMA pointer to rxqbase on each init, so BDs must be
rebuilt each time to stay in sync with hardware.

Signed-off-by: Pranav Tilak <pranav.vinaytilak@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260410093018.1461732-4-pranav.vinaytilak@amd.com
5 days agonet: zynq_gem: set 128-bit AXI bus width for 10GBE
Pranav Tilak [Fri, 10 Apr 2026 09:30:17 +0000 (15:00 +0530)] 
net: zynq_gem: set 128-bit AXI bus width for 10GBE

Set 128-bit AXI bus width in network config for 10GBE. The default 64-bit
setting causes DMA data corruption.

Signed-off-by: Pranav Tilak <pranav.vinaytilak@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260410093018.1461732-3-pranav.vinaytilak@amd.com
5 days agonet: zynq_gem: add SPEED_10000 case in clock rate selection
Pranav Tilak [Fri, 10 Apr 2026 09:30:16 +0000 (15:00 +0530)] 
net: zynq_gem: add SPEED_10000 case in clock rate selection

Add SPEED_10000 case in the speed switch with the fixed 150 MHz
tx_clk rate. Without this, clk_rate stays 0 for 10000 Mbps and
clk_set_rate(0) on a fixed clock aborts initialization.

Signed-off-by: Pranav Tilak <pranav.vinaytilak@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260410093018.1461732-2-pranav.vinaytilak@amd.com
5 days agocmd: fpga: Fix wrong preprocessor guard for loadb help text
Michal Simek [Tue, 7 Apr 2026 08:07:11 +0000 (10:07 +0200)] 
cmd: fpga: Fix wrong preprocessor guard for loadb help text

The help text for the "fpga loadb" command was incorrectly guarded by
CONFIG_CMD_FPGA_LOADP instead of CONFIG_CMD_FPGA_LOADB. This meant the
loadb help text would only be shown when LOADP was enabled, rather than
when LOADB was enabled.

Fix the preprocessor condition to use the correct config option.

Fixes: f8f378877b8f ("fpga: add new symbol for fpga_loadb")
Reviewed-by: Alexander Dahl <ada@thorsis.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/366dfe78e2028f53a6274da75547fb68844764cc.1775549229.git.michal.simek@amd.com
5 days agoboard: xilinx: zynqmp: Register alternate FPGA device for zu63dr_SE
Michal Simek [Tue, 7 Apr 2026 10:34:24 +0000 (12:34 +0200)] 
board: xilinx: zynqmp: Register alternate FPGA device for zu63dr_SE

The zu63dr_SE and zu67dr_SE devices share the same silicon ID code
0x046D7093 and cannot be distinguished at runtime. The SOC driver
reports zu67dr_SE for this ID, which causes fpga loadb to reject
zu63dr_SE bitstreams.

Register zu63dr_SE as an alternate FPGA device when zu67dr_SE is
detected. This allows users to load either bitstream by selecting
the appropriate device number:
  - Device 0 (zu67dr_SE): fpga loadb 0 ${loadaddr} ${filesize}
  - Device 1 (zu63dr_SE): fpga loadb 1 ${loadaddr} ${filesize}

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/591134b1c66701fa14a21fecac4f7a772ddba876.1775558062.git.michal.simek@amd.com
5 days agosoc: xilinx: zynqmp: Add support for new ZynqMP devices
Michal Simek [Tue, 7 Apr 2026 10:32:30 +0000 (12:32 +0200)] 
soc: xilinx: zynqmp: Add support for new ZynqMP devices

Add ID codes for the following ZynqMP devices:
- XCZU1EG_LR (0x0468A093)
- XCZU42DR (0x046D4093)
- XCZU55DR (0x046D2093)
- XCZU57DR (0x046D3093)
- XCZU58DR (0x047F9093)
- XCZU59DR (0x047FC093)
- XCZU63DR (0x046D5093)
- XCZU64DR (0x046D6093)
- XCZU65DR (0x046D1093)

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/330098196cc84115899ea7a14665a8df7e279fae.1775557948.git.michal.simek@amd.com
5 days agoamd: versal2: Enable PCIe/NVMe support and add NVMe boot target
Pranav Sanwal [Fri, 27 Mar 2026 12:10:15 +0000 (17:40 +0530)] 
amd: versal2: Enable PCIe/NVMe support and add NVMe boot target

Enable the AMD Versal Gen 2 DW PCIe host controller and NVMe storage
in the virtual platform defconfig:

- CONFIG_PCI / CONFIG_CMD_PCI: core PCI stack and pci command
- CONFIG_PCIE_DW_AMD: AMD Versal Gen 2 PCIe host driver
- CONFIG_NVME_PCI: NVMe-over-PCIe storage driver
- CONFIG_CMD_LSBLK: block device listing command
- CONFIG_DM_PCA953X: GPIO expander driver for PERST# control

Add BOOT_TARGET_DEVICES_NVME to amd_versal2.h so NVMe is included
in the distro boot target list when CONFIG_NVME is enabled.

Signed-off-by: Pranav Sanwal <pranav.sanwal@amd.com>
Link: https://lore.kernel.org/r/20260327121015.996806-4-pranav.sanwal@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
5 days agoarm: versal2: Map PCIe DBI and config regions when PCIe is enabled
Pranav Sanwal [Fri, 27 Mar 2026 12:10:14 +0000 (17:40 +0530)] 
arm: versal2: Map PCIe DBI and config regions when PCIe is enabled

The AMD Versal Gen 2 PCIe host controller places its DBI registers
(0x100000000000, 1 MB) and config space (0x100000100000, 255 MB)
above 1 TB. Without MMU entries covering these ranges, U-Boot faults
when the PCIe driver accesses them.

The two regions are merged into a single entry as these are
contiguous and share identical MMU attributes. Add this
entry under a CONFIG_IS_ENABLED(PCIE_DW_AMD) guard so it is only
included when the PCIe driver is configured. VERSAL2_MEM_MAP_USED is
adjusted from 5 to 6 accordingly, keeping the DRAM bank index correct.

Signed-off-by: Pranav Sanwal <pranav.sanwal@amd.com>
Link: https://lore.kernel.org/r/20260327121015.996806-3-pranav.sanwal@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
5 days agopci: Add AMD Versal2 DW PCIe host controller driver
Pranav Sanwal [Fri, 27 Mar 2026 12:10:13 +0000 (17:40 +0530)] 
pci: Add AMD Versal2 DW PCIe host controller driver

Add support for the DesignWare-based PCIe host controller found in
AMD Versal2 SoCs. This enables PCIe functionality (e.g. NVMe storage)
on boards such as the VEK385.

The driver builds on the existing pcie_dw_common infrastructure and
adds Versal2-specific handling: it maps the SLCR register region to
mask and clear TLP interrupt status bits, parses dbi/config/atu/slcr
register regions from device tree, and supports an optional PERST#
GPIO on child nodes for endpoint reset sequencing. The outbound iATU
is programmed for the non-prefetchable memory window from device tree
ranges.

Signed-off-by: Pranav Sanwal <pranav.sanwal@amd.com>
Link: https://lore.kernel.org/r/20260327121015.996806-2-pranav.sanwal@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
5 days agoclk: versal: Fix out-of-bounds parent id for DUMMY_PARENT
Padmarao Begari [Fri, 27 Mar 2026 10:10:32 +0000 (15:40 +0530)] 
clk: versal: Fix out-of-bounds parent id for DUMMY_PARENT

When a clock parent entry is DUMMY_PARENT (0xFFFFFFFE), masking it
with CLK_PARENTS_ID_MASK (0xFFFF) produces the value 0xFFFE (65534).
This value is stored in parent->id and later used as a clock array
index in versal_clock_get_parentid(). Since clock_max_idx is
typically 228, accessing clock[65534] is out-of-bounds, and the
garbage value read is used as a clock ID in subsequent clock rate
calculations, eventually causing U-Boot to crash. This is observed
as a crash during "clk dump" on AMD Versal Gen 2.

Fix this by setting parent->id = 0 for DUMMY_PARENT entries.

Fixes: 95105089afe2 ("clk: versal: Add clock driver support")
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260327101053.900154-1-padmarao.begari@amd.com
5 days agonet: xilinx: Reject broadcast and multicast packets in AXI Ethernet MAC
Michal Simek [Mon, 23 Mar 2026 16:09:15 +0000 (17:09 +0100)] 
net: xilinx: Reject broadcast and multicast packets in AXI Ethernet MAC

Set the XAE_RAF_BCSTREJ_MASK bit in the Reset and Address Filter (RAF)
register during hardware initialization to make the MAC drop incoming
frames with broadcast destination address. This avoids unnecessary
broadcast traffic processing by the CPU.

Additionally, when IPv6 is not enabled (CONFIG_IPV6), also set the
XAE_RAF_MCSTREJ_MASK bit to reject multicast frames. Multicast
rejection is skipped when IPv6 is configured because IPv6 Neighbor
Discovery and DHCPv6 rely on multicast.

Expose the RAF register (offset 0x0) in struct axi_regs which was
previously hidden in a reserved array.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/07ad94eb8a3a9d80273a16a7ac8c7caaba607fe2.1774282153.git.michal.simek@amd.com
5 days agoMerge patch series "test: Refactor FIT test for clarity and extensibility" 935/head
Tom Rini [Wed, 22 Apr 2026 22:52:40 +0000 (16:52 -0600)] 
Merge patch series "test: Refactor FIT test for clarity and extensibility"

Simon Glass <sjg@chromium.org> says:

This series reworks the FIT test (test_fit.py) to make it easier to
maintain and extend. It fixes the buildconfigspec so the test actually
runs on sandbox, avoids unnecessary U-Boot restarts, renames the main
test for easier selection, adds a missing-kernel check, fixes Python
warnings, converts the test to use a class, splits into separate test
functions, and adds Sphinx documentation.

Link: https://lore.kernel.org/r/20260413130007.1987326-1-sjg@chromium.org
5 days agotest: Add documentation for the FIT test
Simon Glass [Mon, 13 Apr 2026 12:59:59 +0000 (06:59 -0600)] 
test: Add documentation for the FIT test

Add a Sphinx automodule page for test_fit.py so it appears in the pytest
documentation alongside the other test modules. The index already uses a
glob pattern, so this is picked up automatically.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 days agotest: Add fsetup fixture and prepare helper for FIT test
Simon Glass [Mon, 13 Apr 2026 12:59:58 +0000 (06:59 -0600)] 
test: Add fsetup fixture and prepare helper for FIT test

Create an 'fsetup' fixture which sets up files and parameters, and a
prepare() helper which builds a FIT with given parameter overrides.

Update check_equal() and check_not_equal() to look up filenames from a
params dict by key, reducing the number of local variables needed.

Split the single test_fit_operations() into individual test functions so
that each appears separately in the results.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 days agotest: Convert FIT test to use a class
Simon Glass [Mon, 13 Apr 2026 12:59:57 +0000 (06:59 -0600)] 
test: Convert FIT test to use a class

Move this test over to use a class instead of a function, so we can
easily split it into some related tests.

Move the TODO so it is part of the comment for the class.

Tidy up some function comments while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 days agotest: Update fit test to fix a few Python warnings
Simon Glass [Mon, 13 Apr 2026 12:59:56 +0000 (06:59 -0600)] 
test: Update fit test to fix a few Python warnings

Fix some warnings and disable one that cannot be fixed.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 days agotest: Add a check for a missing kernel
Simon Glass [Mon, 13 Apr 2026 12:59:55 +0000 (06:59 -0600)] 
test: Add a check for a missing kernel

U-Boot should complain if the kernel is missing, so add a check for this
in test_fit_base()

Signed-off-by: Simon Glass <sjg@chromium.org>
5 days agotest: Rename test_fit() to test_fit_base()
Simon Glass [Mon, 13 Apr 2026 12:59:54 +0000 (06:59 -0600)] 
test: Rename test_fit() to test_fit_base()

The current name is uses as a root name by a few other tests, such as
test_fit_ecdsa() which makes it hard to run just this test.

Rename it to test_fit_base()

Signed-off-by: Simon Glass <sjg@chromium.org>
5 days agotest: fit: Avoid restarting U-Boot
Simon Glass [Mon, 13 Apr 2026 12:59:53 +0000 (06:59 -0600)] 
test: fit: Avoid restarting U-Boot

We don't actually need to use the test FDT as the control FDT. It slows
down the test since U-Boot needs to be restarted each time.

Instead of restarting, update the test to clear memory before it loads
the FIT.

Rename the data-variable to fdt_data since is it no-longer the control
FDT.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 days agotest: fit: Drop the fit_signature buildconfigspec
Simon Glass [Mon, 13 Apr 2026 12:59:52 +0000 (06:59 -0600)] 
test: fit: Drop the fit_signature buildconfigspec

The test_fit test requires buildconfigspec('fit_signature') but does
not exercise signature verification. The ITS template includes a
signature-1 node, but mkimage only needs TOOLS_FIT_SIGNATURE (a host
tool option) to handle it, not CONFIG_FIT_SIGNATURE in the U-Boot
binary.

Since sandbox does not enable CONFIG_FIT_SIGNATURE, the test is silently
skipped on every run. Change the marker to buildconfigspec('fit') which
is all the test actually needs.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 days agocli: flush stdin before enabling cli
Gregor Herburger [Mon, 13 Apr 2026 15:24:54 +0000 (17:24 +0200)] 
cli: flush stdin before enabling cli

Currently there is no possibility to flush stdin after autocommands are
executed. If in the bootcmd the stdin is changed, e.g. from nulldev to
serial, it could happen that junk characters sit in the fifo and appear
on the cli.

Add a option to clear stdin before starting the CLI.

Signed-off-by: Gregor Herburger <gregor.herburger@linutronix.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 days agoconsole: add console_flush_stdin()
Gregor Herburger [Mon, 13 Apr 2026 15:24:53 +0000 (17:24 +0200)] 
console: add console_flush_stdin()

Add a common helper console_flush_stdin() to drain all pending
characters from stdin. This consolidates the open-coded
while (tstc()) getchar() pattern that appeared in multiple places
across the tree.

Signed-off-by: Gregor Herburger <gregor.herburger@linutronix.de>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 days agoboard: ti: cape_detect: Add overlay name lookup table for extension boards
Kory Maincent (TI) [Tue, 14 Apr 2026 15:36:11 +0000 (17:36 +0200)] 
board: ti: cape_detect: Add overlay name lookup table for extension boards

Some extension boards have EEPROM part numbers that do not directly match
their devicetree overlay filenames. Introduce a static name_mapping table
and a set_cape_overlay() helper that translates the part number and version
strings read from the EEPROM into the correct overlay filename.

When no entry matches, fall back to the existing behavior of constructing
the overlay name as "<part_number>-<version>.dtbo" directly from the
EEPROM content.

Add an initial entry mapping BB-GREEN-HDMI revision 00A0 to
am335x-bone-hdmi-00a0.dtbo.

Signed-off-by: Kory Maincent (TI) <kory.maincent@bootlin.com>
5 days agoconfigs: aquila-am69: Set ENV_MMC_EMMC_HW_PARTITION and ENV_RELOC_GD_ENV_ADDR
Vitor Soares [Wed, 1 Apr 2026 14:18:42 +0000 (15:18 +0100)] 
configs: aquila-am69: Set ENV_MMC_EMMC_HW_PARTITION and ENV_RELOC_GD_ENV_ADDR

Set CONFIG_ENV_MMC_EMMC_HW_PARTITION=1 to store the environment in the
eMMC first hardware boot partition instead of defaulting to 0 (user
data area), where the rootfs and data partitions normally reside,
risking corruption. This keeps the full boot stack self-contained in
the eMMC hardware boot partition.

Enable CONFIG_ENV_RELOC_GD_ENV_ADDR so that gd->env_addr is adjusted by
the relocation offset during U-Boot relocation. Without it, gd->env_addr
keeps pointing to the pre-relocation address of the default
environment, leading to incorrect environment access before env_load()
completes.

Fixes: 3f0528882c0d ("board: toradex: add aquila am69 support")
Signed-off-by: Vitor Soares <vitor.soares@toradex.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
5 days agoboard: adi: Fix exception when using standalone SoM
Philip Molloy [Wed, 1 Apr 2026 09:31:56 +0000 (09:31 +0000)] 
board: adi: Fix exception when using standalone SoM

Although less common, ADSP SoM boards can be operated standalone without
a carrier board. The SoM can be powered over USB-C by moving the jumper
on JP1.

The board configuration needs to be heavily refactored to reduce the
number of defconfigs and leverage the devicetree. The TI DP83867
support, which is dependent on that configuration, needs to be removed.
Until then this change allows the same U-Boot binary to work correctly
both with carrier boards and the standalone SoM.

The carrier board initialization code in somcrr_ezkit.c and
somcrr_ezlite.c calls gpio_hog_lookup_name() to find ethernet
control GPIOs, but does not check if the lookup succeeds before
using the returned pointers.

When running on a standalone SoM without a carrier board, these
GPIO hogs do not exist in the device tree. The gpio_hog_lookup_name()
function returns -ENODEV and sets the pointer to NULL, but the code
continues to call dm_gpio_set_value() with uninitialized pointers,
causing a synchronous abort exception:

  "Synchronous Abort" handler, esr 0x96000004
  elr: 00000000960326c4 lr : 0000000096038d5c (reloc)

Signed-off-by: Philip Molloy <philip.molloy@analog.com>
Reviewed-by: Greg Malysa <malysagreg@gmail.com>