drm/amdgpu: Drop redundant syncobj handle limit checks in userq ioctls
Clang warns that comparing a __u16 value against 65536 is always false.
num_syncobj_handles is defined as __u16 in both the userq signal and
wait ioctl argument structs, so it can never exceed 65535. The checks
against AMDGPU_USERQ_MAX_HANDLES are therefore redundant and trigger
-Wtautological-constant-out-of-range-compare.
Fixes: Clang -Wtautological-constant-out-of-range-compare in userq
signal/wait ioctls
Fixes: d8e760b7996d ("drm/amdgpu: update type for num_syncobj_handles in drm_amdgpu_userq_signal") Fixes: c561d2320492 ("drm/amdgpu: update type for num_syncobj_handles in drm_amdgpu_userq_wait") Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Gangliang Xie [Fri, 12 Dec 2025 06:16:17 +0000 (14:16 +0800)]
drm/amd/ras: add pmfw eeprom smu interfaces
add smu interfaces and its data structures for
pmfw eeprom in uniras
v2: add 'const' to smu messages array, and specify
index for each member when initializing.
Signed-off-by: Gangliang Xie <ganglxie@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Gangliang Xie [Fri, 12 Dec 2025 07:42:49 +0000 (15:42 +0800)]
drm/amd/pm: add feature query interface for uniras
add amdgpu_smu_ras_feature_is_enabled to query one feature
is supported or not
v2: change default return value from -EOPNOTSUPP to 0
Signed-off-by: Gangliang Xie <ganglxie@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Gangliang Xie [Thu, 11 Dec 2025 10:14:46 +0000 (18:14 +0800)]
drm/amd/pm: add pmfw eeprom messages into uniras interface
add pmfw eeprom related messages into smu_v13_0_6_ras_send_msg
v2: add sriov check before sending smu commands
Signed-off-by: Gangliang Xie <ganglxie@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sunil Khatri [Thu, 26 Feb 2026 15:48:51 +0000 (21:18 +0530)]
drm/amdgpu: update type for num_syncobj_handles in drm_amdgpu_userq_wait
update the type for num_syncobj_handles from __u32 to _u16 with
required padding.
This breaks the UAPI for big-endian platforms but this is deliberate
and harmless since userqueues is still a beta feature. It is enabled
via module parameter and need the right fw support to work.
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sunil Khatri [Thu, 26 Feb 2026 15:44:27 +0000 (21:14 +0530)]
drm/amdgpu: update type for num_syncobj_handles in drm_amdgpu_userq_signal
update the type for num_syncobj_handles from __u64 to _u16 with
required padding.
This breaks the UAPI for big-endian platforms but this is deliberate
and harmless since userqueues is still a beta feature. It is enabled
via module parameter and need the right fw support to work.
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Taimur Hassan [Fri, 20 Feb 2026 22:53:34 +0000 (17:53 -0500)]
drm/amd/display: Promote DC to 3.2.372
This version brings along the following updates:
- Prevent integer overflow when mhz to khz
- Remove always-false branches
- Remove redundant initializers
- Silence unused variable warning
- Initialize replay_state to PR_STATE_INVALID
- Fallback to boot snapshot for dispclk
- Skip cursor cache reset if hubp powergating is disabled
Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Hung [Wed, 18 Feb 2026 17:38:33 +0000 (10:38 -0700)]
drm/amd/display: Prevent integer overflow when mhz to khz
[WHAT]
Cast to long long before multiplication to prevent overflow
when converting mhz to khz by multiplying by 1000.
This is reported as INTEGER_OVERFLOW errors by Coverity.
Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Hung [Wed, 18 Feb 2026 16:50:15 +0000 (09:50 -0700)]
drm/amd/display: Remove always-false branches
[WHAT]
program_prealpha_dealpha and hpo_frl_stream_enc_acquired are always
false and all branches depending on them will never be taken.
This is reported as DEADCODE errors by Coverity.
Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Hung [Wed, 18 Feb 2026 16:30:32 +0000 (09:30 -0700)]
drm/amd/display: Remove redundant initializers
[WHAT]
Remove unnecessary default value assignments for variables that
are unconditionally assigned before use.
Linux kernel code style prefers no assignments during initialization
when variables are assigned unconditionally as they can obscures
the actual data flow. In addition, compilers will be able to catch them
if variables are used without being updated later in all conditions.
This is reported as UNUSED_VALUE errors by Coverity.
Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Austin Zheng <austin.zheng@amd.com> Signed-off-by: Clay King <clayking@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ivan Lipski [Wed, 18 Feb 2026 21:19:15 +0000 (16:19 -0500)]
drm/amd/display: Initialize replay_state to PR_STATE_INVALID
[WHY & HOW]
Initialize the replay_state variable to PR_STATE_INVALID instead of
PR_STATE_0 before retrieving the actual replay state.
Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Ivan Lipski <ivan.lipski@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dillon Varone [Wed, 18 Feb 2026 19:34:28 +0000 (14:34 -0500)]
drm/amd/display: Fallback to boot snapshot for dispclk
[WHY & HOW]
If the dentist is unavailable, fallback to reading CLKIP via the boot
snapshot to get the current dispclk.
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Dillon Varone <Dillon.Varone@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yujie Liu [Thu, 26 Feb 2026 03:00:37 +0000 (11:00 +0800)]
drm/amd/pm: fix kernel-doc warning for smu_msg_v1_send_msg()
Warning: drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu_cmn.c:415 expecting prototype for smu_msg_proto_v1_send_msg(). Prototype was for smu_msg_v1_send_msg() instead
Fixes: 4f379370a49c ("drm/amd/pm: Add smu message control block") Signed-off-by: Yujie Liu <yujie.liu@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yujie Liu [Thu, 26 Feb 2026 03:00:38 +0000 (11:00 +0800)]
drm/amd/ras: fix kernel-doc warning for ras_eeprom_append()
Warning: drivers/gpu/drm/amd/amdgpu/../ras/rascore/ras_eeprom.c:845 function parameter 'ras_core' not described in 'ras_eeprom_append'
Warning: drivers/gpu/drm/amd/amdgpu/../ras/rascore/ras_eeprom.c:845 expecting prototype for ras_core_eeprom_append(). Prototype was for ras_eeprom_append() instead
Fixes: 5c3be5defc92 ("drm/amd/ras: Add eeprom ras functions") Signed-off-by: Yujie Liu <yujie.liu@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yujie Liu [Thu, 26 Feb 2026 03:00:35 +0000 (11:00 +0800)]
drm/amdgpu: fix kernel-doc warning for amdgpu_ttm_alloc_mmio_remap_bo()
Warning: drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:1923 expecting prototype for amdgpu_ttm_mmio_remap_bo_init(). Prototype was for amdgpu_ttm_alloc_mmio_remap_bo() instead
Fixes: 96e97a562d06 ("drm/amdgpu: Drop MMIO_REMAP domain bit and keep it Internal") Signed-off-by: Yujie Liu <yujie.liu@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Kees Cook [Wed, 25 Feb 2026 17:47:03 +0000 (09:47 -0800)]
drm/amd/ras: Fix type size of remainder argument
Forcing an int to be dereferenced at uint64_t for div64_u64_rem() runs
the risk of endian confusion and stack overflowing writes. Seen while
preparing to enable -Warray-bounds globally:
In file included from ../arch/x86/include/asm/processor.h:35,
from ../include/linux/sched.h:13,
from ../include/linux/ratelimit.h:6,
from ../include/linux/dev_printk.h:16,
from ../drivers/gpu/drm/amd/amdgpu/../ras/ras_mgr/ras_sys.h:29,
from ../drivers/gpu/drm/amd/amdgpu/../ras/rascore/ras.h:27,
from ../drivers/gpu/drm/amd/amdgpu/../ras/rascore/ras_core.c:24:
In function 'div64_u64_rem',
inlined from 'ras_core_convert_timestamp_to_time' at ../drivers/gpu/drm/amd/amdgpu/../ras/rascore/ras_core.c:72:9:
../include/linux/math64.h:56:20: error: array subscript 'u64 {aka long long unsigned int}[0]' is partly outside array bounds of 'int[1]' [-Werror=array-bounds=]
56 | *remainder = dividend % divisor;
| ~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~
../drivers/gpu/drm/amd/amdgpu/../ras/rascore/ras_core.c: In function 'ras_core_convert_timestamp_to_time':
../drivers/gpu/drm/amd/amdgpu/../ras/rascore/ras_core.c:70:19: note: object 'remaining_seconds' of size 4
70 | int days, remaining_seconds;
| ^~~~~~~~~~~~~~~~~
Use a 64-bit type for the remainder calculation, but leave
remaining_seconds as 32-bit to avoid 64-bit division later. The value of
remainder will always be less than seconds_per_day, so there's no
truncation risk.
Fixes: ace232eff50e ("drm/amdgpu: Add ras module files into amdgpu") Signed-off-by: Kees Cook <kees@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Hung [Fri, 27 Feb 2026 19:30:38 +0000 (12:30 -0700)]
drm/amd/display: Enable DEGAMMA and reject COLOR_PIPELINE+DEGAMMA_LUT
[WHAT]
Create DEGAMMA properties even if color pipeline is enabled, and enforce
the mutual exclusion in atomic check by rejecting any commit that
attempts to enable both COLOR_PIPELINE on the plane and DEGAMMA_LUT on
the CRTC simultaneously.
Fixes: 18a4127e9315 ("drm/amd/display: Disable CRTC degamma when color pipeline is enabled") Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4963 Reviewed-by: Melissa Wen <mwen@igalia.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
A workaround was introduced in commit 1fb710793ce2 ("drm/amdgpu: Enable
MES lr_compute_wa by default") to help with some hangs observed in gfx1151.
This WA didn't fully fix the issue. It was actually fixed by adjusting
the VGPR size to the correct value that matched the hardware in commit b42f3bf9536c ("drm/amdkfd: bump minimum vgpr size for gfx1151").
There are reports of instability on other products with newer GC microcode
versions, and I believe they're caused by this workaround. As we don't
need the workaround any more, remove it.
Fixes: b42f3bf9536c ("drm/amdkfd: bump minimum vgpr size for gfx1151") Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lijo Lazar [Tue, 24 Feb 2026 04:48:51 +0000 (10:18 +0530)]
drm/amdgpu: Fix error handling in slot reset
If the device has not recovered after slot reset is called, it goes to
out label for error handling. There it could make decision based on
uninitialized hive pointer and could result in accessing an uninitialized
list.
Initialize the list and hive properly so that it handles the error
situation and also releases the reset domain lock which is acquired
during error_detected callback.
Fixes: 732c6cefc1ec ("drm/amdgpu: Replace tmp_adev with hive in amdgpu_pci_slot_reset") Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Ce Sun <cesun102@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Bart Van Assche [Mon, 23 Feb 2026 22:00:07 +0000 (14:00 -0800)]
drm/amdgpu: Unlock a mutex before destroying it
Mutexes must be unlocked before these are destroyed. This has been detected
by the Clang thread-safety analyzer.
Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Yang Wang <kevinyang.wang@amd.com> Cc: Hawking Zhang <Hawking.Zhang@amd.com> Cc: amd-gfx@lists.freedesktop.org Fixes: f5e4cc8461c4 ("drm/amdgpu: implement RAS ACA driver framework") Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sunil Khatri [Tue, 24 Feb 2026 06:43:09 +0000 (12:13 +0530)]
drm/amdgpu: add upper bound check on user inputs in wait ioctl
Huge input values in amdgpu_userq_wait_ioctl can lead to a OOM and
could be exploited.
So check these input value against AMDGPU_USERQ_MAX_HANDLES
which is big enough value for genuine use cases and could
potentially avoid OOM.
v2: squash in Srini's fix
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sunil Khatri [Fri, 20 Feb 2026 08:17:58 +0000 (13:47 +0530)]
drm/amdgpu: add upper bound check on user inputs in signal ioctl
Huge input values in amdgpu_userq_signal_ioctl can lead to a OOM and
could be exploited.
So check these input value against AMDGPU_USERQ_MAX_HANDLES
which is big enough value for genuine use cases and could
potentially avoid OOM.
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrew Martin [Mon, 23 Feb 2026 21:08:16 +0000 (16:08 -0500)]
drm/amdkfd: Removed commented line for MQD queue priority
Missed deleting the commented line in the original patch.
Fixes: 73463e26f7e2 ("drm/amdkfd: Disable MQD queue priority") Signed-off-by: Andrew Martin <andrew.martin@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
If we gate the fence destruction with a check telling us whether there are
valid pointers in there we can eliminate the need for dual, basically
identical, exit paths.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tvrtko Ursulin [Mon, 23 Feb 2026 12:41:31 +0000 (12:41 +0000)]
drm/amdgpu/userq: Do not allow userspace to trivially triger kernel warnings
Userspace can either deliberately pass in the too small num_fences, or the
required number can legitimately grow between the two calls to the userq
wait ioctl. In both cases we do not want the emit the kernel warning
backtrace since nothing is wrong with the kernel and userspace will simply
get an errno reported back. So lets simply drop the WARN_ONs.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Fixes: a292fdecd728 ("drm/amdgpu: Implement userqueue signal/wait IOCTL") Cc: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Fix kdoc formatting in dcn42_hwseq.c
Kernel-doc requires all lines within a documentation
comment to start with " *". The previous empty line
caused a "bad line" warning during build.
Cc: Harry Wentland <harry.wentland@amd.com> Cc: Mario Limonciello <superm1@kernel.org> Cc: Alex Hung <alex.hung@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Cc: ChiaHsuan Chung <chiahsuan.chung@amd.com> Cc: Roman Li <roman.li@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Taimur Hassan [Thu, 12 Feb 2026 23:12:35 +0000 (18:12 -0500)]
drm/amd/display: Promote DC to 3.2.371
This version brings along the follwing updates:
- Add visualconfirm support for refresh rate change testing.
- Fix IPS exit with DC helper for all dc_set_power_state cases.
- Fix cursor position at overlay plane edges on DCN4.
- Introduce DMUB IHC command.
- Add missing dprefclk and dtbclk clock types and fix formatting.
- Fix DPIA number and driver ID field sizes per spec.
- Minor code fixes.
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com> Signed-off-by: Ivan Lipski <ivan.lipski@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Wed, 11 Feb 2026 21:53:44 +0000 (16:53 -0500)]
drm/amd/display: Fix dcn401_optimize_bandwidth
[Why&How]
We should check for != zstate disallow and programming extend blank from a
different struct.
Reviewed-by: Leo Chen <leo.chen@amd.com> Reviewed-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com> Signed-off-by: Charlene Liu <Charlene.Liu@amd.com> Signed-off-by: Ivan Lipski <ivan.lipski@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ivan Lipski [Mon, 2 Feb 2026 20:57:19 +0000 (15:57 -0500)]
drm/amd/display: Fix cursor pos at overlay plane edges on DCN4
[Why&How]
On DCN4, when cursor straddles the left/top edge of an overlay plane, the
recout-relative position becomes negative. These negative values wrap
to large positive numbers when cast to uint32_t, causing the cursor on the
the overlay plane to disappear.
Fix by adding hotspot adjustment and position clamping after the
recout-relative calculation, matching the existing ODM/MPC slice
boundary handling.
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Ivan Lipski <ivan.lipski@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ovidiu Bunea [Wed, 4 Feb 2026 22:08:01 +0000 (17:08 -0500)]
drm/amd/display: Exit IPS w/ DC helper for all dc_set_power_state cases
[why & how]
On D3 path during dc_set_power_state, we may be in idle_allowed=true,
at which point we will exit idle via dc_wake_and_execute_dmub_cmd_list
which doesn't update dc->idle_optimizations_allowed to false. This
would cause any future attempts to allow idle optimizations via the DC
helper to get skipped because the value is stale and not reflective of
the actual HW state.
Move dc_exit_ips_for_hw_access() to the top of the function.
Additionally ensure that dc_power_down_on_boot thread holds the DC
lock and only runs if there are 0 streams.
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Ovidiu Bunea <ovidiu.bunea@amd.com> Signed-off-by: Ivan Lipski <ivan.lipski@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Simon Louis [Tue, 3 Feb 2026 15:42:00 +0000 (15:42 +0000)]
drm/amdgpu: Add xgmi link status for VFs
Xgmi link status is unavailable in guest. This patch returns
AMDGPU_XGMI_LINK_NA for VFs.
Signed-off-by: Simon Louis <simon.louis@amd.com> Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 16 Jan 2026 03:01:15 +0000 (22:01 -0500)]
drm/amdgpu: rework ring reset backup and reemit v9
Store the start wptr and ib size in the IB fence. On queue
reset, save the ring contents of all IBs.
For reemit, reemit the entire IB state for non-guilty contexts.
For guilty contexts, replace the IB submission with nops, but reemit
the rest. Split the reemit per fence and when we reemit, update the
wptr with the new values from reemit. This allows us to reemit jobs
repeatedly as the wptrs get properly updated each time.
v2: further simplify the logic
v3: reemit vm state, not just vm fence
v4: just nop the IB and possibly the VM portion of the submission
v5: simplify the vm fence check
v6: split the vm and ib fences
v7: fix commit message
v8: use wptr rather than count_dw to calculate offsets
v9: fix missing documenation update spotted by the kernel test robot
Reviewed-by: Jesse Zhang <jesse.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Roman Li [Wed, 18 Feb 2026 15:29:46 +0000 (10:29 -0500)]
drm/amdgpu/discovery: Enable DM for DCN42
Add DM ipblock for DCN 4.2.0
Signed-off-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Timur Kristóf [Mon, 26 Jan 2026 21:08:37 +0000 (22:08 +0100)]
drm/amdgpu: Use DC by default on CIK APUs
Now that DC supports external DP bridge encoders,
it has reached feature parity with the legacy non-DC display
driver on CIK APUs: Kaveri, Kabini, Mullins.
Use the DC display driver by default on SI APUs, unless it is
explicitly disabled using the amdgpu.dc=0 module parameter.
DC brings proper support for DP/HDMI audio, DP MST, VRR,
10-bit colors, some HDR features, atomic modesetting, etc.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Timur Kristóf [Mon, 26 Jan 2026 21:08:36 +0000 (22:08 +0100)]
drm/amd/display: Implement DAC load detection on external DP bridge encoders
Use the pre-existing implementation in the BIOS parser, but call
the ExternalEncoderControl function for external encoders instead
of the built-in DAC load detection function.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Timur Kristóf [Mon, 26 Jan 2026 21:08:35 +0000 (22:08 +0100)]
drm/amd/display: Use external DP bridge encoders
Implement link creation for external DP bridge encoders
such as NUTMEG and TRAVIS used with CIK APUs such as
Kaveri for supporting analog and LVDS connections.
Typically found in CIK APU based laptops or on FM2
motherboards that have analog connectors.
When we query connector information from the VBIOS and
discover a connector using such an encoder, let's find the
real DisplayPort encoder and use that. Set the connector
signal type to DP, so the pre-existing DP code paths can
work with it without refactoring every signal type check
in the DC code base.
In the DM, make sure to report correct connector type and
also to initialize DP specifics such as the AUX channel.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Timur Kristóf [Mon, 26 Jan 2026 21:08:34 +0000 (22:08 +0100)]
drm/amd/display: Link detection for external DP bridge encoders
Deal with some minor idiosyncracies of TRAVIS and NUTMEG chips.
- Always use DP signal type with these chips so that the
normal DP code paths can work with them without a major
refactor of the code base. Properly set this.
- NUTMEG seems to only work with HBR, not RBR, so set a
preferred link rate for this chip.
See amdgpu_atombios_dp_get_dp_link_config() for reference.
- NUTMEG is recognized as a DP branch device but reports 0 sinks,
which is wrong and confuses DC (it hits an early return).
Fix that by hardcoding the sink count to 1.
- Fixup old DC code selecting a special panel mode necessary
for NUTMEG and TRAVIS.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Timur Kristóf [Mon, 26 Jan 2026 21:08:33 +0000 (22:08 +0100)]
drm/amd/display: Add DCE HWSS support for external DP bridge encoders
Some GPUs use external DP bridge encoders NUTMEG and TRAVIS
to implement analog and/or LVDS connections. Typically found in
CIK APU based laptops or on FM2 motherboards that have analog
connectors. These were necessary at the time because Kaveri
didn't have a built-in DAC nor LVDS support.
These devices sadly don't work transparently and need to be
controlled by the driver. Implement the necessary control for
the NUTMEG and TRAVIS encoders in the DCE HWSS.
For reference, see the legacy non-DC amdgpu display code:
amdgpu_atombios_encoder_setup_external_encoder()
amdgpu_atombios_encoder_setup_dig()
amdgpu_atombios_encoder_setup_ext_encoder_ddc()
- Prepare DDC before using it:
Call the EXTERNAL_ENCODER_CONTROL_DDC_SETUP action so that
the encoder knows to set up DDC over the AUX channel.
- When a stream is enabled or disabled:
Call the EXTERNAL_ENCODER_CONTROL_ENABLE/DISABLE actions.
- Before enabling the DP link:
Call the EXTERNAL_ENCODER_CONTROL_SETUP action.
This commit just hooks up the HWSS support.
Detecting the external DP bridge encoders will be done in
a subsequent commit.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Timur Kristóf [Mon, 26 Jan 2026 21:08:32 +0000 (22:08 +0100)]
drm/amd/display: Use preferred DP link rate if specified
The DisplayPort code already has the concept of preferred link
settings, but it only allows setting a preferred lane count and
link width at the same time. It does not consider the possiblity
that some devices may not work on lower link rates but may
support various lane counts.
Allow specifying a preferred link rate which will be used as
the initial link rate when deciding the DP link settings.
This is necessary to support NUTMEG which only works with HBR
but not with RBR.
For reference, see the legacy non-DC amdgpu display code:
amdgpu_atombios_dp_get_dp_link_config()
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Timur Kristóf [Mon, 26 Jan 2026 21:08:31 +0000 (22:08 +0100)]
drm/amd/display: Add ability for HWSS to prepare the DDC before use
Make it possible to add a HWSS function to prepare the DDC
before trying to use it. This is going to be necessary for
external DP bridge encoders.
This commit just adds the function to common DC code.
The actual implementation of this function for DCE is
done in a subsequent commit.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Timur Kristóf [Mon, 26 Jan 2026 21:08:30 +0000 (22:08 +0100)]
drm/amd/display: Implement DDC probe over AUX channel
DDC probe means that we use the DDC (Display Data Channel) to
verify whether a display is connected or not.
This was written with mainly analog connectors in mind, so it
didn't work over the AUX channel. However, in order to support
external DP bridge encoders found in CIK APUs, it needs to work
over the AUX channel too.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Timur Kristóf [Mon, 26 Jan 2026 21:08:29 +0000 (22:08 +0100)]
drm/amd/display: Implement BIOS parser external encoder control
The VBIOS has a function called ExternalEncoderControl which
controls the DP bridge encoders that some GPUs use for analog
and LVDS output. Fixup this old functionality.
For reference, see the legacy non-DC amdgpu display code:
amdgpu_atombios_encoder_setup_external_encoder()
- Set same parameters for the ENABLE action as the SETUP action
- Add missing enum values for DDC setup and DAC load detection
- Fix the bits per color field
- Clarify the code that sets the link rate
- Expose the function so that it can be called by rest of DC
A subsequent commit will call this function from DCE HWSS.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Timur Kristóf [Mon, 26 Jan 2026 21:08:28 +0000 (22:08 +0100)]
drm/amd/display: Refactor DAC load detection, move to HWSS
Slightly refactor and simplify DAC load detection.
This prepares the code to be used for also executing DAC
load detection on external DP bridge encoders.
DAC load detection belongs better in the hardware sequencer
code because the implementation is HW dependent and not all
chips support the functionality. The code is cleaner when
link detection probably doesn't call the VBIOS directly.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Timur Kristóf [Mon, 26 Jan 2026 21:08:27 +0000 (22:08 +0100)]
drm/amd/display: Add color depth helper function to BIOS parser
To improve consistency and avoid duplicating the same code.
Also, properly handle all enum values where they weren't
handled correctly before.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Timur Kristóf [Sun, 18 Jan 2026 17:31:50 +0000 (18:31 +0100)]
drm/amd/display: Handle DCE 6 in dce110_register_irq_handlers
The dce60_register_irq_handlers function was basically identical
to dce110_register_irq_handlers. They can use the same function,
reducing duplicated code and easing the maintenance burden for
old DCE versions.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Timur Kristóf [Sun, 18 Jan 2026 17:31:49 +0000 (18:31 +0100)]
drm/amd/display: Handle DCE 6 in dce_clk_mgr.c
dce60_clk_mgr was basically identical to dce_clk_mgr other than
a few minor details. They can be all handled in the same file,
reducing duplicated code and easing the maintenance burden for
old DCE versions.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Rodrigo Siqueira <siqueira@igalia.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Timur Kristóf [Sun, 18 Jan 2026 17:31:47 +0000 (18:31 +0100)]
drm/amd/display: Delete unused dce_clk_mgr.c
This file was not compiled or included anywhere and not
modified for years. And it has duplicate function
definitions of many functions that are defined in
other files.
That leads to a lot of confusion (for both developers
and for code editors), eg. when searching for a definition
of a function it can end up on one of the functions in
this file instead of the real implementations.
I suspect that it was forgotten that this should be
deleted after the various clock manager functions were
split into hardware generation specific files.
Delete it now.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Rodrigo Siqueira <siqueira@igalia.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
projects / thirdparty / kernel / linux.git / log
