]> git.ipfire.org Git - thirdparty/kernel/linux.git/log
thirdparty/kernel/linux.git
2 months agoMerge tag 'tegra-for-7.1-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Thu, 2 Apr 2026 21:13:02 +0000 (23:13 +0200)] 
Merge tag 'tegra-for-7.1-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers

firmware: tegra: Changes for v7.1-rc1

This introduces a new API for the BPMP to be pass along a specifier from
DT when getting a reference from a phandle. This is used to reference
specific instances of the PCI controller on Tegra264. The ABI header for
BPMP is updated to the latest version and BPMP APIs now use the more
intuitive ENODEV instead of the non SUSV4 ENOTSUPP error code for stub
implementations.

* tag 'tegra-for-7.1-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: bpmp: Use ENODEV instead of ENOTSUPP
  firmware: tegra: bpmp: Add tegra_bpmp_get_with_id() function
  soc/tegra: Update BPMP ABI header
  firmware: tegra: bpmp: Rename Tegra239 to Tegra238

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 months agoMerge tag 'tegra-for-7.1-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra...
Arnd Bergmann [Thu, 2 Apr 2026 21:11:41 +0000 (23:11 +0200)] 
Merge tag 'tegra-for-7.1-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers

soc/tegra: Changes for v7.1-rc1

A number of fixes went into this for the PMC and CBB drivers. The PMC
driver also gains support for Tegra264 and a Kconfig symbol for the
upcoming Tegra238 is added. The various per-generation Kconfig symbols
are now also enabled by default for ARCH_TEGRA in order to reduce the
number of configuration options that need to be explicitly enabled.

* tag 'tegra-for-7.1-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  MAINTAINERS: Change email address for Thierry Reding
  soc/tegra: pmc: Add IO pads for Tegra264
  soc/tegra: pmc: Rename has_impl_33v_pwr flag
  soc/tegra: pmc: Refactor IO pad voltage control
  soc/tegra: pmc: Add Tegra264 wake events
  soc/tegra: pmc: Add AOWAKE regs for Tegra264
  soc/tegra: pmc: Add support for SoC specific AOWAKE offsets
  soc/tegra: pmc: Remove unused AOWAKE definitions
  soc/tegra: pmc: Add kerneldoc for wake-up variables
  soc/tegra: pmc: Correct function names in kerneldoc
  soc/tegra: pmc: Add kerneldoc for reboot notifier
  soc/tegra: common: Add Tegra114 support to devm_tegra_core_dev_init_opp_table
  soc/tegra: pmc: Enable core domain support for Tegra114
  soc/tegra: cbb: Fix cross-fabric target timeout lookup
  soc/tegra: cbb: Fix incorrect ARRAY_SIZE in fabric lookup tables
  soc/tegra: cbb: Set ERD on resume for err interrupt
  soc/tegra: cbb: Add support for CBB fabrics in Tegra238
  soc/tegra: Add Tegra238 Kconfig symbol
  soc/tegra: Make ARCH_TEGRA_SOC_FOO defaults for NVIDIA Tegra

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 months agoMerge tag 'imx-soc-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/frank.li...
Arnd Bergmann [Wed, 1 Apr 2026 21:56:24 +0000 (23:56 +0200)] 
Merge tag 'imx-soc-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/frank.li/linux into soc/drivers

i.MX SoC update for 7.1:

- Updates MAINTAINERS file to include i.MX team coverage for ARM NXP platforms
- Sets default values for OPACR (Off-Platform Peripheral Access Control
  Register) in the i.MX AIPSTZ bus driver

* tag 'imx-soc-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/frank.li/linux:
  MAINTAINERS: Add i.MX team to all arm NXP platforms
  bus: imx-aipstz: set default value for opacr registers

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 months agoMerge tag 'renesas-drivers-for-v7.1-tag2' of git://git.kernel.org/pub/scm/linux/kerne...
Arnd Bergmann [Wed, 1 Apr 2026 21:52:57 +0000 (23:52 +0200)] 
Merge tag 'renesas-drivers-for-v7.1-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/drivers

Renesas driver updates for v7.1 (take two)

  - Mark remaining rz_sysc_init_data structures __initconst.

* tag 'renesas-drivers-for-v7.1-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  soc: renesas: r9a09g056-sys: Mark rzv2n_sys_init_data as __initconst
  soc: renesas: r9a09g047-sys: Mark rzg3e_sys_init_data as __initconst
  soc: renesas: r9a09g057-sys: Mark rzv2h_sys_init_data as __initconst

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 months agoMerge tag 'optee-for-v7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/jenswi...
Arnd Bergmann [Wed, 1 Apr 2026 21:52:18 +0000 (23:52 +0200)] 
Merge tag 'optee-for-v7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/jenswi/linux-tee into soc/drivers

OP-TEE update for 7.1

Simplify TEE implementor ID match logic

* tag 'optee-for-v7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/jenswi/linux-tee:
  optee: simplify OP-TEE context match

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 months agoMerge tag 'tee-for-v7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/jenswi...
Arnd Bergmann [Wed, 1 Apr 2026 21:51:34 +0000 (23:51 +0200)] 
Merge tag 'tee-for-v7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/jenswi/linux-tee into soc/drivers

TEE update for 7.1

Clean up tee_core.h kernel-doc to eliminate build warnings

* tag 'tee-for-v7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/jenswi/linux-tee:
  tee: clean up tee_core.h kernel-doc

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 months agoMerge tag 'hisi-drivers-for-7.1' of https://github.com/hisilicon/linux-hisi into...
Arnd Bergmann [Wed, 1 Apr 2026 21:50:55 +0000 (23:50 +0200)] 
Merge tag 'hisi-drivers-for-7.1' of https://github.com/hisilicon/linux-hisi into soc/drivers

HiSilicon driver updates for v7.1

- Fix two compiler warnings on kunpeng_hccs driver

* tag 'hisi-drivers-for-7.1' of https://github.com/hisilicon/linux-hisi:
  soc: hisilicon: kunpeng_hccs: Remove unused input parameter
  soc: hisilicon: kunpeng_hccs: Fix discard ‘const’ qualifier compiling warning

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 months agoMerge tag 'stm32-bus-firewall-for-7.1-1' of git://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Wed, 1 Apr 2026 21:49:16 +0000 (23:49 +0200)] 
Merge tag 'stm32-bus-firewall-for-7.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/drivers

STM32 Firewall bus for v7.1, round 1

Highlights:
----------
Stm32 SoCs embed debug peripherals such as Coresight. These peripherals
can monitor the activity of the cores. Because of that, they can be
used only if some features in the debug configuration are enabled.
Else, errors or firewall exceptions can be observed. Similarly to
the ETZPC(on stm32mp1x platforms) or the RIFSC(on stm32mp2x platforms),
debug-related peripherals access can be assessed at bus level to
prevent these issues from happening.

The debug configuration can only be accessed by the secure world.
That means that a service must be implemented in the secure world for
the kernel to check the firewall configuration. On OpenSTLinux, it is
done through a Debug access PTA in OP-TEE [1].
To represent the debug peripherals present on a dedicated debug bus,
create a debug bus node in the device tree and the associated driver
that will interact with this PTA.

Plus some fixes.

* tag 'stm32-bus-firewall-for-7.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  pinctrl: stm32: add firewall checks before probing the HDP driver
  drivers: bus: add the stm32 debug bus driver
  bus: stm32_firewall: add stm32_firewall_get_grant_all_access() API
  bus: stm32_firewall: allow check on different firewall controllers
  dt-bindings: bus: document the stm32 debug bus
  dt-bindings: pinctrl: document access-controllers property for stm32 HDP
  dt-bindings: document access-controllers property for coresight peripherals
  bus: rifsc: fix RIF configuration check for peripherals
  bus: rifsc: Replace snprintf("%s") with strscpy
  bus: stm32_firewall: Simplify with scoped for each OF child loop
  bus: firewall: move stm32_firewall header file in include folder

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 months agoMerge tag 'scmi-updates-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep...
Arnd Bergmann [Wed, 1 Apr 2026 21:48:30 +0000 (23:48 +0200)] 
Merge tag 'scmi-updates-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/drivers

Arm SCMI updates for v7.1

This batch mainly improves SCMI robustness on systems where the SCP does
not generate completion interrupts, and includes two small follow-up
cleanups in the SCMI core.

The main functional change adds support for the new DT property
'arm,no-completion-irq'. When present for mailbox/shared-memory based
SCMI implementations, the driver forces SCMI operations into polling
mode so affected platforms can continue to operate even with broken
firmware interrupt behavior.

In addition, it
 - replaces open-coded size rounding in the base protocol path with
   round_up() for clarity, with no functional change
 - updates the SCMI quirk snippet macro implementation so quirk handlers
  can use break and continue directly when invoked inside loop contexts

* tag 'scmi-updates-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  firmware: arm_scmi: Support loop control in quirk code snippets
  firmware: arm_scmi: Use round_up() for base protocol list size calculation
  firmware: arm_scmi: Implement arm,no-completion-irq property
  dt-bindings: firmware: arm,scmi: Document arm,no-completion-irq property

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 months agoclk: spear: fix resource leak in clk_register_vco_pll()
Haoxiang Li [Wed, 25 Mar 2026 06:22:04 +0000 (14:22 +0800)] 
clk: spear: fix resource leak in clk_register_vco_pll()

Add a goto label in clk_register_vco_pll(), unregister vco_clk
if tpll_clk is failed to be registered.

Signed-off-by: Haoxiang Li <lihaoxiang@isrc.iscas.ac.cn>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Link: https://lore.kernel.org/r/20260325062204.169648-1-lihaoxiang@isrc.iscas.ac.cn
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 months agoMerge tag 'memory-controller-drv-7.1' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Wed, 1 Apr 2026 21:44:55 +0000 (23:44 +0200)] 
Merge tag 'memory-controller-drv-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers

Memory controller drivers for v7.1

1. TegraMC:
 - Few fixes for older issues - missing clock on Tegra264,
   missing enabling of DLL for Tegra30 and Tegra124.
 - Simplify the code in a few places.
 - Rework handling interrupts on different variants and add support for
   error logging on Tegra 264.

2. Drop Baikal SoC bt1-l2-ctl driver, because SoC support is being
   removed tree-wide.

* tag 'memory-controller-drv-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
  memory: tegra: Add MC error logging support for Tegra264
  memory: tegra: Prepare for supporting multiple intmask registers
  memory: tegra: Group SoC specific fields
  memory: tegra: Add support for multiple IRQs
  memory: tegra: Group register and fields
  memory: tegra: Group error handling related registers
  memory: tegra-mc: Use %pe format
  memory: tegra-mc: Simplify printing PTR_ERR with dev_err_probe
  memory: tegra-mc: Drop tegra_mc_setup_latency_allowance() return value
  memory: renesas-rpc-if: Simplify printing PTR_ERR with dev_err_probe
  memory: brcmstb_memc: Expand LPDDR4 check to cover for LPDDR5
  dt-bindings: cache: bt1-l2-ctl: Remove unused bindings
  memory: bt1-l2-ctl: Remove not-going-to-be-supported code for Baikal SoC
  memory: tegra30-emc: Fix dll_change check
  memory: tegra124-emc: Fix dll_change check
  memory: tegra: Add support for DBB clock on Tegra264

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 months agoMerge tag 'samsung-drivers-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Wed, 1 Apr 2026 21:43:58 +0000 (23:43 +0200)] 
Merge tag 'samsung-drivers-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/drivers

Samsung SoC drivers for v7.1

Few cleanups in ACPM firmware drivers, used on Google GS101 and newer
Samsung Exynos SoCs.  Notable change is removing 'const' in
'struct acpm_handle' pointers, because even though the code does not
modify pointed data, it immediately drops the const via cast.  Also code
is not logically readable when a reference getters/putters (e.g.
acpm_handle_put()) take a pointer to const, because the meaning of "get"
and "put" implies changing the memory, even if that changeable field is
outside of pointed data.

* tag 'samsung-drivers-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  firmware: exynos-acpm: Drop fake 'const' on handle pointer
  dt-bindings: firmware: google,gs101-acpm-ipc: add S2MPG11 secondary PMIC
  firmware: exynos-acpm: Count acpm_xfer buffers with __counted_by_ptr
  firmware: exynos-acpm: Count number of commands in acpm_xfer
  firmware: exynos-acpm: Use unsigned int for acpm_pmic_linux_errmap index

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 months agoMAINTAINERS: Change email address for Thierry Reding
Thierry Reding [Thu, 22 Jan 2026 13:25:35 +0000 (14:25 +0100)] 
MAINTAINERS: Change email address for Thierry Reding

Use the kernel.org email address as a level of indirection to enable
transparent switching of providers if necessary.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2 months agosoc/tegra: pmc: Add IO pads for Tegra264
Jon Hunter [Wed, 25 Mar 2026 19:26:00 +0000 (19:26 +0000)] 
soc/tegra: pmc: Add IO pads for Tegra264

Populate the IO pads and pins for Tegra264. Tegra264 has internal 1.8V
and 0.6V regulators that must be enabled when selecting the 1.8V mode
for the sdmmc1-hv IO pad. To support this a new 'ena_1v8' member is
added to the 'tegra_io_pad_vctrl' structure to populate the bits that
need to be set to enable these internal regulators. Although this is
enabling 1.8V (bit 1) and 0.6V (bit 2) regulators, it is simply called
'ena_1v8' because these are both enabled for 1.8V operation. Note that
these internal regulators are disabled when not using 1.8V mode.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2 months agosoc/tegra: pmc: Rename has_impl_33v_pwr flag
Jon Hunter [Wed, 25 Mar 2026 19:25:59 +0000 (19:25 +0000)] 
soc/tegra: pmc: Rename has_impl_33v_pwr flag

The flag 'has_impl_33v_pwr' is now only used to determine if we need to
set the write-enable bit before we can set the bit to select if 3.3V IO
is used or not. Therefore, rename the flag to 'has_io_pad_wren' to
indicate that the SoC supports the write-enable register.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2 months agosoc/tegra: pmc: Refactor IO pad voltage control
Jon Hunter [Wed, 25 Mar 2026 19:25:58 +0000 (19:25 +0000)] 
soc/tegra: pmc: Refactor IO pad voltage control

For Tegra devices, only a subset of IO pads can be configured for 1.8V
or 3.3V. Therefore, in the 'tegra_io_pad_soc' structure for Tegra SoCs
either all or most of the 'voltage' entries are set to UINT_MAX to
indicate the IO pad voltage cannot be configured. So for the majority of
IO pads this configuration is not applicable. However, refactoring the
IO pad data to move this parameter into a separate structure does not
make sense because the benefits are marginal.

Support for the Tegra264 IO pads is currently missing and the control
for configuring the voltage for the IO pads for Tegra264 has changed.
Instead of having a single register that is used for setting the IO pad
voltage for all IO pads, there is now a register associated with the
specific IO pad. For Tegra264, there is now only one IO pad that can be
configured for 1.8V or 3.3V which is the sdmmc1-hv. While we could make
this work with by adding a new SoC flag, the implementation will be a
bit cumbersome. Therefore, it now seems reasonable to refactor the IO
pad code. Hence, introduce a new 'tegra_io_pad_vctrl' structure that
contains the register offset and bit for enabling/disabling 3.3V mode
and move the existing voltage control data for supported SoCs to this
structure. This has an added benefit of simplifying the code in the
functions tegra_io_pad_get_voltage and tegra_io_pad_set_voltage.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2 months agosoc/tegra: pmc: Add Tegra264 wake events
Jon Hunter [Wed, 25 Mar 2026 19:25:57 +0000 (19:25 +0000)] 
soc/tegra: pmc: Add Tegra264 wake events

Populate the various wake events for the Tegra264 device.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2 months agosoc/tegra: pmc: Add AOWAKE regs for Tegra264
Jon Hunter [Wed, 25 Mar 2026 19:25:56 +0000 (19:25 +0000)] 
soc/tegra: pmc: Add AOWAKE regs for Tegra264

Populate the AOWAKE register offsets for Tegra264.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2 months agosoc/tegra: pmc: Add support for SoC specific AOWAKE offsets
Jon Hunter [Wed, 25 Mar 2026 19:25:55 +0000 (19:25 +0000)] 
soc/tegra: pmc: Add support for SoC specific AOWAKE offsets

For Tegra264, some of the AOWAKE registers have different register
offsets. Prepare for adding the Tegra264 AOWAKE register by moving the
offsets for the AOWAKE registers that are different for Tegra264 into
the 'tegra_pmc_regs' structure and populate these offsets for the SoCs
that support these registers.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2 months agosoc/tegra: pmc: Remove unused AOWAKE definitions
Jon Hunter [Wed, 25 Mar 2026 19:25:54 +0000 (19:25 +0000)] 
soc/tegra: pmc: Remove unused AOWAKE definitions

For Tegra264, the offsets for the AOWAKE registers have changed. Before
adding support for the Tegra264 AOWAKE register offsets, remove the
unused AOWAKE definitions.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2 months agosoc/tegra: pmc: Add kerneldoc for wake-up variables
Jon Hunter [Wed, 25 Mar 2026 19:25:53 +0000 (19:25 +0000)] 
soc/tegra: pmc: Add kerneldoc for wake-up variables

Commit e6d96073af68 ("soc/tegra: pmc: Fix unsafe generic_handle_irq()
call") added the variables 'wake_work' and 'wake_status' to the
'tegra_pmc' structure but did not add the associated kerneldoc for these
new variables. Add the kerneldoc for these variables.

Fixes: e6d96073af68 ("soc/tegra: pmc: Fix unsafe generic_handle_irq() call")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2 months agosoc/tegra: pmc: Correct function names in kerneldoc
Jon Hunter [Wed, 25 Mar 2026 19:25:52 +0000 (19:25 +0000)] 
soc/tegra: pmc: Correct function names in kerneldoc

Commit 70f752ebb08c ("soc/tegra: pmc: Add PMC contextual functions")
added the functions devm_tegra_pmc_get() and
tegra_pmc_io_pad_power_enable(), but the names of the functions in the
associated kerneldoc is incorrect. Update the kerneldoc for these
functions to correct their names.

Fixes: 70f752ebb08c ("soc/tegra: pmc: Add PMC contextual functions")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2 months agosoc/tegra: pmc: Add kerneldoc for reboot notifier
Jon Hunter [Wed, 25 Mar 2026 19:25:51 +0000 (19:25 +0000)] 
soc/tegra: pmc: Add kerneldoc for reboot notifier

Commit 48b7f802fb78 ("soc/tegra: pmc: Embed reboot notifier in PMC
context") added the reboot_notifier structure to the PMC SoC structure
but did not update the kerneldoc accordingly. Add this missing kerneldoc
description to fix this.

Fixes: 48b7f802fb78 ("soc/tegra: pmc: Embed reboot notifier in PMC context")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2 months agosoc/tegra: common: Add Tegra114 support to devm_tegra_core_dev_init_opp_table
Svyatoslav Ryhel [Mon, 26 Jan 2026 19:02:06 +0000 (21:02 +0200)] 
soc/tegra: common: Add Tegra114 support to devm_tegra_core_dev_init_opp_table

Determine the Tegra114 hardware version using the SoC Speedo ID bit macro,
mirroring the approach already used for Tegra30 and Tegra124.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2 months agosoc/tegra: pmc: Enable core domain support for Tegra114
Svyatoslav Ryhel [Mon, 26 Jan 2026 19:20:30 +0000 (21:20 +0200)] 
soc/tegra: pmc: Enable core domain support for Tegra114

Enable core domain support for Tegra114 since now it has power domains
fully configured.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2 months agosoc/tegra: bpmp: Use ENODEV instead of ENOTSUPP
Thierry Reding [Thu, 26 Mar 2026 11:28:31 +0000 (12:28 +0100)] 
soc/tegra: bpmp: Use ENODEV instead of ENOTSUPP

ENOTSUPP is not a SUSV4 error code and checkpatch will warn about it.
It is also not very descriptive in the context of BPMP, so use the
ENODEV error code instead. For the stub implementations this is a more
accurate description of what the failure is.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2 months agofirmware: tegra: bpmp: Add tegra_bpmp_get_with_id() function
Thierry Reding [Thu, 26 Mar 2026 13:58:49 +0000 (14:58 +0100)] 
firmware: tegra: bpmp: Add tegra_bpmp_get_with_id() function

Some device tree bindings need to specify a parameter along with a BPMP
phandle reference to designate the ID associated with a given controller
that needs to interoperate with BPMP. Typically this is specified as an
extra cell in the nvidia,bpmp property, so add a helper to parse this ID
while resolving the phandle reference.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2 months agosoc/tegra: Update BPMP ABI header
Thierry Reding [Thu, 26 Mar 2026 13:58:48 +0000 (14:58 +0100)] 
soc/tegra: Update BPMP ABI header

This update primarily adds various new commands and MRQs for Tegra264,
but also contains a few new annotations and fixes.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2 months agosoc/tegra: cbb: Fix cross-fabric target timeout lookup
Sumit Gupta [Wed, 21 Jan 2026 10:12:05 +0000 (15:42 +0530)] 
soc/tegra: cbb: Fix cross-fabric target timeout lookup

When a fabric receives an error interrupt, the error may have
occurred on a different fabric. The target timeout lookup was using
the wrong base address (cbb->regs) with offsets from a different
fabric's target map, causing a kernel page fault.

  Unable to handle kernel paging request at virtual address ffff80000954cc00
  pc : tegra234_cbb_get_tmo_slv+0xc/0x28
  Call trace:
   tegra234_cbb_get_tmo_slv+0xc/0x28
   print_err_notifier+0x6c0/0x7d0
   tegra234_cbb_isr+0xe4/0x1b4

Add tegra234_cbb_get_fabric() to look up the correct fabric device
using fab_id, and use its base address for accessing target timeout
registers.

Fixes: 25de5c8fe0801 ("soc/tegra: cbb: Improve handling for per SoC fabric data")
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2 months agosoc/tegra: cbb: Fix incorrect ARRAY_SIZE in fabric lookup tables
Sumit Gupta [Wed, 21 Jan 2026 10:12:04 +0000 (15:42 +0530)] 
soc/tegra: cbb: Fix incorrect ARRAY_SIZE in fabric lookup tables

Fix incorrect ARRAY_SIZE usage in fabric lookup tables which could
cause out-of-bounds access during target timeout lookup.

Fixes: 25de5c8fe0801 ("soc/tegra: cbb: Improve handling for per SoC fabric data")
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2 months agosoc/tegra: cbb: Set ERD on resume for err interrupt
Sumit Gupta [Wed, 21 Jan 2026 10:12:03 +0000 (15:42 +0530)] 
soc/tegra: cbb: Set ERD on resume for err interrupt

Set the Error Response Disable (ERD) bit to mask SError responses
and use interrupt-based error reporting. When the ERD bit is set,
inband error responses to the initiator via SError are suppressed,
and fabric errors are reported via an interrupt instead.

The register is set during boot but the info is lost during system
suspend and needs to be set again on resume.

Fixes: fc2f151d2314 ("soc/tegra: cbb: Add driver for Tegra234 CBB 2.0")
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2 months agosoc/tegra: cbb: Add support for CBB fabrics in Tegra238
Sumit Gupta [Wed, 25 Mar 2026 12:57:26 +0000 (18:27 +0530)] 
soc/tegra: cbb: Add support for CBB fabrics in Tegra238

Add support for CBB 2.0 based fabrics in Tegra238 SoC using DT.
Fabrics reporting errors are: CBB, AON, BPMP, APE.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2 months agopinctrl: stm32: add firewall checks before probing the HDP driver
Gatien Chevallier [Thu, 26 Feb 2026 10:30:27 +0000 (11:30 +0100)] 
pinctrl: stm32: add firewall checks before probing the HDP driver

Because the HDP peripheral both depends on debug and firewall
configuration, when CONFIG_STM32_FIREWALL is present, use the
stm32 firewall framework to be able to check these configuration against
the relevant controllers.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Clément Le Goffic <legoffic.clement@gmail.com>
Reviewed-by: Linus Walleij <linusw@kernel.org>
Link: https://lore.kernel.org/r/20260226-debug_bus-v6-12-5d794697798d@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2 months agodrivers: bus: add the stm32 debug bus driver
Gatien Chevallier [Thu, 26 Feb 2026 10:30:21 +0000 (11:30 +0100)] 
drivers: bus: add the stm32 debug bus driver

Add the stm32 debug bus driver that is responsible of checking the
debug subsystem accessibility before probing the related peripheral
drivers.

This driver is OP-TEE dependent and relies on the STM32 debug access
PTA.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Link: https://lore.kernel.org/r/20260226-debug_bus-v6-6-5d794697798d@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2 months agobus: stm32_firewall: add stm32_firewall_get_grant_all_access() API
Gatien Chevallier [Thu, 26 Feb 2026 10:30:20 +0000 (11:30 +0100)] 
bus: stm32_firewall: add stm32_firewall_get_grant_all_access() API

Add the stm32_firewall_get_grant_all_access() API to be able to fetch
all firewall references in an access-controllers property and try to grant
access to all of them.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Linus Walleij <linusw@kernel.org>
Link: https://lore.kernel.org/r/20260226-debug_bus-v6-5-5d794697798d@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2 months agobus: stm32_firewall: allow check on different firewall controllers
Gatien Chevallier [Thu, 26 Feb 2026 10:30:19 +0000 (11:30 +0100)] 
bus: stm32_firewall: allow check on different firewall controllers

Current implementation restricts the check on the firewall controller
being the bus parent. Change this by using the controller referenced
in each firewall queries.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Link: https://lore.kernel.org/r/20260226-debug_bus-v6-4-5d794697798d@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2 months agodt-bindings: bus: document the stm32 debug bus
Gatien Chevallier [Thu, 26 Feb 2026 10:30:18 +0000 (11:30 +0100)] 
dt-bindings: bus: document the stm32 debug bus

Document the stm32 debug bus. The debug bus is responsible for
checking the debug sub-system accessibility before probing any related
drivers.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20260226-debug_bus-v6-3-5d794697798d@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2 months agodt-bindings: pinctrl: document access-controllers property for stm32 HDP
Gatien Chevallier [Thu, 26 Feb 2026 10:30:17 +0000 (11:30 +0100)] 
dt-bindings: pinctrl: document access-controllers property for stm32 HDP

HDP being functional depends on the debug configuration on the platform
that can be checked using the access-controllers property, document it.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Linus Walleij <linusw@kernel.org>
Link: https://lore.kernel.org/r/20260226-debug_bus-v6-2-5d794697798d@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2 months agodt-bindings: document access-controllers property for coresight peripherals
Gatien Chevallier [Thu, 26 Feb 2026 10:30:16 +0000 (11:30 +0100)] 
dt-bindings: document access-controllers property for coresight peripherals

Document the access-controllers for coresight peripherals in case some
access checks need to be performed to use them.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20260226-debug_bus-v6-1-5d794697798d@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2 months agobus: rifsc: fix RIF configuration check for peripherals
Gatien Chevallier [Thu, 29 Jan 2026 12:56:17 +0000 (13:56 +0100)] 
bus: rifsc: fix RIF configuration check for peripherals

Peripheral holding CID0 cannot be accessed, remove this completely
incorrect check. While there, fix  and simplify the semaphore checking
that should be performed when the CID filtering is enabled.

Fixes: a18208457253 ("bus: rifsc: introduce RIFSC firewall controller driver")
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Link: https://lore.kernel.org/r/20260129-fix_cid_check_rifsc-v1-1-ef280ccf764d@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2 months agobus: rifsc: Replace snprintf("%s") with strscpy
Thorsten Blum [Mon, 23 Feb 2026 21:12:11 +0000 (22:12 +0100)] 
bus: rifsc: Replace snprintf("%s") with strscpy

Replace snprintf("%s", ...) with the faster and more direct strscpy().

Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Link: https://lore.kernel.org/r/20260223211212.344855-1-thorsten.blum@linux.dev
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2 months agobus: stm32_firewall: Simplify with scoped for each OF child loop
Krzysztof Kozlowski [Mon, 5 Jan 2026 14:36:59 +0000 (15:36 +0100)] 
bus: stm32_firewall: Simplify with scoped for each OF child loop

Use scoped for-each loop when iterating over device nodes to make code a
bit simpler.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Tested-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260105143657.383621-5-krzysztof.kozlowski@oss.qualcomm.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2 months agobus: firewall: move stm32_firewall header file in include folder
Clément Le Goffic [Tue, 10 Feb 2026 19:05:45 +0000 (20:05 +0100)] 
bus: firewall: move stm32_firewall header file in include folder

Other driver than RIFSC and ETZPC can implement firewall ops, such as
RCC.
In order for them to have access to the ops and type of this framework,
we need to get the `stm32_firewall.h` file in the include/ folder.

Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
Signed-off-by: Clément Le Goffic <legoffic.clement@gmail.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Link: https://lore.kernel.org/r/20260210-b4-firewall-upstream-v8-1-097c1e47af82@gmail.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2 months agosoc/tegra: Add Tegra238 Kconfig symbol
Thierry Reding [Thu, 26 Feb 2026 15:09:32 +0000 (16:09 +0100)] 
soc/tegra: Add Tegra238 Kconfig symbol

The NVIDIA Tegra238 SoC is an upcoming new chip. Add a Kconfig symbol to
allow fine-grained selection of support code for this chip.

Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2 months agosoc/tegra: Make ARCH_TEGRA_SOC_FOO defaults for NVIDIA Tegra
Krzysztof Kozlowski [Tue, 17 Feb 2026 09:16:36 +0000 (10:16 +0100)] 
soc/tegra: Make ARCH_TEGRA_SOC_FOO defaults for NVIDIA Tegra

By convention, only one globally selectable ARCH_PLATFORM is expected
for given SoC platform, defined in arch/arm64/Kconfig.platforms or
arch/arm/mach-*/Kconfig, because we target a single multi-platform
kernel image.

Platforms wanting different granularity, e.g. due to size constraints on
their devices, should be sure that globally only one ARCH_PLATFORM is
selected in defconfig.  Change Tegra per-SoC Kconfig entries to default
to ARCH_TEGRA allowing removal of these per-SoC parts from defconfigs.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Linus Walleij <linusw@kernel.org>
[treding@nvidia.com: Fix ARCH_PLATFORM typo, correct spelling]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2 months agosoc: hisilicon: kunpeng_hccs: Remove unused input parameter
Huisong Li [Tue, 17 Mar 2026 03:57:46 +0000 (11:57 +0800)] 
soc: hisilicon: kunpeng_hccs: Remove unused input parameter

The 'hdev' parameter of hccs_create_hccs_dir() is unused.
Remove it to fix the compiler warning.

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2 months agosoc: hisilicon: kunpeng_hccs: Fix discard ‘const’ qualifier compiling warning
Huisong Li [Tue, 17 Mar 2026 03:57:45 +0000 (11:57 +0800)] 
soc: hisilicon: kunpeng_hccs: Fix discard ‘const’ qualifier compiling warning

The link_fsm_map has ‘const’ qualifier, but the 'str' pointer
in link_fsm_map is discarded. So add 'const' for this pointer
to fix the compiling warning.

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2 months agofirmware: tegra: bpmp: Rename Tegra239 to Tegra238
Thierry Reding [Thu, 26 Feb 2026 15:09:33 +0000 (16:09 +0100)] 
firmware: tegra: bpmp: Rename Tegra239 to Tegra238

This chip identifies as Tegra238, so update the BPMP ABI header to refer
to it by the correct name.

Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2 months agofirmware: arm_scmi: Support loop control in quirk code snippets
Geert Uytterhoeven [Mon, 16 Mar 2026 15:34:40 +0000 (16:34 +0100)] 
firmware: arm_scmi: Support loop control in quirk code snippets

Each SCMI firmware quirk contains a code snippet, which handles the
quirk, and has full access to the surrounding context.  When this
context is (part of) a loop body, the code snippet may want to use loop
control statements like "break" and "continue".  Unfortunately the
SCMI_QUIRK() macro implementation contains a dummy loop, taking
precedence over any outer loops.  Hence quirk code cannot use loop
control statements, but has to resort to polluting the surrounding
context with a label, and use goto.

Fix this by replacing the "do { ... } while (0)" construct in the
SCMI_QUIRK() implementation by "({ ... })".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Cristian Marussi <cristian.marussi@arm.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Message-Id: <51de914cddef8fa86c2e7dd5397e5df759c45464.1773675224.git.geert+renesas@glider.be>
Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
2 months agosoc: renesas: r9a09g056-sys: Mark rzv2n_sys_init_data as __initconst
Lad Prabhakar [Mon, 9 Mar 2026 16:59:46 +0000 (16:59 +0000)] 
soc: renesas: r9a09g056-sys: Mark rzv2n_sys_init_data as __initconst

Annotate rzv2n_sys_init_data with __initconst as it is only used during
initialization.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://patch.msgid.link/20260309165946.3003731-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2 months agosoc: renesas: r9a09g047-sys: Mark rzg3e_sys_init_data as __initconst
Lad Prabhakar [Mon, 9 Mar 2026 16:59:45 +0000 (16:59 +0000)] 
soc: renesas: r9a09g047-sys: Mark rzg3e_sys_init_data as __initconst

Annotate rzg3e_sys_init_data with __initconst as it is only used during
initialization.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260309165946.3003731-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2 months agosoc: renesas: r9a09g057-sys: Mark rzv2h_sys_init_data as __initconst
Lad Prabhakar [Mon, 9 Mar 2026 16:59:44 +0000 (16:59 +0000)] 
soc: renesas: r9a09g057-sys: Mark rzv2h_sys_init_data as __initconst

Annotate rzv2h_sys_init_data with __initconst as it is only used during
initialization.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://patch.msgid.link/20260309165946.3003731-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2 months agoMerge tag 'renesas-dt-bindings-for-v7.1-tag1' of https://git.kernel.org/pub/scm/linux...
Krzysztof Kozlowski [Sat, 14 Mar 2026 11:10:17 +0000 (12:10 +0100)] 
Merge tag 'renesas-dt-bindings-for-v7.1-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/drivers

Renesas DT binding updates for v7.1

  - Document RZ/G3L SoC variants, the RZ/G3L SYSC block, and RZ/G3L
    SMARC SoM and Carrier-II EVK boards.

* tag 'renesas-dt-bindings-for-v7.1-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  dt-bindings: soc: renesas: renesas,rzg2l-sysc: Document RZ/G3L SoC
  dt-bindings: soc: renesas: Document RZ/G3L SoC variants, SMARC SoM and Carrier-II EVK

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2 months agoMerge tag 'renesas-drivers-for-v7.1-tag1' of https://git.kernel.org/pub/scm/linux...
Krzysztof Kozlowski [Sat, 14 Mar 2026 11:05:56 +0000 (12:05 +0100)] 
Merge tag 'renesas-drivers-for-v7.1-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/drivers

Renesas driver updates for v7.1

  - Initial support for the Renesas RZ/G3L (R9A08G046) SoC.

* tag 'renesas-drivers-for-v7.1-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  soc: renesas: rz-sysc: Add SoC identification for RZ/G3L SoC

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2 months agoMAINTAINERS: Add i.MX team to all arm NXP platforms
Alexander Stein [Wed, 4 Mar 2026 14:44:22 +0000 (15:44 +0100)] 
MAINTAINERS: Add i.MX team to all arm NXP platforms

i.MX team maintains layerscape as well, so add the whole
arch/arm/boot/dts/nxp directory as requested in [1].

[1] https://lore.kernel.org/all/Z+Vs+pHZs2fMP%2Fp3@lizhi-Precision-Tower-5810/

Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Acked-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
2 months agotee: clean up tee_core.h kernel-doc
Randy Dunlap [Wed, 11 Mar 2026 05:29:53 +0000 (22:29 -0700)] 
tee: clean up tee_core.h kernel-doc

Use the correct struct member name and function parameter name in
kernel-doc comments.
Move a macro that was between a struct's documentation and its
declaration.
These eliminate the following kernel-doc warnings:

Warning: include/linux/tee_core.h:73 struct member 'c_no_users' not
 described in 'tee_device'
Warning: include/linux/tee_core.h:132 #define TEE_DESC_PRIVILEGED
     0x1; error: Cannot parse struct or union!
Warning: include/linux/tee_core.h:257 function parameter 'connection_data'
 not described in 'tee_session_calc_client_uuid'
Warning: include/linux/tee_core.h:320 function parameter 'teedev'
 not described in 'tee_get_drvdata'

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2 months agofirmware: arm_scmi: Use round_up() for base protocol list size calculation
Peng Fan [Sat, 28 Feb 2026 03:37:33 +0000 (11:37 +0800)] 
firmware: arm_scmi: Use round_up() for base protocol list size calculation

Replace the open-coded size rounding logic with the kernel's
round_up() helper to improve readability and align with common
kernel practices.

The original expression:
  (1 + (loop_num_ret - 1) / sizeof(u32)) * sizeof(u32)

is equivalent to rounding up loop_num_ret to the nearest multiple of
sizeof(u32), which is exactly what round_up() does.

No functional change.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Cristian Marussi <cristian.marussi@arm.com>
Message-Id: <20260228-scmi-check-v1-1-4935b58bb2db@nxp.com>
Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
2 months agofirmware: arm_scmi: Implement arm,no-completion-irq property
Marek Vasut [Sat, 17 Jan 2026 01:02:29 +0000 (02:02 +0100)] 
firmware: arm_scmi: Implement arm,no-completion-irq property

Implement new property arm,no-completion-irq, which sets all SCMI
operation into poll mode. This is meant to work around uncooperative
SCP implementations, which do not generate completion interrupts.
This applies to mbox/shmem based implementations.

With this property set, such implementations which do not generate
interrupts can be interacted with, until they are fixed to generate
interrupts properly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Cristian Marussi <cristian.marussi@arm.com>
Message-Id: <20260117010241.186685-2-marek.vasut+renesas@mailbox.org>
Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
2 months agodt-bindings: firmware: arm,scmi: Document arm,no-completion-irq property
Marek Vasut [Sat, 17 Jan 2026 01:02:28 +0000 (02:02 +0100)] 
dt-bindings: firmware: arm,scmi: Document arm,no-completion-irq property

Document new property arm,no-completion-irq . This optional property
is intended for hardware that does not generate completion interrupts
and can be used to unconditionally enable forced polling mode of
operation.

With this property set, such implementations which do not generate
interrupts can be interacted with, until they are fixed to generate
interrupts properly.

Note that, because the original base protocol exchange also requires
some sort of completion mechanism, it is not possible to query SCMI
itself for this property and it must be described in DT. While this
does look a bit like policy, the SCMI provider is part of the
hardware, hence DT.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Cristian Marussi <cristian.marussi@arm.com>
Message-Id: <20260117010241.186685-1-marek.vasut+renesas@mailbox.org>
Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
2 months agomemory: tegra: Add MC error logging support for Tegra264
Ketan Patil [Thu, 26 Feb 2026 16:31:15 +0000 (16:31 +0000)] 
memory: tegra: Add MC error logging support for Tegra264

In Tegra264, different components from memory subsystems like Memory
Controller Fabric (MCF), HUB, HUB Common (HUBC), Side Band Shim (SBS)
and channels have different interrupt lines for receiving memory
controller error interrupts.

Add support for logging memory controller errors reported by these
memory subsystems on Tegra264 by:
- Renaming tegra_mc_error_names array to tegra20_mc_error_names
  because it has a different bit index for error names compared to
  Tegra264.
- Defining the intmask registers and mask values supported for
  Tegra264.
- Registering interrupt handlers for interrupts associated with these
  different MC components which read the interrupt status registers to
  determine the type of violation that occurred.

Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://patch.msgid.link/20260226163115.1152181-7-ketanp@nvidia.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2 months agomemory: tegra: Prepare for supporting multiple intmask registers
Ketan Patil [Thu, 26 Feb 2026 16:31:14 +0000 (16:31 +0000)] 
memory: tegra: Prepare for supporting multiple intmask registers

Add a new structure for the intmask register e.g. MC_INTMASK_0 and
it's mask value. Add an array of these new structures to prepare for
supporting multiple intmask registers. This is done in preparation for
adding support for Tegra264 which supports multiple intmask registers.

Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://patch.msgid.link/20260226163115.1152181-6-ketanp@nvidia.com
[krzk: Fix checkpatch warning]
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2 months agomemory: tegra: Group SoC specific fields
Ketan Patil [Thu, 26 Feb 2026 16:31:13 +0000 (16:31 +0000)] 
memory: tegra: Group SoC specific fields

Introduce new SoC specific fields in tegra_mc_soc struct for high
address mask and error status type mask because Tegra264 has different
values for these than the existing devices. Error status registers
e.g. MC_ERR_STATUS_0 has few bits which indicate the type of the
error. In order to obtain such type of error from error status
register, we use error status type mask. Similarly, these error status
registers have bits which indicate the higher address bits of the
address responsible for mc error. In order to obtain such higher
address, we use high address mask. Make this change to prepare for
adding MC interrupt support for Tegra264.

Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://patch.msgid.link/20260226163115.1152181-5-ketanp@nvidia.com
[krzk: Fix checkpatch warning]
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2 months agomemory: tegra: Add support for multiple IRQs
Ketan Patil [Thu, 26 Feb 2026 16:31:12 +0000 (16:31 +0000)] 
memory: tegra: Add support for multiple IRQs

Add support to handle multiple MC interrupts lines, as supported by
Tegra264. Turn the single IRQ handler callback into a counted array to
allow specifying a separate handler for each interrupt. Move IRQ
handlers into tegra_mc_soc struct, so as to specify SoC specific
values.

Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://patch.msgid.link/20260226163115.1152181-4-ketanp@nvidia.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2 months agomemory: tegra: Group register and fields
Ketan Patil [Thu, 26 Feb 2026 16:31:11 +0000 (16:31 +0000)] 
memory: tegra: Group register and fields

The current register definitions are not in sorted order. Sort these
registers according to their address. Put bit fields and masks of the
corresponding registers below the register definitions to clearly
identify which fields belongs to which registers.

Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://patch.msgid.link/20260226163115.1152181-3-ketanp@nvidia.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2 months agomemory: tegra: Group error handling related registers
Ketan Patil [Thu, 26 Feb 2026 16:31:10 +0000 (16:31 +0000)] 
memory: tegra: Group error handling related registers

Group MC error related registers into a struct as they could have SoC
specific values. Tegra264 has different register offsets than the
existing devices and so in order to add support for Tegra264 we need to
first make this change.

Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://patch.msgid.link/20260226163115.1152181-2-ketanp@nvidia.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
3 months agosoc: renesas: rz-sysc: Add SoC identification for RZ/G3L SoC
Biju Das [Tue, 3 Feb 2026 10:30:12 +0000 (10:30 +0000)] 
soc: renesas: rz-sysc: Add SoC identification for RZ/G3L SoC

Add SoC identification for the RZ/G3L SoC using the System Controller
(SYSC) block.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260203103031.247435-5-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 months agodt-bindings: soc: renesas: renesas,rzg2l-sysc: Document RZ/G3L SoC
Biju Das [Tue, 3 Feb 2026 10:30:11 +0000 (10:30 +0000)] 
dt-bindings: soc: renesas: renesas,rzg2l-sysc: Document RZ/G3L SoC

Document RZ/G3L (R9A08G046) SYSC bindings.  The SYSC block found on the
RZ/G3L SoC is similar to the one found on RZ/G3S.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260203103031.247435-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 months agodt-bindings: soc: renesas: Document RZ/G3L SoC variants, SMARC SoM and Carrier-II EVK
Biju Das [Tue, 3 Feb 2026 10:30:10 +0000 (10:30 +0000)] 
dt-bindings: soc: renesas: Document RZ/G3L SoC variants, SMARC SoM and Carrier-II EVK

Document Renesas RZ/G3L (R9A08G046) SoC variants and the Renesas RZ/G3L
SMARC Carrier-II EVK board which is based on the Renesas RZ/G3L SMARC SoM.
The RZ/G3L SMARC Carrier-II EVK consists of an RZ/G3L SoM module and a
SMARC Carrier-II carrier board.  The SoM module sits on top of the carrier
board.

Reviewed-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260203103031.247435-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 months agomemory: tegra-mc: Use %pe format
Krzysztof Kozlowski [Thu, 26 Feb 2026 20:35:27 +0000 (21:35 +0100)] 
memory: tegra-mc: Use %pe format

Make code printing pointer error value a bit simpler and fix coccinelle
suggestion:

  tegra/mc.c:975:4-11: WARNING: Consider using %pe to print PTR_ERR()

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://patch.msgid.link/20260226-memory-simplify-v1-4-ccb94f378628@oss.qualcomm.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
3 months agomemory: tegra-mc: Simplify printing PTR_ERR with dev_err_probe
Krzysztof Kozlowski [Thu, 26 Feb 2026 20:35:26 +0000 (21:35 +0100)] 
memory: tegra-mc: Simplify printing PTR_ERR with dev_err_probe

Use dev_err_probe() to simplify the code and fix Coccinelle warning:

  tegra/mc.c:513:52-59: WARNING: Consider using %pe to print PTR_ERR()

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://patch.msgid.link/20260226-memory-simplify-v1-3-ccb94f378628@oss.qualcomm.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
3 months agomemory: tegra-mc: Drop tegra_mc_setup_latency_allowance() return value
Krzysztof Kozlowski [Thu, 26 Feb 2026 20:35:25 +0000 (21:35 +0100)] 
memory: tegra-mc: Drop tegra_mc_setup_latency_allowance() return value

tegra_mc_setup_latency_allowance() only succeeds, thus its return value
can be dropped making code a bit simpler.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://patch.msgid.link/20260226-memory-simplify-v1-2-ccb94f378628@oss.qualcomm.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
3 months agomemory: renesas-rpc-if: Simplify printing PTR_ERR with dev_err_probe
Krzysztof Kozlowski [Thu, 26 Feb 2026 20:35:24 +0000 (21:35 +0100)] 
memory: renesas-rpc-if: Simplify printing PTR_ERR with dev_err_probe

Use dev_err_probe() to simplify the code and fix Coccinelle warning:

  renesas-rpc-if.c:1010:3-10: WARNING: Consider using %pe to print PTR_ERR()

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260226-memory-simplify-v1-1-ccb94f378628@oss.qualcomm.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
3 months agooptee: simplify OP-TEE context match
Rouven Czerwinski [Mon, 26 Jan 2026 10:11:24 +0000 (11:11 +0100)] 
optee: simplify OP-TEE context match

Simplify the TEE implementor ID match by returning the boolean
expression directly instead of going through an if/else.

Signed-off-by: Rouven Czerwinski <rouven.czerwinski@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
3 months agofirmware: exynos-acpm: Drop fake 'const' on handle pointer
Krzysztof Kozlowski [Tue, 24 Feb 2026 10:42:04 +0000 (11:42 +0100)] 
firmware: exynos-acpm: Drop fake 'const' on handle pointer

All the functions operating on the 'handle' pointer are claiming it is a
pointer to const thus they should not modify the handle.  In fact that's
a false statement, because first thing these functions do is drop the
cast to const with container_of:

  struct acpm_info *acpm = handle_to_acpm_info(handle);

And with such cast the handle is easily writable with simple:

  acpm->handle.ops.pmic_ops.read_reg = NULL;

The code is not correct logically, either, because functions like
acpm_get_by_node() and acpm_handle_put() are meant to modify the handle
reference counting, thus they must modify the handle.  Modification here
happens anyway, even if the reference counting is stored in the
container which the handle is part of.

The code does not have actual visible bug, but incorrect 'const'
annotations could lead to incorrect compiler decisions.

Fixes: a88927b534ba ("firmware: add Exynos ACPM protocol driver")
Cc: stable@vger.kernel.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260224104203.42950-2-krzysztof.kozlowski@oss.qualcomm.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
3 months agomemory: brcmstb_memc: Expand LPDDR4 check to cover for LPDDR5
Florian Fainelli [Thu, 22 Jan 2026 00:35:00 +0000 (16:35 -0800)] 
memory: brcmstb_memc: Expand LPDDR4 check to cover for LPDDR5

The same limitations that apply to LPDDR4 also apply to LPDDR5. Expand
the check and rename accordingly.

Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
Link: https://patch.msgid.link/20260122003501.1191059-1-florian.fainelli@broadcom.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
3 months agodt-bindings: firmware: google,gs101-acpm-ipc: add S2MPG11 secondary PMIC
André Draszik [Tue, 10 Feb 2026 12:42:32 +0000 (12:42 +0000)] 
dt-bindings: firmware: google,gs101-acpm-ipc: add S2MPG11 secondary PMIC

In a typical system using the Samsung S2MPG10 PMIC, an S2MPG11 is used
as a sub-PMIC.

The interface for both is the ACPM firmware protocol, so update the
binding to allow the relevant node and update the example here to
describe the connection for both PMICs.

Since we have two PMICs here, but can not use the 'reg' property (as
the addressing is based on software, i.e. the ACPM firmware), the node
names reflect that with their respective suffix. The existing 'pmic'
therefore becomes deprecated in favour of 'pmic-1'.

While at it, update the example.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Link: https://patch.msgid.link/20260210-s2mpg1x-regulators-v8-1-c429d709c0e0@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
3 months agodt-bindings: cache: bt1-l2-ctl: Remove unused bindings
Andy Shevchenko [Wed, 25 Feb 2026 17:37:21 +0000 (18:37 +0100)] 
dt-bindings: cache: bt1-l2-ctl: Remove unused bindings

As stated in [1] the Baikal platforms are not supported and
the respective driver code has just been removed. Remove
unused bindings.

Link: https://lore.kernel.org/lkml/22b92ddf-6321-41b5-8073-f9c7064d3432@infradead.org/
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://patch.msgid.link/20260225173930.3819351-3-andriy.shevchenko@linux.intel.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
3 months agomemory: bt1-l2-ctl: Remove not-going-to-be-supported code for Baikal SoC
Andy Shevchenko [Wed, 25 Feb 2026 17:37:20 +0000 (18:37 +0100)] 
memory: bt1-l2-ctl: Remove not-going-to-be-supported code for Baikal SoC

As noticed in the discussion [1] the Baikal SoC and platforms
are not going to be finalized, hence remove stale code.

Link: https://lore.kernel.org/lkml/22b92ddf-6321-41b5-8073-f9c7064d3432@infradead.org/
Reviewed-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://patch.msgid.link/20260225173930.3819351-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
3 months agobus: imx-aipstz: set default value for opacr registers
Shengjiu Wang [Mon, 26 Jan 2026 09:11:56 +0000 (17:11 +0800)] 
bus: imx-aipstz: set default value for opacr registers

The sdma script app_2_mcu needs the permission to access the peripheral
devices:

1) SDMA2 transactions are set to user-mode in this particular case.
2) This type of script doesn't use the peripheral interface (connected
directly to SPBA), but it uses the peripheral DMA interface, then the
SDMA2-issued transactions are subjected to AIPSTZ5's security-related
checks.

So need to clear the Supervisor Protect bit of SPBA2, otherwise the sdma
script can't work. As the imx-aipstz is a common driver for all aips bus,
so set default value (zero) for all opacr registers.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
3 months agofirmware: exynos-acpm: Count acpm_xfer buffers with __counted_by_ptr
Krzysztof Kozlowski [Thu, 19 Feb 2026 11:27:12 +0000 (12:27 +0100)] 
firmware: exynos-acpm: Count acpm_xfer buffers with __counted_by_ptr

Use __counted_by_ptr() attribute on the acpm_xfer buffers so UBSAN will
validate runtime that we do not pass over the buffer size, thus making
code safer.

Usage of __counted_by_ptr() (or actually __counted_by()) requires that
counter is initialized before counted array.

Tested-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260219-firmare-acpm-counted-v2-3-e1f7389237d3@oss.qualcomm.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
3 months agofirmware: exynos-acpm: Count number of commands in acpm_xfer
Krzysztof Kozlowski [Thu, 19 Feb 2026 11:27:11 +0000 (12:27 +0100)] 
firmware: exynos-acpm: Count number of commands in acpm_xfer

Struct acpm_xfer holds two buffers with u32 commands - rxd and txd - and
counts their size by rxlen and txlen.  "len" suffix is here ambiguous,
so could mean length of the buffer or length of commands, and these are
not the same since each command is u32.  Rename these to rxcnt and
txcnt, and change their usage to count the number of commands in each
buffer.

This will have a benefit of allowing to use __counted_by_ptr later.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://patch.msgid.link/20260219-firmare-acpm-counted-v2-2-e1f7389237d3@oss.qualcomm.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
3 months agofirmware: exynos-acpm: Use unsigned int for acpm_pmic_linux_errmap index
Krzysztof Kozlowski [Thu, 19 Feb 2026 11:27:10 +0000 (12:27 +0100)] 
firmware: exynos-acpm: Use unsigned int for acpm_pmic_linux_errmap index

acpm_pmic_to_linux_err() uses an unsigned integer obtained from messages
as index of array to map them to error codes.  Array index cannot be
negative, so make that explicit.

Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260219-firmare-acpm-counted-v2-1-e1f7389237d3@oss.qualcomm.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
3 months agomemory: tegra30-emc: Fix dll_change check
Mikko Perttunen [Mon, 26 Jan 2026 06:50:43 +0000 (15:50 +0900)] 
memory: tegra30-emc: Fix dll_change check

The code checking whether the specified memory timing enables DLL
in the EMRS register was reversed. DLL is enabled if bit A0 is low.
Fix the check.

Fixes: e34212c75a68 ("memory: tegra: Introduce Tegra30 EMC driver")
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Link: https://patch.msgid.link/20260126-fix-emc-dllchange-v1-2-47ad3bb63262@nvidia.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
3 months agomemory: tegra124-emc: Fix dll_change check
Mikko Perttunen [Mon, 26 Jan 2026 06:50:42 +0000 (15:50 +0900)] 
memory: tegra124-emc: Fix dll_change check

The code checking whether the specified memory timing enables DLL
in the EMRS register was reversed. DLL is enabled if bit A0 is low.
Fix the check.

Fixes: 73a7f0a90641 ("memory: tegra: Add EMC (external memory controller) driver")
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Link: https://patch.msgid.link/20260126-fix-emc-dllchange-v1-1-47ad3bb63262@nvidia.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
3 months agomemory: tegra: Add support for DBB clock on Tegra264
Thierry Reding [Fri, 16 Jan 2026 12:37:32 +0000 (13:37 +0100)] 
memory: tegra: Add support for DBB clock on Tegra264

The DBB clock is needed by many IP blocks in order to access system
memory via the data backbone. The memory controller and external memory
controllers are the central place where these accesses are managed, so
make sure that the clock can be controlled from the corresponding
driver.

Note that not all drivers fully register bandwidth requests, and hence
the EMC driver doesn't have enough information to know when it's safe to
switch the clock off, so for now it will be kept on permanently.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://patch.msgid.link/20260116123732.140813-1-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
3 months agoLinux 7.0-rc1 v7.0-rc1
Linus Torvalds [Sun, 22 Feb 2026 21:18:59 +0000 (13:18 -0800)] 
Linux 7.0-rc1

3 months agoMerge tag 'fsverity-for-linus' of git://git.kernel.org/pub/scm/fs/fsverity/linux
Linus Torvalds [Sun, 22 Feb 2026 21:12:04 +0000 (13:12 -0800)] 
Merge tag 'fsverity-for-linus' of git://git.kernel.org/pub/scm/fs/fsverity/linux

Pull fsverity fixes from Eric Biggers:

 - Fix a build error on parisc

 - Remove the non-large-folio-aware function fsverity_verify_page()

* tag 'fsverity-for-linus' of git://git.kernel.org/pub/scm/fs/fsverity/linux:
  fsverity: fix build error by adding fsverity_readahead() stub
  fsverity: remove fsverity_verify_page()
  f2fs: make f2fs_verify_cluster() partially large-folio-aware
  f2fs: remove unnecessary ClearPageUptodate in f2fs_verify_cluster()

3 months agoMerge tag 'libcrypto-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
Linus Torvalds [Sun, 22 Feb 2026 21:09:33 +0000 (13:09 -0800)] 
Merge tag 'libcrypto-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ebiggers/linux

Pull crypto library fix from Eric Biggers:
 "Fix a big endian specific issue in the PPC64-optimized AES code"

* tag 'libcrypto-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ebiggers/linux:
  lib/crypto: powerpc/aes: Fix rndkey_from_vsx() on big endian CPUs

3 months agoCREDITS: Add -next to Stephen Rothwell's entry
Mark Brown [Tue, 17 Feb 2026 13:10:46 +0000 (13:10 +0000)] 
CREDITS: Add -next to Stephen Rothwell's entry

Stephen retired and stepped back from -next maintainership, update his
entry in CREDITS to recognise his 18 years of hard work making it what
it is today and all the impact it's had on our development process.

Also update to his current GnuPG key while we're here.

Acked-by: Stephen Rothwell <sfr@canb.auug.org.au>
Acked-by: SeongJae Park <sj@kernel.org>
Reviewed-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
3 months agox509: select CONFIG_CRYPTO_LIB_SHA256
Arnd Bergmann [Tue, 17 Feb 2026 08:26:49 +0000 (08:26 +0000)] 
x509: select CONFIG_CRYPTO_LIB_SHA256

The x509 public key code gained a dependency on the sha256 hash
implementation, causing a rare link time failure in randconfig
builds:

  arm-linux-gnueabi-ld: crypto/asymmetric_keys/x509_public_key.o: in function `x509_get_sig_params':
  x509_public_key.c:(.text.x509_get_sig_params+0x12): undefined reference to `sha256'
  arm-linux-gnueabi-ld: (sha256): Unknown destination type (ARM/Thumb) in crypto/asymmetric_keys/x509_public_key.o
  x509_public_key.c:(.text.x509_get_sig_params+0x12): dangerous relocation: unsupported relocation

Select the necessary library code from Kconfig.

Fixes: 2c62068ac86b ("x509: Separately calculate sha256 for blacklist")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: David Howells <dhowells@redhat.com>
Reviewed-by: Eric Biggers <ebiggers@kernel.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
3 months agoxz: fix arm fdt compile error for kmalloc replacement
Haiyue Wang [Sun, 22 Feb 2026 12:11:00 +0000 (20:11 +0800)] 
xz: fix arm fdt compile error for kmalloc replacement

Align to the commit bf4afc53b77a ("Convert 'alloc_obj' family to use the
new default GFP_KERNEL argument") update the 'kmalloc_obj' declaration
for userspace to fix below compile error:

  In file included from arch/arm/boot/compressed/../../../../lib/decompress_unxz.c:241,
                   from arch/arm/boot/compressed/decompress.c:56:
  arch/arm/boot/compressed/../../../../lib/xz/xz_dec_stream.c: In function 'xz_dec_init':
  arch/arm/boot/compressed/../../../../lib/xz/xz_dec_stream.c:787:28: error: implicit declaration of function 'kmalloc_obj'; did you mean 'kmalloc'? [-Wimplicit-function-declaration]
     787 |         struct xz_dec *s = kmalloc_obj(*s);
         |                            ^~~~~~~~~~~
         |                            kmalloc

Signed-off-by: Haiyue Wang <haiyuewa@163.com>
Fixes: 69050f8d6d07 ("treewide: Replace kmalloc with kmalloc_obj for non-scalar types")
Fixes: bf4afc53b77a ("Convert 'alloc_obj' family to use the new default GFP_KERNEL argument")
Reviewed-by: Kees Cook <kees@kernel.org>
Acked-by: Lasse Collin <lasse.collin@tukaani.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
3 months agoMerge tag 'rtc-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux
Linus Torvalds [Sun, 22 Feb 2026 17:43:11 +0000 (09:43 -0800)] 
Merge tag 'rtc-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux

Pull RTC updates from Alexandre Belloni:

 - loongson: Loongson-2K0300 support

 - s35390a: nvmem support

 - zynqmp: rework calibration

* tag 'rtc-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
  rtc: ds1390: fix number of bytes read from RTC
  rtc: class: Remove duplicate check for alarm
  rtc: optee: simplify OP-TEE context match
  rtc: interface: Alarm race handling should not discard preceding error
  rtc: s35390a: implement nvmem support
  rtc: loongson: Add Loongson-2K0300 support
  dt-bindings: rtc: loongson: Document Loongson-2K0300 compatible
  dt-bindings: rtc: loongson: Correct Loongson-1C interrupts property
  dt-bindings: rtc: renesas,rz-rtca3: Add RZ/V2N support
  dt-bindings: rtc: cpcap: convert to schema
  rtc: zynqmp: use dynamic max and min offset ranges
  rtc: zynqmp: rework set_offset
  rtc: zynqmp: rework read_offset
  rtc: zynqmp: check calibration max value
  rtc: zynqmp: correct frequency value
  rtc: amlogic-a4: Remove IRQF_ONESHOT
  rtc: pcf8563: use correct of_node for output clock
  rtc: max31335: use correct CONFIG symbol in IS_REACHABLE()
  rtc: nvvrs: Add ARCH_TEGRA to the NV VRS RTC driver

3 months agoMerge tag 'rust-fixes-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/ojeda...
Linus Torvalds [Sun, 22 Feb 2026 16:43:31 +0000 (08:43 -0800)] 
Merge tag 'rust-fixes-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/ojeda/linux

Pull rust fixes from Miguel Ojeda:
 "Toolchain and infrastructure:

   - Pass '-Zunstable-options' flag required by the future Rust 1.95.0

   - Fix 'objtool' warning for Rust 1.84.0

  'kernel' crate:

   - 'irq' module: add missing bound detected by the future Rust 1.95.0

   - 'list' module: add missing 'unsafe' blocks and placeholder safety
     comments to macros (an issue for future callers within the crate)

  'pin-init' crate:

   - Clean Clippy warning that changed behavior in the future Rust
     1.95.0"

* tag 'rust-fixes-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/ojeda/linux:
  rust: list: Add unsafe blocks for container_of and safety comments
  rust: pin-init: replace clippy `expect` with `allow`
  rust: irq: add `'static` bounds to irq callbacks
  objtool/rust: add one more `noreturn` Rust function
  rust: kbuild: pass `-Zunstable-options` for Rust 1.95.0

3 months agoMerge tag 'trace-rv-7.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/trace...
Linus Torvalds [Sun, 22 Feb 2026 16:40:13 +0000 (08:40 -0800)] 
Merge tag 'trace-rv-7.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/trace/linux-trace

Pull runtime verifier fix from Steven Rostedt:

 - Fix multiple definition of __pcpu_unique_da_mon_this

   After refactoring monitors, we used static per-cpu variables with the
   same names across different per-cpu monitors. This is explicitly
   disallowed for modules on some architectures (alpha) or if
   CONFIG_DEBUG_FORCE_WEAK_PER_CPU is enabled (e.g. Fedora's debug
   kernel). Make sure all those variables have different names to avoid
   compilation issues.

* tag 'trace-rv-7.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/trace/linux-trace:
  rv: Fix multiple definition of __pcpu_unique_da_mon_this

3 months agoConvert remaining multi-line kmalloc_obj/flex GFP_KERNEL uses
Kees Cook [Sun, 22 Feb 2026 07:46:04 +0000 (23:46 -0800)] 
Convert remaining multi-line kmalloc_obj/flex GFP_KERNEL uses

Conversion performed via this Coccinelle script:

  // SPDX-License-Identifier: GPL-2.0-only
  // Options: --include-headers-for-types --all-includes --include-headers --keep-comments
  virtual patch

  @gfp depends on patch && !(file in "tools") && !(file in "samples")@
  identifier ALLOC = {kmalloc_obj,kmalloc_objs,kmalloc_flex,
      kzalloc_obj,kzalloc_objs,kzalloc_flex,
    kvmalloc_obj,kvmalloc_objs,kvmalloc_flex,
    kvzalloc_obj,kvzalloc_objs,kvzalloc_flex};
  @@

   ALLOC(...
  - , GFP_KERNEL
   )

  $ make coccicheck MODE=patch COCCI=gfp.cocci

Build and boot tested x86_64 with Fedora 42's GCC and Clang:

Linux version 6.19.0+ (user@host) (gcc (GCC) 15.2.1 20260123 (Red Hat 15.2.1-7), GNU ld version 2.44-12.fc42) #1 SMP PREEMPT_DYNAMIC 1970-01-01
Linux version 6.19.0+ (user@host) (clang version 20.1.8 (Fedora 20.1.8-4.fc42), LLD 20.1.8) #1 SMP PREEMPT_DYNAMIC 1970-01-01

Signed-off-by: Kees Cook <kees@kernel.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
3 months agoConvert more 'alloc_obj' cases to default GFP_KERNEL arguments
Linus Torvalds [Sun, 22 Feb 2026 04:03:00 +0000 (20:03 -0800)] 
Convert more 'alloc_obj' cases to default GFP_KERNEL arguments

This converts some of the visually simpler cases that have been split
over multiple lines.  I only did the ones that are easy to verify the
resulting diff by having just that final GFP_KERNEL argument on the next
line.

Somebody should probably do a proper coccinelle script for this, but for
me the trivial script actually resulted in an assertion failure in the
middle of the script.  I probably had made it a bit _too_ trivial.

So after fighting that far a while I decided to just do some of the
syntactically simpler cases with variations of the previous 'sed'
scripts.

The more syntactically complex multi-line cases would mostly really want
whitespace cleanup anyway.

Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
3 months agoConvert 'alloc_flex' family to use the new default GFP_KERNEL argument
Linus Torvalds [Sun, 22 Feb 2026 01:06:51 +0000 (17:06 -0800)] 
Convert 'alloc_flex' family to use the new default GFP_KERNEL argument

This is the exact same thing as the 'alloc_obj()' version, only much
smaller because there are a lot fewer users of the *alloc_flex()
interface.

As with alloc_obj() version, this was done entirely with mindless brute
force, using the same script, except using 'flex' in the pattern rather
than 'objs*'.

Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
3 months agoConvert 'alloc_obj' family to use the new default GFP_KERNEL argument
Linus Torvalds [Sun, 22 Feb 2026 00:37:42 +0000 (16:37 -0800)] 
Convert 'alloc_obj' family to use the new default GFP_KERNEL argument

This was done entirely with mindless brute force, using

    git grep -l '\<k[vmz]*alloc_objs*(.*, GFP_KERNEL)' |
        xargs sed -i 's/\(alloc_objs*(.*\), GFP_KERNEL)/\1)/'

to convert the new alloc_obj() users that had a simple GFP_KERNEL
argument to just drop that argument.

Note that due to the extreme simplicity of the scripting, any slightly
more complex cases spread over multiple lines would not be triggered:
they definitely exist, but this covers the vast bulk of the cases, and
the resulting diff is also then easier to check automatically.

For the same reason the 'flex' versions will be done as a separate
conversion.

Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
3 months agoadd default_gfp() helper macro and use it in the new *alloc_obj() helpers
Linus Torvalds [Sun, 22 Feb 2026 00:14:11 +0000 (16:14 -0800)] 
add default_gfp() helper macro and use it in the new *alloc_obj() helpers

Most simple allocations use GFP_KERNEL, and with the new allocation
helpers being introduced, let's just take advantage of that to simplify
that default case.

It's a numbers game:

    git grep 'alloc_obj(' |
sed 's/.*\(GFP_[_A-Z]*\).*/\1/' |
sort | uniq -c | sort -n | tail

shows that about 90% of all those new allocator instances just use that
standard GFP_KERNEL.

Those helpers are already macros, and we can easily just make it be the
default case when the gfp argument is missing.

And yes, we could do that for all the legacy interfaces too, but let's
keep it to just the new ones at least for now, since those all got
converted recently anyway, so this is not any "extra" noise outside of
that limited conversion.

And, in fact, I want to do this before doing the -rc1 release, exactly
so that we don't get extra merge conflicts.

Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
3 months agoslab.h: disable completely broken overflow handling in flex allocations
Linus Torvalds [Sat, 21 Feb 2026 23:12:09 +0000 (15:12 -0800)] 
slab.h: disable completely broken overflow handling in flex allocations

Commit 69050f8d6d07 ("treewide: Replace kmalloc with kmalloc_obj for
non-scalar types") started using the new allocation helpers, and in the
process showed that they were completely non-working.

The overflow logic in overflows_flex_counter_type() is completely the
wrong way around, and that broke __alloc_flex() completely.  By chance,
the resulting code was then such a mess that clang generated
sufficiently garbage code that objtool warned about it all.  Which made
it somewhat quicker to narrow things down.

While fixing overflows_flex_counter_type() would presumably fix this
all, I'm excising the whole broken overflow logic from __alloc_flex(),
because we don't want that kind of code in basic allocation functions
anyway.

That (no longer) broken overflows_flex_counter_type() thing needs to be
inserted into the actual __set_flex_counter() logic in the unlikely case
that we ever want this at all.  And made conditional.

Fixes: 81cee9166a90 ("compiler_types: Introduce __flex_counter() and family")
Fixes: 69050f8d6d07 ("treewide: Replace kmalloc with kmalloc_obj for non-scalar types")
Cc: Kees Cook <kees@kernel.org>
Link: https://lore.kernel.org/all/CAHk-=whEd020BYzGTzYrENjD9Z5_82xx6h8HsQvH5xDSnv0=Hw@mail.gmail.com/
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>