Jan Čermák [Tue, 12 May 2026 12:24:35 +0000 (14:24 +0200)]
mmc: bcmstb: Fix non-removable check in bcm2712 init
sdhci_brcmstb_init_2712() reads host->mmc->host_caps to decide whether
to force card-detect for a non-removable eMMC, or to route the CD signal
for a removable SD card. At the time this function runs from
sdhci_bcmstb_probe(), however, host->mmc->host_caps is still zero, that
field is only populated later by the MMC uclass, after the driver's
probe returns. mmc_of_parse() has already filled plat->cfg.host_caps
from the device tree by this point, so check that field instead.
Without the fix, every BCM2712 SDHCI instance takes the else branch and
writes SDIO_CFG_SD_PIN_SEL = SDIO_CFG_SD_PIN_SEL_CARD (0x02), including
the non-removable eMMC on boards such as CM5 on Home Assistant Yellow.
The SDIO_CFG block lies outside the SDHCI core's reset scope, so this
value persists across SDHCI_RESET_ALL into the next stage. On the
BCM2712, having SD_PIN_SEL set to "SD" when the Linux kernel performs
its first set_power(MMC_POWER_UP) write racily prevents the SDHCI
POWER_ON bit from latching (see [1] for the whole backstory) - the
voltage bits stick but POWER_ON drops - which wedges the first CMD0 the
full 10 s software timeout. On Home Assistant Yellow this manifested as
a ~20 s eMMC probe delay on roughly one in two Linux boots when U-Boot
was the previous stage. Booting directly from the Pi firmware (no U-Boot
in between) left SD_PIN_SEL at its default and did not exhibit the race.
Reading plat->cfg.host_caps lets init_2712 see the "non-removable"
property and take the correct branch, leaving SD_PIN_SEL untouched for
the eMMC.
Fixes: 10127cdbab64 ("mmc: bcmstb: Add support for bcm2712 SD controller") Signed-off-by: Jan Čermák <sairon@sairon.cz> Reviewed-by: Ivan T. Ivanov <iivanov@suse.de>
- Add support dynamic A/B bank bootup for STM32MP15
- Increase SYS_MALLOC_F_LEN for stm32mp15_defconfig to fix boot with optee-4.10.0
- Enable Arm SMC watchdog for STM32MP1
- Update part number for TM32MP251/3 SoC's family
Yann Gautier [Wed, 20 May 2026 16:07:15 +0000 (18:07 +0200)]
ARM: dts: stm32: enable SMC watchdog for STM32MP15 SCMI config
For this configuration, the watchdog (iwdg1) is secured and managed by
OP-TEE. Add an watchdog node with arm,smc-wdt compatible, and disable
iwdg2 node which is then no more used.
Yann Gautier [Wed, 20 May 2026 16:07:14 +0000 (18:07 +0200)]
configs: stm32mp13: activate watchdog
No watchdog was enabled for STM32MP13 platform. Add the required flags to
support it. As done for STM32MP15 (in SCMI config) and STM32MP2x, we use
the Arm SMC watchdog. The required nodes were already present in Linux
imported DT files (stm32mp13.dtsi & stm32mp135f-dk.dts).
To enable this SMC watchdog on other platforms based on STM32MP13, check
that both the following flags are enabled in the dedicated config file:
CONFIG_WDT=y
CONFIG_WDT_ARM_SMC=y
And that there is a node in Linux board DT that enables the feature, as
it is done in stm32mp135f-dk.dts:
&arm_wdt {
timeout-sec = <32>;
status = "okay";
};
Lionel Debieve [Wed, 20 May 2026 16:07:13 +0000 (18:07 +0200)]
configs: stm32mp15: enable WDT_ARM_SMC driver
Enable the arm watchdog over SMC driver. This allows using a secure
watchdog, based on IWDG1 peripheral and managed by OP-TEE.
The driver will be probed if a watchdog node with "arm,smc-wdt"
compatible is enabled.
Dario Binacchi [Mon, 18 May 2026 06:54:27 +0000 (08:54 +0200)]
board: st: stm32mp15: support dynamic A/B bank bootup
Following commit 4300f9f4c5d7 ("board: st: stm32mp25: support dynamic
A/B bank bootup"), this patch enables automatic detection of the active
A/B bank on STM32MP15 platforms by retrieving partition GUIDs from FWU
metadata.
This ensures the system correctly identifies the bootable partitions
even in multi-bank scenarios, falling back to a standard bootable flag
scan if the UUIDs are missing.
To enable A/B bank bootup on STM32MP15 boards, add the following Kconfig
options to the stm32mp15[_basic]_defconfig:
Liel Harel [Sat, 9 May 2026 21:06:07 +0000 (00:06 +0300)]
mmc: bcm2835_sdhci: Parse generic MMC device tree properties
The bcm2835 SDHCI driver sets up the MMC host configuration via
sdhci_setup_cfg(), but does not parse generic MMC device tree
properties.
As a result, properties such as bus-width are ignored. On Raspberry Pi
Compute Module 4, the eMMC node describes an 8-bit bus, but U-Boot
initialized the device as 4-bit.
Call mmc_of_parse() before sdhci_setup_cfg() so that generic MMC
properties are folded into the host configuration before the MMC core
selects the bus width.
Tested on Raspberry Pi Compute Module 4 with onboard eMMC.
Signed-off-by: Liel Harel <liel.harel@gmail.com> Reviewed-by: Peter Robinson <pbrobinson@gmail.com> Tested-by: Peter Robinson <pbrobinson@gmail.com> # on the CM4 as well
The 'brcm,bcm2712-hdmi0' compatible string is used on RPi5.
There appears to be no change that impacts early boot output
on the display controller so add the RPi5 compatible string.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Wadim Egorov [Fri, 15 May 2026 05:43:27 +0000 (07:43 +0200)]
Makefile: binman: Search board directory before srctree
A file like rm-cfg.yaml accidentally left in the source tree root
shadows the board-specific copy. binman builds the wrong YAML, the
resulting rm-cfg.bin may match a different SoC, and we end up with
the following error:
k3_system_controller sysctrler: k3_sysctrler_start:
Boot Notification response failed. ret = -110
Move the board directory ahead of the srctree root so that the
most-specific match wins.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Reviewed-by: Simon Glass <sjg@chromium.org>
However there is a brief period of execution between #3 and #4 where the
core can issue speculative accesses to the entire DDR space (including
the reserved-memory regions) despite the caches being disabled.
A firewall exception is triggered whenever such speculative access is
made to secure DDR region of TFA or OP-TEE. This patch fixes the issue
by re-ordering the sequence as follows:
Anshul Dalal [Wed, 20 May 2026 02:51:49 +0000 (08:21 +0530)]
arm: armv8: mmu: move mmu enablement out of mmu_setup
Currently mmu_setup for ARMv8 performs two functions, first it sets up
the page tables based the memory map provided by the board and then it
enables the MMU.
However for some platforms runtime fixes to the generated page tables
are required before the MMU can be enabled, such as K3 family of SoCs.
Therefore this patch moves the enablement of the MMU out of mmu_setup
and to a standalone mmu_enable function to give more granular control to
the platforms.
Note that no functional changes are intended from this patch.
Moteen Shah [Wed, 20 May 2026 11:00:32 +0000 (16:30 +0530)]
am57xx: restore bootm_size for ARMv7 HighMem constraint
babae80169d removed bootm_size from ti_common.env to allow K3 boards
to process images larger than 256MB, but preserved it in
ti_armv7_keystone2.env for ARMv7 Keystone2 boards. AM57xx (also ARMv7)
was not covered by that preservation.
Without bootm_size, env_get_bootm_size() falls back to gd->ram_size,
causing initrd_high to be computed as the top of all RAM. On ARM32
boards with more RAM than the DMA zone (e.g. AM572x IDK with 2GiB),
this places the ramdisk above 0xafe00000 (HighMem), which is not
directly accessible by the kernel after MMU setup, causing a silent
crash.
With bootm_size=0x10000000, initrd_high is constrained to
0x80000000 + 0x10000000 = 0x90000000, keeping the ramdisk in the
DMA zone and allowing the kernel to access it correctly.
Fixes: babae80169dd ("include: env: ti_common: remove bootm_size") Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Signed-off-by: Moteen Shah <m-shah@ti.com>
Francois Berder [Thu, 21 May 2026 13:05:44 +0000 (15:05 +0200)]
arm64: versal2: Fix buffer overflow in soc_name_decode
The size of name buffer was not computed correctly.
The suffix format is "--rel.-el" (9 chars instead of 6),
and the longest platform name is "emu-mmd" (7 chars instead of 4).
Fix comment and name size.
Pranav Tilak [Thu, 7 May 2026 11:33:59 +0000 (17:03 +0530)]
fpga: versalpl: Fix unaligned buffer handling
When fpga load is called with a misaligned buffer address, the
versal_align_dma_buffer() function shifts the pointer forward to the
next aligned boundary and uses memcpy() to copy the data. Since the
destination is ahead of the source and the regions overlap, memcpy()
produces undefined behavior; in practice U-Boot's generic memcpy()
copies forward, repeating the first ARCH_DMA_MINALIGN-aligned chunk
throughout the buffer.
Replace memcpy() with memmove() which correctly handles overlapping
regions by copying backwards when the destination is ahead of the
source.
Tom Rini [Fri, 22 May 2026 19:30:42 +0000 (13:30 -0600)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
This is Renesas R-Car X5H support for U-Boot on its RSIP Cortex-M33 core
in addition to already support U-Boot on Cortex-A720AE core. The first
two patches also switch X5H to OF_UPSTREAM.
Marek Vasut [Tue, 19 May 2026 14:28:15 +0000 (16:28 +0200)]
arm: renesas: Add Renesas R-Car R8A78000 X5H Cortex-M33 RSIP port
Add support for building U-Boot for Cortex-M33 RSIP core in Renesas
R-Car Gen5 R8A78000 X5H SoC. The main goal is to start U-Boot on the
Cortex-M33 RSIP core, which initializes the hardware and then starts
the Cortex-M33 SCP and Cortex-A720 cores which run the SCP firmware
and applications software respectively. The SCP is responsible for
platform resource management, and is used to start other CPU cores.
The Cortex-M33 build contains its own r8a78000_ironhide_cm33_defconfig
which configures the build for aarch32 instruction set compatible with
the ARMv8M core. The build also uses -cm33 DT and -u-boot.dtsi which
are derived from their non-CM33 counterparts, and add CM33 specifics.
The arch/arm/mach-renesas/u-boot-rsip.lds is derived from generic
arch/arm/cpu/u-boot.lds with adjustments to cater to the RSIP core,
those are entrypoint before vectors, __data_start/__data_end symbols
for data-only relocation, and placement of BSS into read-write SRAM
area.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 7 May 2026 23:25:35 +0000 (01:25 +0200)]
arm: renesas: Generate u-boot-elf.scif for R-Car Gen5 RSIP
Add target to generate u-boot-elf.scif for R-Car Gen5 Cortex-M33
RSIP core. The resulting .scif SREC file can be loaded using the
SCIF loader to start U-Boot on the RSIP core.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The current DT reset ID encoding in R-Car Gen5 R8A78000 X5H U-Boot DTs
is inherited from downstream BSP. New reset bindings for this SoC are
now submitted and under review [1]. Replace the DT reset IDs with the
ones used in the new bindings.
Marek Vasut [Thu, 7 May 2026 23:23:32 +0000 (01:23 +0200)]
arm64: dts: renesas: Switch to remap drivers on R-Car Gen5 R8A78000 X5H
Point every direct user of SCMI clock protocol at CPG node instead
of SCMI clock protocol node. Point every direct user of SCMI reset
and power domain protocol at a matching newly introduced MDLC node
instead of the SCMI reset and power domain protocol nodes.
This allows the CPG and MDLC remap drivers bound to CPG node and MDLC
nodes to remap between DT clock, reset and power domain IDs and SCMI
clock, reset and power domain IDs. This makes U-Boot on R-Car X5H
compatible with multiple SCP firmware versions. Currently supported
versions of SCP firmware are 4.28, 4.31 and 4.32.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 7 May 2026 23:23:31 +0000 (01:23 +0200)]
arm64: renesas: Select R-Car Gen5 R8A78000 X5H MDLC power domain and reset driver
Select the R8A78000 power domain and reset driver on R-Car Gen5 X5H
SoC by default. The power domain and reset driver is used to remap
DT power domain and reset IDs to SCMI power domain and reset IDs,
which is necessary to support multiple SCP firmware versions with
varying SCMI clock IDs across versions.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 7 May 2026 23:23:30 +0000 (01:23 +0200)]
power: domain: Add Renesas R-Car R8A78000 X5H MDLC power domain and reset driver
Add Renesas R-Car R8A78000 X5H MDLC power domain and reset driver,
which serves as a remap driver between DT power domain and reset IDs
and SCMI power domain and reset IDs in case U-Boot runs on Cortex-A,
and as a direct hardware access driver for RSIP.
The R-Car X5H SCP firmware uses different SCMI power domain and
reset IDs in different versions of the SCP firmware, which makes
this remapping necessary. The SCMI base protocol version is updated
for each new SCP firmware version, it is therefore possible to
determine which SCP firmware version is running on the platform
from the base protocol and then determine which remapping table to
use for DT power domain and reset ID to SCMI power domain and reset
ID remapping.
Currently supported versions are SCP 4.28, 4.31, 4.32 .
The DT power domain and reset ID to SCMI power domain and reset ID
remap and call mechanism is simple. Unlike SCMI clock protocol driver,
the SCMI reset and power domain protocol drivers register only a single
device. This driver looks up that single device, obtains its reset or
power domain ops, sets up struct reset_ctl or struct power_domain with
remapped SCMI ID, and invokes operations directly on the device.
In case of RSIP, all power domains are already enabled by BootROM or
early SoC initialization code, the driver therefore only acts as a
stub for the power domain part. The reset part operates as a direct
hardware access reset driver.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Select the R8A78000 clock driver on R-Car Gen5 X5H SoC by default.
The clock driver is used to remap DT clock IDs to SCMI clock IDs,
which is necessary to support multiple SCP firmware versions with
varying SCMI clock IDs across versions.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Add Renesas R-Car R8A78000 X5H CPG clock driver, which serves as a
remap driver between DT clock IDs and SCMI clock IDs in case U-Boot
runs on the Cortex-A, and as a trivial clock driver for RSIP.
The R-Car X5H SCP firmware uses different SCMI clock IDs in different
versions of the SCP firmware, which makes this remapping necessary.
The SCMI base protocol version is updated for each new SCP firmware
version, it is therefore possible to determine which SCP firmware
version is running on the platform from the base protocol and then
determine which remapping table to use for DT clock ID to SCMI clock
ID remapping.
Currently supported versions are SCP 4.28, 4.31, 4.32 .
The DT clock ID to SCMI clock ID remap and call mechanism is a bit
complex. The driver looks up the SCMI clock protocol device on probe
and stores pointer to it in private data. On each clock request which
has to be remapped, the device sequence ID of this SCMI clock protocol
device is incremented by the remapped SCMI clock ID + 1 and used to
look up matching clock device by sequence number. If the device is
found, it is converted to clock, which can be used in regular clock
operations. This look up has to be done because the SCMI clock driver
registers a subdevice for each clock, and this look up is the only way
to find the correct SCMI clock subdevice. Since the SCMI device and
the clock subdevices are registered in the same function, we can depend
on the device sequence numbers to be monotonically incrementing, with
SCMI clock protocol device being sequence number N, the first SCMI
clock subdevice being sequence number N+1 and so on.
In case of RSIP, all clocks are already enabled by BootROM or early
SoC initialization code, the driver therefore only acts as a stub.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 7 May 2026 22:56:29 +0000 (00:56 +0200)]
arm64: renesas: Select HSCIF for DEBUG UART on R-Car Gen5 R8A78000 X5H
The R-Car Gen5 R8A78000 X5H uses HSCIF as default serial console
interface. Select CFG_HSCIF to make debug UART code also configure
serial console interface as HSCIF instead of SCIF in case the
CONFIG_DEBUG_UART would be enabled.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 7 May 2026 17:37:48 +0000 (19:37 +0200)]
arm64: dts: renesas: Switch to upstream DT on Renesas R-Car X5H R8A78000
Enable OF_UPSTREAM to use upstream Linux kernel DT source as a base
for U-Boot control DT. Retain currently present parts of the DT which
are not yet part of upstream Linux kernel DT in -u-boot.dtsi files
until they get replaced by upstream equivalents. Add renesas/ prefix
to the DEFAULT_DEVICE_TREE as part of the switch.
Unused i2c2..i2c8 nodes have been removed, and will become available
once upstream Linux kernel DT adds those nodes.
The DRAM_RSV_SIZE has been updated to cover first 518 MiB of DRAM,
which are reserved for firmware and other use.
Note that all DT parts in -u-boot.dtsi are not considered stable DT
bindings and may change before they land in Linux kernel and become
stable DT ABI.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Tom Rini [Thu, 21 May 2026 14:16:56 +0000 (08:16 -0600)]
Merge tag 'u-boot-nvme-fixes-20260521' of https://source.denx.de/u-boot/custodians/u-boot-ufs
- Add myself as Maintainer of NVMe
- fix command ID wraparound handling
- apple: Check memalign return value
- Staticize and constify driver ops
- Fix PRP list pointer arithmetic for chained transfers
Zixun LI [Fri, 15 May 2026 10:05:41 +0000 (12:05 +0200)]
usb: gadget: atmel: do not disable endpoints in reset_all_endpoints()
Endpoints should not be disabled on bus reset inside UDC driver,
otherwise a race condition will happen between gadget driver. Gadget
driver will free the requests and disable endpoints in disconnect ops.
Also remove outdated comment about it in usba_ep_disable().
Signed-off-by: Zixun LI <admin@hifiphile.com> Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org> Fixes: 59310d1ecb9f ("usb: gadget: introduce 'enabled' flag in struct usb_ep") Link: https://patch.msgid.link/20260515-udc_ep-v2-1-cd335b4e62e4@hifiphile.com
[mkorpershoek: removed empty newline between Fixes: and sob] Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Prashant Kamble [Mon, 18 May 2026 02:25:35 +0000 (07:55 +0530)]
nvme: Fix PRP list pointer arithmetic for chained transfers
The PRP setup code advances prp_pool using u64 pointer
arithmetic:
prp_pool += page_size;
This increments the pointer by page_size * sizeof(u64)
bytes instead of page_size bytes, resulting in invalid
PRP list addresses when multiple PRP list pages are
required.
The issue becomes visible for large transfers, typically
above 2 MiB when MDTS > 9.
Fix it by using byte-wise pointer arithmetic when
advancing to the next PRP list page.
Prashant Kamble [Mon, 18 May 2026 06:08:44 +0000 (11:38 +0530)]
nvme: fix command ID wraparound handling
nvme_get_cmd_id() returns 0 after cmdid reaches USHRT_MAX,
but fails to reset cmdid itself. As a result, all subsequent
calls keep returning 0 indefinitely.
Reset cmdid when wraparound occurs so command IDs continue
incrementing correctly.
* For reset command describe when the -edl option is available and fix a
typo.
UEFI:
* If efi_allocate_pages() is with EFI_ALLOCATE_ADDRESS fails, return
EFI_NOT_FOUND.
* Fix HII keyboard layout pointer computation and extend HII keyboard
layout tests.
Others:
* In reset command online help show -edl option only when enabled.
Vincent Stehlé [Tue, 12 May 2026 17:40:34 +0000 (19:40 +0200)]
efi_selftest: test hii keyboard layouts more
The HII database test for keyboard layouts register two package lists with
two keyboard layouts each, but the test verifies only the GUID of the first
keyboard layout.
This does not catch the bugs happening with the keyboard layouts after the
first one in a package.
Verify all the keyboard layout GUIDs in the unit test to prevent this.
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com> Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org> Cc: Tom Rini <trini@konsulko.com>
Vincent Stehlé [Tue, 12 May 2026 17:40:33 +0000 (19:40 +0200)]
efi_loader: fix hii keyboard layout pointer computation
The EFI_HII_KEYBOARD_LAYOUT field `layout_length' is expressed in bytes,
but we add it to the `layout' pointer with (scaled) pointer arithmetic.
When adding an HII keyboard package with multiple keyboard layouts, this
results in only the first layout being added correctly; fix it.
Fixes: 8d3b77e36e10 ("efi: hii: add keyboard layout package support") Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com> Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org> Cc: Tom Rini <trini@konsulko.com> Cc: AKASHI Takahiro <akashi.tkhro@gmail.com>
Quentin Schulz [Thu, 7 May 2026 15:04:07 +0000 (17:04 +0200)]
doc: usage: cmd: reset: specify when the -edl option is available
The option is only available when CONFIG_SYSRESET_QCOM_PSCI is enabled,
so let's make that explicit in the boot cmd documentation.
Due to the implementation in drivers/sysreset/sysreset-uclass.c
do_reset() function, all options to the reset command are passed to all
sysreset drivers' sysreset_ops.request_arg callback (including -w) which
is only available when CONFIG_SYSRESET_CMD_RESET_ARGS=y. -w, however,
works also without this option.
Fixes: ef06c5d76ff4 ("cmd: boot: Add '-edl' option to reset command documentation") Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Quentin Schulz [Thu, 7 May 2026 15:04:06 +0000 (17:04 +0200)]
doc: usage: cmd: reset: fix typo
"Do warm WARM" doesn't mean anything, I'm assuming the intent was to say
"Do WARM reset" so reword.
Fixes: 34e452dd0252 ("doc: usage: Group all shell command docs into cmd/ sub-directory") Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Quentin Schulz [Thu, 7 May 2026 15:04:05 +0000 (17:04 +0200)]
cmd: boot: fix edl being shown when not supported
edl is implemented in the sysreset_ops.request_arg callback of the
qcom-psci sysreset driver. That callback is only called from
sysreset_request_arg() which is compiled only when
CONFIG_SYSRESET_CMD_RESET_ARGS=y.
Therefore, only show the edl option if that symbol is enabled.
It is in a separate if block because any option but -w will only be
handled when CONFIG_SYSRESET_CMD_RESET_ARGS=y as seen with the
implementation in do_reset() in drivers/sysreset/sysreset-uclass.c.
Fixes: ef06c5d76ff4 ("cmd: boot: Add '-edl' option to reset command documentation") Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Return EFI_NOT_FOUND for EFI_ALLOCATE_ADDRESS overlap
When efi_allocate_pages() is called with EFI_ALLOCATE_ADDRESS, UEFI
expects EFI_NOT_FOUND if the requested address range is already
allocated or unavailable. U-Boot currently returns
EFI_OUT_OF_RESOURCES when efi_update_memory_map() detects an overlap
after a successful lmb_alloc_mem(), which does not match
EFI_ALLOCATE_ADDRESS semantics.
Return EFI_NOT_FOUND for EFI_ALLOCATE_ADDRESS requests that fail due
to an overlapping EFI memory descriptor, while keeping
EFI_OUT_OF_RESOURCES for other allocation types.
The UEFI specification [1] specifies that
EFI_BOOT_SERVICES.AllocatePages must return EFI_NOT_FOUND when the
requested address range is unavailable or already allocated;
EFI_OUT_OF_RESOURCES applies to non‑address‑specific allocation
failures.
Signed-off-by: Harsimran Singh Tungal <harsimransingh.tungal@arm.com>
The UEFI specification does not clearly specify the behavior.
But let's follow the EDK II precedent here.
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Mark Kettenis [Sat, 9 May 2026 20:31:36 +0000 (22:31 +0200)]
smbios: Do not fall back on devicetree without valid mapping
The smbios_get_val_si() function may get called for a sysinfo
property for which there is no mapping to a devicetree property.
Avoid a NULL pointer dereference in this case by skipping the
read of the mapped property from the device tree.
Fixes: 83b28b55d74f ("smbios: add support for dynamic generation of Type 9 system slot tables") Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Raymond Mao <raymondmaoca@gmail.com>
Vincent Jardin [Sun, 10 May 2026 22:07:30 +0000 (00:07 +0200)]
board: nxp: common: support CONFIG_FSL_USE_PCA9547_MUX
Use select_i2c_ch_pca9547() only when CONFIG_FSL_USE_PCA9547_MUX
is set, but several call in board/nxp/lx2160a/lx2160a.c invoke
it unconditionally,
or using unrelated Kconfigs (CONFIG_EMC2305, CONFIG_VID).
Compilation with LX2160A target that omits the mux therefore fails with
error: implicit declaration of function 'select_i2c_ch_pca9547'
Add a static inline stub with -EOPNOTSUPP for the
!CONFIG_FSL_USE_PCA9547_MUX case so all cases compile cleanly.
Adapted from the convention used by include/scmi_nxp_protocols.h for
SCMI subprotocol stubs.
There is no functional change for NXP boards: all eight upstream
LX2160A defconfigs (lx2160ardb / lx2160aqds / lx2162aqds and their
secure / stmm / verified_boot variants) already set
CONFIG_FSL_USE_PCA9547_MUX=y, so the real declaration wins.
The purpose is to support new boards that do not use the PCA9547.
Signed-off-by: Vincent Jardin <vjardin@free.fr> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Vincent Jardin [Mon, 11 May 2026 07:37:34 +0000 (09:37 +0200)]
board: nxp: lx2160a: without QIXIS, MC-ENET, PCI, LTC3882
The shared LX2160A board file calls helpers that only exist when
their subsystem is enabled. Gate them on the matching CONFIG_*:
- pci_init() under CONFIG_PCI.
- fdt_fixup_mc_ddr() and fsl_rgmii_init() under CONFIG_FSL_MC_ENET.
- qixis_*() and the QIXIS branch of checkboard() under
CONFIG_FSL_QIXIS; cpu_name(buf) moves out so the non-QIXIS path
still prints "Board: <name>".
- EVENT_SPY_SIMPLE on init_func_vid moves inside the
CONFIG_VOL_MONITOR_LTC3882_READ guard (was outside, dangling
symbol when LTC3882 off).
#if / #ifdef, not IS_ENABLED(), because the helpers are themselves
conditionally compiled.
While here, lx2160a_common.h: fix BOOT_TARGET_DEVICES_MMC
1 arg vs 2 args and gate the MMC target on CONFIG_CMD_MMC,
not CONFIG_MMC.
No functional change for NXP boards: LX2160ARDB, LX2160AQDS, or
LX2162AQDS, but mainly build clean up in order to support
other NXP lx2160a boards without those HW dependencies.
Signed-off-by: Vincent Jardin <vjardin@free.fr> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Francois Berder [Sat, 9 May 2026 19:24:17 +0000 (21:24 +0200)]
board: ten64: Fix OOB read in ft_board_setup
base and size arrays can both contain up to total_memory_banks
elements.
This commit fixes the for loop condition to ensure that it does
not attempt to read past the end of both arrays.
Signed-off-by: Francois Berder <fberder@outlook.fr> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Francois Berder [Sat, 9 May 2026 19:20:18 +0000 (21:20 +0200)]
board: nxp: Fix OOB read in ft_board_setup
base and size arrays can both contain up to total_memory_banks
elements.
This commit fixes the for loop condition to ensure that it does
not attempt to read past the end of both arrays.
Signed-off-by: Francois Berder <fberder@outlook.fr> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Fri, 15 May 2026 04:26:19 +0000 (12:26 +0800)]
p2041rdb: remove NAND defconfig
The RDB doesn't support NAND boot at all, remove the config for it.
Apparently, it was introduced by commit dd84058d24ff ("kconfig: add
board Kconfig and defconfig files") which ran some scripts. Maybe that
script was wrong or the source boards.cfg was wrong. In any case, there
is no NAND flash on the RDB.
Signed-off-by: Michael Walle <mwalle@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Michael Walle [Wed, 6 May 2026 12:34:14 +0000 (14:34 +0200)]
boards/nxp: remove board_eth_init()
board_eth_init() is dead code since commit e524f3a449f5 ("net: Remove
eth_legacy.c"). Remove it.
I'm not sure, all the shenanigans are covered by the new DM-version. The
MDIO mux and iomux controls probably are. The fman configuration
probably isn't. OTOH, nobody cared for years and the called
fm_info_set_phy_address() was also removed years ago.
This also removes fdt_fixup_board_enet() for the ls1043a and ls1046a
because it relies on the local variable "mdio_mux" being initialized by
the board_eth_init().
Signed-off-by: Michael Walle <mwalle@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Michael Walle [Wed, 6 May 2026 12:34:12 +0000 (14:34 +0200)]
spi: fsl_espi: fix read transactions
Since commit 7917c2e35604 ("spi: fsl_espi: fix din offset") MTD is
basically broken because any read transaction will get wrong data. While
the commit in question will fix simple transfers (where both
SPI_XFER_BEGIN and SPI_XFER_END is set), it will break the most common
case, where opcode and address is send first and then data comes as a
second transfer.
This basically reverts commit 7917c2e35604 ("spi: fsl_espi: fix din
offset") and make the fix particular for this simple case. Instead of
providing two buffers for reading and writing, just malloc one which is
used for both. This will work because the data is first written on the
SPI bus and then it will be read (and overwite the written data) into
the same buffer.
Suggested-by: Tomas Alvarez Vanoli <tomas.alvarez-vanoli@hitachienergy.com> Fixes: 7917c2e35604 ("spi: fsl_espi: fix din offset") Signed-off-by: Michael Walle <mwalle@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Michael Walle [Wed, 6 May 2026 12:34:11 +0000 (14:34 +0200)]
caam: don't write memory at 0 on PPC
For non-secure boot environments pamu_init() isn't called but the CAAM
will still call sec_config_pamu_table() -> config_pamu() which then uses
an uninitialized ppaact variable. In fact, that variable is initialized
with 0, so the config_pamu() will happily assume the structure is there
and will operate on that memory. Call pamu_init() in the non-secure boot
case, too.
Signed-off-by: Michael Walle <mwalle@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Michael Walle [Wed, 6 May 2026 12:34:10 +0000 (14:34 +0200)]
powerpc: fix call to cpu_init_r
Commit 6c171f7a184c ("common: board: make initcalls static") broke the
call to cpu_init_r. That is because PPC is already defined to 1, see:
powerpc-linux-gnu-gcc -dM -E - < /dev/null
This will conflict with the CONFIG_IS_ENABLED(PPC). Change it to
IS_ENABLED(CONFIG_PPC).
Fixes: 6c171f7a184c ("common: board: make initcalls static") Signed-off-by: Michael Walle <mwalle@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com>
The combined boot firmware firmware-aquila-am69-gp.bin depends on
tiboot3-am69-gp-aquila.bin, which in turn requires the GP variant
of the TI system firmware blob (ti-fs-firmware-j784s4-gp.bin).
Fix the combined boot firmware image build by adding the missing binman
nodes.
The virtio_blk_do_single_req function returns ulong, which normally is
the processed size, but in an error case can be the actual error. Use
the special IS_ERR_VALUE macro to test for error.
Addresses-Coverity-ID: CID 645833 (DEADCODE) & CID 645834 (NO_EFFECT) Signed-off-by: Christian Pötzsch <christian.poetzsch@kernkonzept.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Janne Grunau [Thu, 7 May 2026 08:41:40 +0000 (10:41 +0200)]
arm: apple: Add Apple M3 (t8122) support
Apple's M3 SoC is similar to M1 and M2 but uses a different memory map.
The main difference is that RAM starts at 0x100_0000_0000 like on t600x
and t602x (M1 and M2 Pro/Max/Ultra). Otherwise IO blocks have been
rearranged.
U-boot's existing drivers are compatible with the hardware and M3 device
trees will carry "apple,t8103-*" compatible strings. Only
apple-atcphy-reset might need a new compatible due to USB4 / DisplayPort
changes the Linux driver has to deal with.
Signed-off-by: Janne Grunau <j@jannau.net> Acked-by: Mark Kettenis <kettenis@openbsd.org>
Tom Rini [Tue, 12 May 2026 18:11:17 +0000 (12:11 -0600)]
Merge patch series "Switch Apple silicon boards to upstream device trees"
Janne Grunau <j@jannau.net> says:
The Linux device trees for Apple silicon devices cover now most of the
hardware as u-boot's internal device trees for M1 devices. Linux has in
addition device trees M2 and M1 and M2 Pro/Max/Ultra devices which were
never added in u-boot.
The most common use case for u-boot on Apple silicon devices does not
use DTBs from u-boot but passes runtime modified device trees from an
earlier boot loader (m1n1).
This change regresses support for the SPI on M1 and M1 Pro/Max notebooks
as SPI keyboard support is not in upstream Linux. This regression is in
my opinion acceptable due to the limited use of u-boot's DTBs for these
targets.
Janne Grunau [Thu, 7 May 2026 08:05:51 +0000 (10:05 +0200)]
arm: dts: Switch Apple silicon devices to dts/upstream
The device tree on Apple silicon devices is passed from a previous
bootloader stage. The bootloader fills in dynamic information so
u-boot can not use its own device tree.
As documented in doc/board/apple/m1.rst it is possible to build boot
bundles (bootloader + device tree + gzipped u-boot binary). These are
useful for testing.
Instead of using u-boot's own device trees for M1 (t8103) devices use
upstream device trees from dts/upstream/src/arm64/apple. The u-boot
device trees have not seen updates since 2022. The upstream linux device
trees have feature parity for the M1 devices. In addition linux has
device trees for M1 Pro/Max/Ultra, M2 and M2 Pro/Max/Ultra devices.
Keep t8103-j274 as default device tree to avoid further updates.
Signed-off-by: Janne Grunau <j@jannau.net> Acked-by: Mark Kettenis <kettenis@openbsd.org>
Janne Grunau [Thu, 7 May 2026 08:05:49 +0000 (10:05 +0200)]
doc: board: apple: Mention M2 and M2 Pro/Max/Ultra SoCs
These SoCs are supported since 2022/2023 but were never added to the
documentation. The devices very similar to the equivalent M1 devices.
The biggest difference is that the M2 and M2 Pro/Max based laptops no
longer use SPI for the keyboard.
Signed-off-by: Janne Grunau <j@jannau.net> Acked-by: Mark Kettenis <kettenis@openbsd.org>
Janne Grunau [Thu, 30 Apr 2026 22:31:16 +0000 (00:31 +0200)]
arm: apple: Switch to board based text env
The main use case for u-boot on Apple silicon based devices is to
provide an EFI based bootloader for operating systems. This uses a
generic u-boot image with DTBs passed from an earlier boot loader
(m1n1). Use the generic board name "mac" for this purpose.
Janne Grunau [Thu, 30 Apr 2026 21:34:43 +0000 (23:34 +0200)]
watchdog: apple: Add "apple,t8103-wdt" compatible
After discussion with the devicetree maintainers we agreed to not extend
lists with the generic compatible "apple,wdt" anymore [1]. Use
"apple,t8103-wdt" as base compatible as it is the SoC driver and
bindings were originally written for.
The t602x (M2 Pro/Max/Ultra) devicetrees submitted in [2] use this
compatible as fallback instead of "apple,wdt".
Janne Grunau [Thu, 30 Apr 2026 21:33:25 +0000 (23:33 +0200)]
spi: apple: Add "apple,t8103-spi" compatible
After discussion with the devicetree maintainers we agreed to not extend
lists with the generic compatible "apple,spi" anymore [1]. Use
"apple,t8103-spi" as base compatible as it is the SoC driver and
bindings were originally written for.
The t602x (M2 Pro/Max/Ultra) devicetrees submitted in [2] use this
compatible as fallback instead of "apple,spi".
After discussion with the devicetree maintainers we agreed to not extend
lists with the generic compatible "apple,pmgr-pwrstate" anymore [1]. Use
"apple,t8103-pmgr-pwrstate" as base compatible as it is the SoC driver
and bindings were originally written for.
The t602x (M2 Pro/Max/Ultra) devicetrees submitted in [2] use this
compatible as fallback instead of "apple,pmgr-pwrstate".
After discussion with the devicetree maintainers we agreed to not extend
lists with the generic compatible "apple,pinctrl" anymore [1]. Use
"apple,t8103-pinctrl" as fallback compatible as it is the SoC driver and
bindings were originally written for.
The t602x (M2 Pro/Max/Ultra) devicetrees submitted in [2] use this
compatible as fallback instead of "apple,t8103-pinctrl".
After discussion with the devicetree maintainers we agreed to not extend
lists with the generic compatible "apple,nvme-ans2" anymore [1]. Add
"apple,t8103-nvme-ans2" as fallback compatible as this is the SoC the
driver and bindings were originally written for.
The t602x (M2 Pro/Max/Ultra) devicetrees submitted in [2] use this
compatible as fallback instead of "apple,t8103-nvme-ans2".
Add nodes to the binman configuration to create single binaries that
combine tiboot3-am69-*-aquila.bin, tispl.bin and u-boot.img into
firmware-aquila-am69-*.bin, with the proper offsets.
These binaries can be used to flash U-Boot via a single binary of three,
as it is done now.
Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com> Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Tze Yee Ng [Tue, 5 May 2026 02:36:03 +0000 (19:36 -0700)]
mmc: sdhci-cadence: trigger tuning for SD HS mode on SD6HC (v6) PHY
The Cadence SD6HC (SDHCI spec v4.20+) controller uses a soft PHY whose
DLL delay characteristics vary with PVT (Process, Voltage, Temperature)
and board-level trace routing.
A static delay value programmed via device tree for SD High Speed mode is
insufficient because the optimal sampling point varies per board, SD card,
and operating conditions. Runtime calibration is required.
While the SD Physical Layer Specification does not mandate tuning for
SD HS mode (only for UHS-I SDR50/SDR104), the Cadence SD6HC PHY
requires runtime calibration of its receive data delay line to find a
valid sampling window under constrained clock conditions.
The tuning is triggered from the set_ios_post callback because at that
moment hardware has committed the new bus width, clock frequency, and speed
mode to the controller registers. This ensuring the tuning sequence runs
at the correct SD HS operating conditions.
The tuning is gated by a device tree property "cdns,sd-hs-tuning" so
that only boards requiring runtime calibration opt in. When enabled,
the driver performs a 40-tap DLL sweep using CMD19 to find the largest
consecutive passing window, then programs the midpoint into
PHY_DLL_SLAVE_CTRL_REG.
To enable on a board, add to the MMC node in device tree:
The following compilation error occurs when environment variable
KBUILD_OUTPUT is not set :
drivers/reset/stm32/stm32-reset-mp21.c:8:10: fatal error: stm32-reset-core.h: No such file or directory
8 | #include <stm32-reset-core.h>
| ^~~~~~~~~~~~~~~~~~~~
As stm32-reset-core.h is located in same directory than stm32-reset-mp21.c,
we should use #include "stm32-reset-core.h".
projects / thirdparty / u-boot.git / log
