realtek: mdio: provide individual bus probing function
rtmdio_probe() is a do-it-all setup function. It creates one
control structure and one bus. In the future multiple busses
will be created. As a preparation carve out the bus specific
part into an individual probing function.
Until now the central control structure is allocated via a call to
devm_mdiobus_alloc_size(). This will not be possible any longer when
multiple busses will be implemented in a future commit.
Relax that as follows:
- Define a new private "channel" structure for a mdio bus
- Allocate the central control structure with a dedicated alloc()
- Allocate only the channel structure during bus setup
- Link the channel to the central structure via chan->ctrl
Reorganize the probing function so that it becomes clearer that
the control structure is setup first and afterwards the bus is
registered.
Add a new helper macro rtmdio_ctrl_from_bus that encapuslates
the current ctrl=bus->priv lookup. This is a preparation for
the future multi-channel driver architecture. With an upcoming
commit the structures will be changed as follows:
- ctrl: contains the generic data structurs
- chan: contains the channel specific structure
This will involve changing the pointers between them
old lookup chain: ctrl = bus->ctrl
new lookup chain: ctrl = bus->chan->ctrl
The helper macro allows to easily switch the lookup in one
central location. While we are here fix a whitespace issue.
realtek: mdio: setup topology from control structure
The topology setup is bus independent and can be derived completely
from the control structure. Adapt the call parameters accordingly.
The call location is quite confusing at the moment. Being no longer
dependent from the bus call it where it makes most sense. This is
directly after the mapping setup in rtmdio_map_ports(). Doing other
bus dependent setup between these two functions is not needed
any longer.
The port specific attributes of the central control structure
have been moved over to a separate port structure. Do the same
for the (up to 4) busses. Establish a separate bus structure
that will hold data about each bus and use it in the control
structure. As a first usage type move the is_c45 attribute over.
realtek: mdio: move phy_node attribute into port structure
The phy_node attribute is defined per port. Move it into the new
port structure. Now it is clear that it belongs to the port.
While we are here rename it to dn (aka device_node) to align with
upstream style. As all usage locations must be adapted it makes
no sense to make two commits (relocate/rename) to change the
code twice.
realtek: mdio: move smi_addr attribute into port structure
The smi_addr attribute is defined per port. Move it into the new
port structure. As the devices have a maximum of 56 addresses
save some space and convert it to type u8.
While we are here harden the mapping routine that reads these
addresses from the DTS. For this check the value that is read into
smi_addr. This is usually the MDIO standard 0..31. Sadly RTL839x
devices are an exception from that and allow addresses 0..51.
To avoid device specific if/then/else cases for now implement
a "light" consistency check.
realtek: mdio: move smi_bus attribute into port structure
The smi_bus attribute is defined per port. Move it into the new
port structure. As the devices have a maximum of 4 busses save
some space and convert it to type u8.
While we are here fix a whitespace issue and rename the helper
variable in rtmdio_map_ports() to smi_bus to align with the
structure attribute.
The central control structure of the mdio bus holds several
attributes. These target two different objects. Some of them
are for the (up to 56) controller ports, some of them are for
the (up to 4) controller busses.
Establish a separate port structure that will hold data about
each port and use it in the control structure. As a first
usage type move the page attribute over.
Daniel Golle [Thu, 26 Mar 2026 04:00:28 +0000 (04:00 +0000)]
kernel: add DSA driver for MaxLinear MxL862xx switches
Backport upstream driver and apply pending downstream patches to
support using the MaxLinear MxL86252 and MxL86282 switches.
The driver supports a native proprietary 8-byte DSA special tag format
(mxl862xx) as well as using an 802.1Q-based DSA tag (mxl862xx-8021q).
All basic bridge, VLAN and LAG operations are supported. A single port
can be used as mirror port. Hardware counters are made available as
ethtool stats or directly serve as interface counters (bytes,
packets).
The switch runs a complex ZephyrOS-based firmware on an integrated
ARC microcontroller, the driver uses the firmware management API over
MDIO to interact with the switch hardware.
Note that the firmware needs to be rather recent (WSP 1.0.78 or later)
to work well with this driver. It can be updated at runtime using devlink.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
John Crispin [Thu, 5 Mar 2026 11:57:29 +0000 (12:57 +0100)]
qualcommax: ipq807x: add CMN PLL clock controller support
Add IPQ8074 support to the upstream CMN PLL driver. The CMN PLL block
is identical to IPQ6018 with the same output clocks (bias_pll_cc_clk
at 300 MHz and bias_pll_nss_noc_clk at 416.5 MHz).
John Crispin [Thu, 5 Mar 2026 11:57:22 +0000 (12:57 +0100)]
qualcommax: ipq60xx: add CMN PLL clock controller support
Add IPQ6018 support to the upstream CMN PLL driver. The CMN PLL at
0x9b000 generates the 12 GHz base clock feeding the networking
subsystem. Its output clocks (bias_pll_cc_clk at 300 MHz and
bias_pll_nss_noc_clk at 416.5 MHz) replace the previous fixed-clock
stubs and are found by GCC via global clock name lookup.
John Crispin [Thu, 5 Mar 2026 13:24:30 +0000 (14:24 +0100)]
qualcommax: ipq60xx: mark gcc_xo_clk_src as CLK_IS_CRITICAL
The XO clock source is always-on in hardware and cannot be gated.
Without CLK_IS_CRITICAL, the CMN PLL runtime PM suspend cascades a
disable up to gcc_xo_clk_src, causing a branch status timeout warning.
The IPQ8074 GCC driver already marks this clock as critical.
Dmitry Mostovoy [Mon, 9 Feb 2026 16:43:41 +0000 (11:43 -0500)]
mediatek: add cudy wr3000h-v1 ubootmod
This allows us to use the full size of nand,
which extends ubi size from 64Mb to 122.25Mb.
1. Log in to the device and backup all the partitions,
especially unique "Factory" and "bdata" partitions
from System -> Backup / Flash Firmware -> Save mtdblock contents.
2. Install kmod-mtd-rw to unlock mtd partitions for writing
apk update && apk add kmod-mtd-rw && insmod mtd-rw i_want_a_brick=1
3. Write new OpenWrt (U-Boot Layout) "BL2" and "FIP":
mtd -e BL2 write openwrt-mediatek-filogic-cudy_wr3000h-v1-ubootmod-preloader.bin BL2
mtd -e FIP write openwrt-mediatek-filogic-cudy_wr3000h-v1-ubootmod-bl31-uboot.fip FIP
4. Set static IP on your PC: "192.168.1.254", gateway "192.168.1.1"
5. Serve openwrt-mediatek-filogic-cudy_wr3000h-v1-ubootmod-initramfs-recovery.itb
using TFTP server.
6. Connect Router LAN with PC LAN.
7. Cut off the power and re-engage, wait for TFTP recovery to complete.
8. After OpenWrt initramfs recovery has booted,
clean "/dev/mtd5" ubi partition to utilize maximum of free space:
ubidetach -p /dev/mtd5; ubiformat /dev/mtd5 -y; ubiattach -p /dev/mtd5
ubimkvol /dev/ubi0 -n 0 -N ubootenv -s 128KiB
ubimkvol /dev/ubi0 -n 1 -N ubootenv2 -s 128KiB
9. Perform sysupgrade.
Dmitry Mostovoy [Mon, 9 Feb 2026 09:52:38 +0000 (04:52 -0500)]
mediatek: add cudy wr3000e-v1 ubootmod
This allows us to use the full size of nand,
which extends ubi size from 64Mb to 122.25Mb.
1. Log in to the device and backup all the partitions,
especially unique "Factory" and "bdata" partitions
from System -> Backup / Flash Firmware -> Save mtdblock contents.
2. Install kmod-mtd-rw to unlock mtd partitions for writing
apk update && apk add kmod-mtd-rw && insmod mtd-rw i_want_a_brick=1
3. Write new OpenWrt (U-Boot Layout) "BL2" and "FIP":
mtd -e BL2 write openwrt-mediatek-filogic-cudy_wr3000e-v1-ubootmod-preloader.bin BL2
mtd -e FIP write openwrt-mediatek-filogic-cudy_wr3000e-v1-ubootmod-bl31-uboot.fip FIP
4. Set static IP on your PC: "192.168.1.254", gateway "192.168.1.1"
5. Serve openwrt-mediatek-filogic-cudy_wr3000e-v1-ubootmod-initramfs-recovery.itb
using TFTP server.
6. Connect Router LAN with PC LAN.
7. Cut off the power and re-engage, wait for TFTP recovery to complete.
8. After OpenWrt initramfs recovery has booted,
clean "/dev/mtd5" ubi partition to utilize maximum of free space:
ubidetach -p /dev/mtd5; ubiformat /dev/mtd5 -y; ubiattach -p /dev/mtd5
ubimkvol /dev/ubi0 -n 0 -N ubootenv -s 128KiB
ubimkvol /dev/ubi0 -n 1 -N ubootenv2 -s 128KiB
9. Perform sysupgrade.
Dmitry Mostovoy [Mon, 9 Feb 2026 09:52:03 +0000 (04:52 -0500)]
mediatek: add cudy wr3000s-v1 ubootmod
This allows us to use the full size of nand,
which extends ubi size from 64Mb to 122.25Mb.
1. Log in to the device and backup all the partitions,
especially unique "Factory" and "bdata" partitions
from System -> Backup / Flash Firmware -> Save mtdblock contents.
2. Install kmod-mtd-rw to unlock mtd partitions for writing
apk update && apk add kmod-mtd-rw && insmod mtd-rw i_want_a_brick=1
3. Write new OpenWrt (U-Boot Layout) "BL2" and "FIP":
mtd -e BL2 write openwrt-mediatek-filogic-cudy_wr3000s-v1-ubootmod-preloader.bin BL2
mtd -e FIP write openwrt-mediatek-filogic-cudy_wr3000s-v1-ubootmod-bl31-uboot.fip FIP
4. Set static IP on your PC: "192.168.1.254", gateway "192.168.1.1"
5. Serve openwrt-mediatek-filogic-cudy_wr3000s-v1-ubootmod-initramfs-recovery.itb
using TFTP server.
6. Connect Router LAN with PC LAN.
7. Cut off the power and re-engage, wait for TFTP recovery to complete.
8. After OpenWrt initramfs recovery has booted,
clean "/dev/mtd5" ubi partition to utilize maximum of free space:
ubidetach -p /dev/mtd5; ubiformat /dev/mtd5 -y; ubiattach -p /dev/mtd5
ubimkvol /dev/ubi0 -n 0 -N ubootenv -s 128KiB
ubimkvol /dev/ubi0 -n 1 -N ubootenv2 -s 128KiB
9. Perform sysupgrade.
Dmitry Mostovoy [Mon, 9 Feb 2026 09:51:31 +0000 (04:51 -0500)]
mediatek: add cudy wr3000p-v1 ubootmod
This allows us to use the full size of nand,
which extends ubi size from 64Mb to 122.25Mb.
1. Log in to the device and backup all the partitions,
especially unique "Factory" and "bdata" partitions
from System -> Backup / Flash Firmware -> Save mtdblock contents.
2. Install kmod-mtd-rw to unlock mtd partitions for writing
apk update && apk add kmod-mtd-rw && insmod mtd-rw i_want_a_brick=1
3. Write new OpenWrt (U-Boot Layout) "BL2" and "FIP":
mtd -e BL2 write openwrt-mediatek-filogic-cudy_wr3000p-v1-ubootmod-preloader.bin BL2
mtd -e FIP write openwrt-mediatek-filogic-cudy_wr3000p-v1-ubootmod-bl31-uboot.fip FIP
4. Set static IP on your PC: "192.168.1.254", gateway "192.168.1.1"
5. Serve openwrt-mediatek-filogic-cudy_wr3000p-v1-ubootmod-initramfs-recovery.itb
using TFTP server.
6. Connect Router LAN with PC LAN.
7. Cut off the power and re-engage, wait for TFTP recovery to complete.
8. After OpenWrt initramfs recovery has booted,
clean "/dev/mtd5" ubi partition to utilize maximum of free space:
ubidetach -p /dev/mtd5; ubiformat /dev/mtd5 -y; ubiattach -p /dev/mtd5
ubimkvol /dev/ubi0 -n 0 -N ubootenv -s 128KiB
ubimkvol /dev/ubi0 -n 1 -N ubootenv2 -s 128KiB
9. Perform sysupgrade.
Since there are some similar devices from Cudy (only WR3000P now)
this will allow to create OpenWrt U-Boot layout for all of them
using same DDR4 target.
realtek: eth: remove false security in rteth_remove()
Check for dev in driver remove gives no additional security. The
remove() function is only called if probe() succeeded. Probing
will always call platform_set_drvdata() in the good case. So
remove() will always find dev data via platform_get_drvdata().
The ethernet driver is only loaded via devicetree and makes use
of of_match_table. In this case the probing function is only
called if a matching compatible is set. So pdev->dev.of_node
can never be NULL.
Align the driver and matchtable naming convention to the new
rteth prefix. While we are here autogenerate the module name
by using KBUILD_MODNAME. This is common upstream practice.
Jonas Jelonek [Thu, 26 Mar 2026 13:34:38 +0000 (13:34 +0000)]
realtek: dts: drop trailing semicolons after macro use
Commit d52f7a4ca5 ("realtek: dts: new SWITCH_PORT_LED() macro") introduced
a new macro to simplify switch port definitions and introduces usage of
it for Zyxel XGS1X10-12 devices. However, this change added a DTS syntax
issue because:
> SWITCH_PORT_LED(...);
produces
> port@XX { ... };;
because the macro already includes a trailing semicolon. The DT compiler
doesn't like this so it fails with syntax error. Fix this by dropping the
trailing semicolons after macro usages.
Fixes: d52f7a4ca5 ("realtek: dts: new SWITCH_PORT_LED() macro") Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com> Link: https://github.com/openwrt/openwrt/pull/22614 Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL8261BE 10GbE PHY's `reset-deassert-us` was set to 100ms (100000us),
but the **RTL8261N datasheet (Table 108, parameter t7)** specifies a
minimum **SMI-ready time of 150ms** after nRESET release before the MDIO
(SMI) bus can be used.
Note: Essentially, the RTL8261N and RTL8261BE are architecturally identical
chips, so their initialization parameters should be consistent.
Jonas Jelonek [Wed, 25 Mar 2026 12:51:09 +0000 (13:51 +0100)]
realtek: pcs: rtl930x: improve error propagation
Previous changes refactored the hardware mode configuration for RTL930x
a lot. Now that this is in a better shape, one issue persists: missing
error propagation. Only parts of this function really propagate an
error, others are silently dropped. While this is a known driver-wide
issue, at least make it good here. Propagate the errors from functions
which apply configuration sequences to the caller.
Single writes are still left out on purpose, they need and will be
addressed later.
Decommission a helper for applying config/patch sequences for even/odd
SerDes. Most of these sequences were squashed due to marginal
difference, sharing a lot of common parts. For the marginal differences,
testing showed that the different values were already present on
even/odd. Since those are no reset/trigger bits but just configuration
values, writing them for both should do no harm.
Jonas Jelonek [Mon, 23 Mar 2026 20:44:10 +0000 (21:44 +0100)]
realtek: pcs: rtl930x: squash config sequences even more
Config/patch sequences have been reduced and merged by previous changes.
Now that we have a clearer view on them, we can see that there are still
several similarities between the even and odd variants. Some different
writes for even and odd SerDes remain but one can find out they don't
need to be separate. For example, a write to [0x29, 0x09] is missing for
odd SerDes but testing and a SerDes dump from a running configuration
show that the registers still hold the same value and changes do not
affect functionality. Thus, merge them too to get rid of a lot of
even/odd stuff.
Right now, the config sequences for XSGMII and USXGMII have been
stripped down to their essential parts. Still, they have redundancies.
The XSGMII sequences are 99% equal to the generic ANA_10G sequences
(except for a single write which is DFE/LEQ-related and changed during
calibration later anyway), thus we can drop them completely.
The USXGMII sequences contain the same sequences so they can be removed
there too, all being covered by applying the ANA_10G sequence for those
modes too. One different write (register [0x2e, 0x01]) is integrated into
the ANA_10G sequence since testing has shown that the value is either the
default for that register anyway, or set during SDK setup too for 10GR.
Jonas Jelonek [Wed, 18 Mar 2026 22:58:56 +0000 (23:58 +0100)]
realtek: pcs: rtl930x: move writes to config
Move a few register writes from the ANA_10G patch sequences to the
configuration function. Those write are targeted at digital pages and do
not fully apply for *SGMII modes. To make the ANA_10G sequence really
just deal with analog pages and make it usable for *SGMII modes too,
move out the digital page writes.
Jonas Jelonek [Tue, 17 Mar 2026 22:23:08 +0000 (22:23 +0000)]
realtek: pcs: rtl930x: break up fiber config sequences
The patch/config sequences we took over from the SDK are partially
redundant, i.e. they share common parts which can be separated per
speed. For example, the config for 10GR contains the one for 2500Base-X
but we have a dedicated one for 2500Base-X. This is a first step to
modularize and reverse-engineer those sequences, and decrease the size
they claim.
The sequences are nearly exclusive ordered by ascending pages. This
suggests that those register/writes do not have a hidden function of
performing inline resets but rather are just configuration values.
Likely, they may be applied in rather arbitrary order. Splitting up the
sequences here assumes this is true and does some minor order changes.
Testing shows no behavioral change. Looking at [1] there are no relevant
reset or trigger bits affected by that. Suspiciously ordered writes have
mostly been kept though.
USXGMII setup needs to be adjusted too due to shared sequence parts.
Jonas Jelonek [Wed, 18 Mar 2026 21:02:55 +0000 (22:02 +0100)]
realtek: pcs: rtl930x: move EEE to USXGMII configuration
The patch/config sequences for USXGMII modes contain a register write
which is explicitly labelled as "enable eee". To clean the sequences and
reduce duplication, move this specific write to the USXGMII
configuration function.
While at it, demystify this register write. From [1] we can see that
only a single bit needs to be set for controlling EEE instead of the
whole register. From testing it was seen that the register has a default
value of 0x445C after reset. Thus, there is no other operation hidden in
this write and we're safe to reduce it to setting just the EEE enable
bit.
USXGMII configuration is currently only performed via the patching
sequences although there's a dedicated function which configures several
parameters and assigns meaningful names to some register fields. It was
introduced in dca20f91ea12 ("realtek: add serdes patch for 10G_QXGMII")
but somewhat abandoned later due to a partial revert.
To improve the situation, prioritize usage of the function for USXGMII
variants and remove some parts from the patch sequences which seem to be
exclusive for USXGMII and thus can be covered by this function. Writes
to registers [0x6, 0xE], [0x6, 0x13] and [0x6, 0x14] can be dropped
completely because they are redundant. The bits really affected by
these writes (compared to the default register values aquired from a
dump) are overwritten below again. Testing on real hardware and USXGMII
supports this.
While at it, improve the style a bit and add comments explaining some of
the fields a bit more. Additionally, fix the call situation which
currently is dead code due to early exit. Provide two calls to the
mentioned functions but comment one of them to remain current
functionality. Names and meaning of fields is inferred from [1].
Jonas Jelonek [Wed, 18 Mar 2026 20:20:31 +0000 (21:20 +0100)]
realtek: pcs: rtl930x: carve out common writes
Start deconstructing the patch/config sequences by carving out two
specific writes which are common for non-USXGMII and are special because
they are not in analog SerDes pages.
Jonas Jelonek [Sat, 21 Mar 2026 23:52:09 +0000 (00:52 +0100)]
realtek: pcs: rtl930x: handle QSGMII config early
Handle QSGMII config earlier within the configuration function as a
preparation for subsequent patches in this area. Those will target
splitting up the config sequences and 5G-QSGMII is special there.
Jonas Jelonek [Tue, 17 Mar 2026 21:29:15 +0000 (21:29 +0000)]
realtek: pcs: rtl930x: rename patching function
Rename the function that currently "applies patches" so that it covers
everything it does (and will do). It doesn't only apply patches but in
general performs configuration of a SerDes for a particular hardware
mode.
While at it, remove a print above that call because it is both placed
wrong and redundant due to what the generic pcs_config prints.
Change how patches are applied to reduce redundancy and make the code
more readable. Define a generic function that applies any patch. Within
the RTL930x patch application, define a local macro that helps to get
rid of repeated even/odd checks. While making the code cleaner, it is
also a preparation for further refactoring here.
This adds a local helper macro intended to be only temporary but keeps
the style of the code clean by avoiding a lot of if-else clauses.
Anthony Sepa [Wed, 25 Mar 2026 20:13:43 +0000 (21:13 +0100)]
ipq40xx: fix art partition name WHW03 V1
In the blamed commit, the wrong partition name for ART was used.
It was later discovered that the partition table uses "0:ART" instead of
"art" for the ART partition name thus breaking caldata extraction.
So, fix the partition name.
Fixes: ee5999cf78d8 ("treewide: linksys: use nvmem MAC for hw_mac_addr") Signed-off-by: Anthony Sepa <protectivedad@gmail.com> Signed-off-by: Robert Marko <robimarko@gmail.com>
Allow to configure the LM75 alert pin to active-high instead
of its default active-low. This patch is needed for the D-Link
DGS-1250 series where the alert pin steers the fan speed
between low and high.
Sven Eckelmann [Wed, 11 Mar 2026 17:49:44 +0000 (18:49 +0100)]
realtek: dsa: rtl93xx: avoid LAG transmission on down link
When the link goes down on the other end of a bond, it was noticed that the
switch was still trying to send data over this link.
Problem here is that net_lag_port_dev_txable() uses
bond_is_active_slave_dev() to look the state up. But this is actually
showing if a link is a NOT a backup - not if the link should be really be
TX enabled or not.
As a DSA driver, it is important to consume the DSA information.
dp->lag_tx_enabled must therefore be used for DSA .port_lag_change events.
This variable contains two information from the
struct netdev_lag_lower_state_info:
Damien Dejean [Tue, 24 Mar 2026 20:43:06 +0000 (21:43 +0100)]
realtek: phy: backport pair/polarity order support
Backport four patches merged in netdev-next/main to add pair order [1,2]
and pair polarity [3,4] configuration support for the RTL8224. The
configuration is required when the bootloader doesn't set it up.
Bee Cadorna [Thu, 9 Jan 2025 22:58:22 +0000 (16:58 -0600)]
ipq40xx: enable LP5521 driver for TP-Link Deco M5
TP-Link Deco M5 v1 and v2 models use a separate LP5521 controller to
control the LEDs on the device.
Signed-off-by: Bee Cadorna <r3usrlnd@gmail.com> Tested-by: Tan Li Boon <undisputed.seraphim@gmail.com> Link: https://github.com/openwrt/openwrt/pull/17537 Signed-off-by: Robert Marko <robimarko@gmail.com>
MAC Addresses
-------------
Label : OPAQUE partition @ 0x0008
LAN : Label
WAN : Label + 1
WLAN 2G : Label + 2
WLAN 5G : Label + 3
Installation
------------
1. Install TFTP server software
2. Rename the factory image to 'M5v1_tp_recovery.bin' and copy it into
the TFTP folder
3. Connect an interface configured to 192.168.0.66/24 to the LAN port
- Note: The LAN port is the ethernet port that is furthest away from
the power plug
4. Press the 'reset' button down before powering up the device, holding
for at least 10 seconds
5. Router should download the factory image, install it, and then reboot
6. Router will start up with address 192.168.1.1
Known Issues
------------
- Some devices (including some V1 and V2 devices) may have flash chips
that are not detected, supported by, or have broken SFDP support
The RTL93xx based D-Link DGS-1250 series is currently being
prepared for OpenWrt support. These devices have some extras
that are not yet supported by the existing configuration.
Add the following items to the kernel configuration:
- CONFIG_SENSORS_GPIO_FAN: The devices have a simple gpio
controlled fan (0/1 aka off/on).
- CONFIG_I2C_GPIO_SHARED: The busses of the SFP+ slots are
not controlled by the built-in SOC I2C controller. Instead
they are realized by shared SCL bit banged GPIOs.
- CONFIG_EEPROM_AT24: The MAC address and other device data
is storend in an Atmel EEPROM.
The i2c-shared-gpio driver is designed to emulate up to four
i2c busses with distinct sda lines and a a shared scl line.
For some reason the check for the number of allowed busses
is one off and the driver can only allocate three busses.
Fix that.
Fixes: acd7ecc9ed8 ("realtek: add new i2c-gpio-shared driver") Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://github.com/openwrt/openwrt/pull/22543 Signed-off-by: Robert Marko <robimarko@gmail.com>
A generic function must not call a device specific function directly.
Make hw_en_rxtx() a config member and call that instead of the
functions directly.
With this change another optimization can take place. hw_init()
currently calls device specific hw_en_rxtx() functions at the start
of the function. This is wrong. Initialize the hardware first before
activating the network rx/tx. Take out the multiple calls and place
the rx/tx setup just before the hw_init() call.
The RTL839x notify ring buffer setup is the last consumer
of family_id. Convert it to a device specific callback and
drop family_id from the configuration structure.
RTL93xx sets up the ring counters twice. One location is
inside rteth_93xx_hw_en_rxtx() and the other one is inside
rteth_93xx_hw_reset(). There are slight differences (e.g.
the ring size that is set or how the counters are cleared).
It is currently unclear where to place it best. For now
align this to RTL83xx and remove the coding from function
rteth_93xx_hw_en_rxtx(). Provide a complete & proper setup
in rteth_93xx_hw_reset().
Looking at the different old implementations one can see
that one initialized the ring counters with offset "-2".
This headroom is not needed. The old comment " Some SoCs
have issues with missing underflow protection" was only
regarding the way the counters are being resetted and not
how large they are setup.
The hw_en_rxtx() functions still use the old prefix. Rename
them to align with the rest of the code. This refactoring
makes clear that there is a bug in rteth_tx_timeout(). A
generic function should not call a device specific function
directly. The bug will be fixed separately.
Fixes: c63433acd ("add support for XikeStor SKS8300-8T") Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://github.com/openwrt/openwrt/pull/22593 Signed-off-by: Robert Marko <robimarko@gmail.com>
Fixes: 4a73f72a2 ("add monitor IC node for XikeStor SKS8310-8X") Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://github.com/openwrt/openwrt/pull/22593 Signed-off-by: Robert Marko <robimarko@gmail.com>
ath79: fix initramfs boot for Huawei AP5030DN and AP6010DN
Fix execution of initramfs image on Huawei AP5030DN and AP6010DN by
increasing available memory for LZMA extraction by the loader.
The default leaves only ~23.6 MB between the decompression target
and the running loader code. Extracting images with built-in
packages lead to overwriting the loader code. This causes
the decompression to produce garbage output and hang.
Fix this by overwriting LZMA_TEXT_START to increase the
available memory for LZMA extraction to ~39.6 MB.
realtek: dts: add Netgear GS110TPP serdes for port 9/10
The Netgear GS110TPP uses an RTL8214C to drive ports 9 and 10. The
DTS is missing the corresponding serdes assignment. From looking at
[1] it seems to be connected to pins 82-85 (serdes 2). Add that
definition. With that the last improper use of SWITCH_PORT() macro
is sorted out.
Remark: I do not own this device. The patch just resembles what
the picture [1] shows.
kernel: backport crypto selftests for some ciphersuites
FIPS 140-3 recommends that all crypto implementations should be tested
before first use. Testmanager performs initial tests based on existing
test vectors. Not all algorithms have defined test vectors, so to improve
this situation, this commit backports recently added test vectors for
following cipher suites:
* authenc(hmac(md5),cbc(des))
* authenc(hmac(md5),cbc(aes))
* authenc(hmac(sha1),rfc3686(ctr(aes)))
* authenc(hmac(sha224),rfc3686(ctr(aes)))
* authenc(hmac(sha256),rfc3686(ctr(aes)))
* authenc(hmac(sha384),rfc3686(ctr(aes)))
* authenc(hmac(sha512),rfc3686(ctr(aes)))
These vectors were calculated using a software implementation and then
double-checked on Mediatek MT7981/MT7986 (safexcel) and NXP P2020 (talitos).
Both platforms passed self-tests.
kernel: add support for authenc(hmac(md5),*) on safexcel
This patch adds support for the following AEAD ciphersuites:
- authenc(hmac(md5),cbc(aes))
- authenc(hmac(md5),cbc(des)))
- authenc(hmac(md5),cbc(des3_ede))
- authenc(hmac(md5),rfc3686(ctr(aes)))
These algorithms are used mainly for backward compatibility with some
older equipment. This is enhanced version of the patch found in the
mtk-openwrt-feeds repo.
All cipher suites were tested using test vectors on the MediaTek MT7981,
MT7986, and MT7988.
Harden the mdio driver probing by checking for duplicate port
definitions. Now that the driver has a valid_port mask this
is just a simple bit check. This is the same as upstream does.
realtek: mdio: add valid_port bitmask to structure
Until now the driver determines the validity of a phy (or port)
by checking "smi_bus[] < 0". That is somehow confusing. Align
with upstream and add a valid_port bitmask that can be used for
this check with common kernel bit operations.
The mdio driver has come a long way. The code is
quite stable now and whenever bugs are analyzed
one can look at the registers with devmem from
command line. Drop unneeded debugging information.
Felix Fietkau [Mon, 23 Mar 2026 09:52:46 +0000 (09:52 +0000)]
mt76: update to Git HEAD (2026-03-21)
a665659dee50 wifi: mt76: fix beacon monitor for MBSSID nontransmitted BSS 1b26f5f63d42 wifi: mt76: mt7996: Decrement sta counter removing the link in mt7996_mac_reset_sta_iter() 0c1dedac48c3 wifi: mt76: mt7996: Switch deflink to seclink only if link lookup does not fail 7fa21be01b97 wifi: mt76: mt7996: Rely on msta_link link_id in mt7996_vif_link_remove() 492a407111c3 wifi: mt76: mt7996: Account active links in valid_links fields ade83e44eda0 wifi: mt76: mt7996: Move mlink deallocation in mt7996_vif_link_remove() efebeea5c058 wifi: mt76: mt7996: Destroy vif active links in mt7996_remove_interface() a4c790aef40d wifi: mt76: mt7996: Add mcu APIs to enable/disable vif links. 018f60316d4d wifi: mt76: mt7996: Destroy active sta links in mt7996_mac_sta_remove()
Hauke Mehrtens [Mon, 23 Mar 2026 01:07:43 +0000 (02:07 +0100)]
github: pin claude-code-action to v1.0.49
Version 1.0.49 added support for PRs from forked repositories.
This feature was reverted in v1.0.50, see:
https://github.com/anthropics/claude-code-action/pull/937
v1.0.49 broke commits made by Claude, but we do not use that
feature. Pin to v1.0.49 until
https://github.com/anthropics/claude-code-action/pull/963 is merged
and released.
Fixes: c0e75c9de6f2 ("github: add Claude code review workflow triggered by /claude comment") Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Shiji Yang [Fri, 20 Mar 2026 11:32:03 +0000 (19:32 +0800)]
ramips: fix kernel decompress error for ELECOM WRC-X1800GS
The bootloader reads the compressed kernel to 0x82000000. We need
to decompress kernel to a different address far from 0x82000000 to
avoid memory overlap.
Shiji Yang [Sun, 22 Mar 2026 12:12:11 +0000 (20:12 +0800)]
ramips: fix initramfs kernel loadaddr for EAP615-Wall v1
The kernel load address was changed in commit e2d823d06830 ("ramips:
fix LZMA decompression error for TP-Link EAP615-Wall"). We also need
to relocate the load address for initramfs image so that it can be
booted correctly.
Hauke Mehrtens [Tue, 17 Mar 2026 00:06:24 +0000 (01:06 +0100)]
uboot-lantiq: fix C-style comments in AWK scripts
Modern gawk rejects C-style /* ... */ comments in AWK code, treating
them as regex patterns where '*' has nothing to quantify. Replace all
such comments with AWK-style '#' comments in lantiq_bdi_conf.awk and
lantiq_ram_init_uart.awk.
Also replace the pattern 'if (x) /* comment */ else action' which used
a C comment as a null statement with the equivalent 'if (!x) action'.
Fixes build error:
awk: error: ? * + or {interval} not preceded by valid subpattern
Hauke Mehrtens [Sun, 22 Mar 2026 23:59:06 +0000 (00:59 +0100)]
github: fix claude-code-review running in tag mode for issue_comment
Without a prompt the action auto-detected mode: tag instead of agent
when triggered via issue_comment, resulting in no review being posted.
Remove the prompt so the action can correctly use its built-in agent
mode with full PR context.
Fixes: c0e75c9de6f2 ("github: add Claude code review workflow triggered by /claude comment") Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Benjamin Levine [Fri, 20 Mar 2026 06:07:31 +0000 (06:07 +0000)]
lantiq: xrx200: autoload lantiq_gswip and tag_gswip to fix failsafe mode
lantiq_gswip and tag_gswip were not loaded during failsafe, leaving the
switch uninitialised. This caused LAN1 port to show no link, making
SSH-based recovery impossible.
Add the autoload flag and include tag_gswip (which was also missing from
the autoload list) so the switch initialises correctly in failsafe mode.
Hauke Mehrtens [Sun, 22 Mar 2026 20:31:41 +0000 (21:31 +0100)]
github: add actions: read permission for CI status in claude-code-review
The claude-code-action uses mcp__github_ci__get_ci_status and related
tools to check workflow run status as part of the review. Without
actions: read the GitHub API calls for CI status are rejected.
Fixes: c0e75c9de6f2 ("github: add Claude code review workflow triggered by /claude comment") Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Hauke Mehrtens [Sun, 22 Mar 2026 20:28:54 +0000 (21:28 +0100)]
github: remove allowedTools restriction from claude-code-review
The whitelist was too restrictive, causing permission denials when
Claude tried to use basic tools like Read or Grep to analyse the diff.
Remove it and let the action use its default toolset.
Fixes: c0e75c9de6f2 ("github: add Claude code review workflow triggered by /claude comment") Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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