Jeff Law [Thu, 28 May 2026 02:00:34 +0000 (20:00 -0600)]
[RISC-V] Drop compromised scan-asm test after recent vectorized loop epilogue changes
Tamar's recent change to elide vectorized loop epilogues compromised the
scan-asm part of this test for RISC-V. Essentially the test is looking for a
specific insn that appears in the unnecessary epilogue.
The original motivation for these tests was an ICE. So I'm just dropping the
scan-asm parts of this test so that we still verify that we're not triggering
an ICE.
gcc/testsuite
* gcc.target/riscv/rvv/base/pr115456-3.c: Drop compromised scan-asm
part of the test.
Jerry DeLisle [Sun, 24 May 2026 03:28:43 +0000 (20:28 -0700)]
Fortran: [PR93727] Add EX format rounding for truncated hex mantissa
Implement proper rounding of the hex mantissa in write_ex when the
user specifies a d smaller than full precision. All Fortran ROUND=
modes are supported: ROUND_NEAREST (ties-to-even), ROUND_COMPATIBLE
(ties away from zero), ROUND_UP, ROUND_DOWN, and ROUND_ZERO.
ROUND_PROCDEFINED and ROUND_UNSPECIFIED default to ROUND_NEAREST on
IEEE 754 systems, consistent with the decimal format behaviour.
Carry propagation handles the case where incrementing a string of
trailing F hex digits reaches the integer digit; if that overflows
(F → 16) the output is normalized by setting the integer digit to 8
and incrementing the binary exponent by one.
Assisted by: Claude Sonnet 4.6
PR fortran/93727
libgfortran/ChangeLog:
* io/write.c (write_ex): Replace simple truncation with
rounding-aware logic respecting dtp round_status. Add carry
propagation and integer-digit normalization.
* io/write_float.def: Change use of GFC_UINTEGER_8 to
long long unsigned.
gcc/testsuite/ChangeLog:
* gfortran.dg/EXformat_3.F90: New test covering rounding for
KIND=4, 8, 10, and 16: clear round-up, ties-to-even (truncate
and round-up cases), carry propagation, and normalization.
* gfortran.dg/EXrounding.F90: New test checking the various
rounding modes for all kinds.
Philipp Tomsich [Fri, 20 Mar 2026 16:14:15 +0000 (17:14 +0100)]
ext-dce: narrow sign-extending loads to zero-extending when upper bits are dead
The ext-dce pass tracks bit-level liveness and can replace sign extensions
with zero extensions when the upper bits are dead. However,
ext_dce_try_optimize_extension bails out when the inner operand is MEM
rather than REG, missing the opportunity to narrow sign-extending loads
(e.g. lh -> lhu on RISC-V, ldrsh -> ldrh on AArch64).
Add handling for SIGN_EXTEND of MEM: when the liveness analysis has
already determined the sign bits are dead, replace the sign-extending
load with a zero-extending load via validate_change, which ensures the
target has a matching instruction pattern.
gcc/ChangeLog:
* ext-dce.cc (ext_dce_try_optimize_extension): Handle
SIGN_EXTEND of MEM by replacing with ZERO_EXTEND of MEM
when upper bits are dead.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/ext-dce-1.c: New test.
* gcc.target/riscv/ext-dce-3.c: New test.
* gcc.target/riscv/ext-dce-4.c: New test.
Philipp Tomsich [Fri, 20 Mar 2026 16:14:00 +0000 (17:14 +0100)]
ext-dce: fix off-by-one in subreg liveness for 32-bit modes
ext_dce_process_uses uses `size >= 32` to decide whether group 3
(bits 32-63) is live for a lowpart subreg source. For SImode subregs
(size == 32), this incorrectly marks bits 32-63 as live, preventing
the pass from recognizing that the upper half of a DImode register is
dead. This blocks lw -> lwu narrowing on RV64.
Change the condition to `size > 32`, consistent with the other
thresholds in the same block (size > 8, size > 16). The size > 32
case is still reachable via SUBREG_PROMOTED_VAR_P which widens size
beyond the outer mode.
gcc/ChangeLog:
* ext-dce.cc (ext_dce_process_uses): Fix off-by-one: use
size > 32 instead of size >= 32 for group 3 liveness.
Kishan Parmar [Wed, 27 May 2026 16:24:57 +0000 (21:54 +0530)]
testsuite: Restrict mpc860_no_lwsync.c to Power ilp32 targets [PR125448]
The recently added mpc860_no_lwsync.c test case fails on 64-bit PowerPC
targets (such as powerpc64le-linux-gnu) because the default -m64 option
conflicts with the 32-bit legacy processor specified by -mcpu=860,
resulting in the error: "cc1: error: '-m64' requires a PowerPC64 cpu".
Fix this by restricting the test case execution to 32-bit PowerPC
targets using the 'ilp32' target requirement.
Tobias Burnus [Wed, 27 May 2026 14:16:05 +0000 (16:16 +0200)]
libgomp: Fix ipr_vendor for OpenMP's interop
omp_ipr_vendor and omp_ipr_vendor_name denote the vendor of the
implementation (GCC / GNU compiler) and not the vendor of the
foreign runtime (like Nvidia for CUDA or AMD for ROCm/HSA/HIP).
Thus, use 5 / "gnu" per "Additional Definitions" document
("1.2 Supported vendor-name Values"), cf.
https://www.openmp.org/specifications/
[See also OpenMP Spec Issue #4766.]
libgomp/ChangeLog:
* libgomp.texi (Foreign-runtime support for AMD GPUs,
Foreign-runtime support for Nvdia GPUs): Fix vendor
value to match compiler not GPU vendor.
* plugin/plugin-gcn.c (GOMP_OFFLOAD_get_interop_int,
GOMP_OFFLOAD_get_interop_str): Return 5/"gnu" as ipr_vendor.
* plugin/plugin-nvptx.c (GOMP_OFFLOAD_get_interop_int,
GOMP_OFFLOAD_get_interop_str): Likewise.
* testsuite/libgomp.c/append-args-fr.h: Updated expected
value.
* testsuite/libgomp.c/interop-cuda-full.c: Likewise.
* testsuite/libgomp.c/interop-fr-1.c: Likewise.
* testsuite/libgomp.c/interop-hip.h: Likewise.
* testsuite/libgomp.fortran/interop-hip.h: Likewise.
Tamar Christina [Wed, 27 May 2026 13:31:49 +0000 (14:31 +0100)]
vect: drop prefetches during if-cvt [PR120164]
PR114061 added support for dropping prefetches during vectorization but that
version doesn't work when the prefetch is conditional.
The conditionality introduces a non-if-convertible block in the CFG. The
vectorizer removes the prefetch later on but it can't modify the CFG and as
such the block where the prefetch was in remains with just a VUSEs chain.
This change now drops them during if-conversion. While this patch at the moment
removes them, it makes it easier for later on, should we want to start
vectorizing these instead to just update predicate_statements.
For now this follows the same approach as PR114061 and just drops them.
gcc/ChangeLog:
PR tree-optimization/120164
* tree-if-conv.cc (if_convertible_stmt_p): Detect prefetches.
(predicate_statements): Drop them during predication.
gcc/testsuite/ChangeLog:
PR tree-optimization/120164
* gcc.dg/vect/vect-prefetch-drop_2.c: New test.
Fix x86 caller/callee handling for over-aligned indirect arguments/returns
On x86_64-w64-mingw32, TARGET_SEH limits MAX_SUPPORTED_STACK_ALIGNMENT
to 128 bits, but 256-bit AVX values are still passed and returned indirectly.
Some caller/callee stack-slot paths still used generic allocators that cap
requested alignment to MAX_SUPPORTED_STACK_ALIGNMENT, producing slots that are
under-aligned for later vmovapd/vmovaps accesses.
Fix caller-side paths by using dynamically allocated stack space for:
Fix callee-side paths by overallocating the local stack slot, then aligning the
effective address within that slot when required alignment exceeds
MAX_SUPPORTED_STACK_ALIGNMENT.
This preserves ABI behavior while ensuring alignment-sensitive AVX accesses are
correctly aligned in both caller and callee paths.
Use a target hook to control when this over-aligned stack-slot handling is
required, instead of hardcoding target conditionals in generic code.
gcc/ChangeLog:
PR target/54412
* target.def (overaligned_stack_slot_required): New calls hook.
* calls.cc (allocate_call_dynamic_stack_space): New helper.
(initialize_argument_information): Use
targetm.calls.overaligned_stack_slot_required for over-aligned
by-reference argument copies.
(expand_call): Use
targetm.calls.overaligned_stack_slot_required for over-aligned
hidden return slots.
* function.cc (assign_stack_local_aligned): New helper.
(assign_parm_setup_block): Use
targetm.calls.overaligned_stack_slot_required for over-aligned
stack parm slots.
(assign_parm_setup_reg): Likewise.
* config/i386/i386.cc (ix86_overaligned_stack_slot_required): New.
(TARGET_OVERALIGNED_STACK_SLOT_REQUIRED): Define for i386.
* doc/tm.texi.in: Add hook placement.
* doc/tm.texi: Regenerate.
Signed-off-by: oltolm <oleg.tolmatcev@gmail.com> Signed-off-by: Jonathan Yong <10walls@gmail.com>
oltolm [Tue, 19 May 2026 17:34:42 +0000 (19:34 +0200)]
i386: return 256/512-bit vectors in registers for x86_64 MS ABI [PR89597]
On x86_64 Windows targets using MS ABI, GCC classified 256-bit and
512-bit vector returns as memory returns. That caused hidden sret
pointer returns where YMM0/ZMM0 returns are expected.
Teach MS ABI return classification to keep 32-byte and 64-byte vector
returns in registers when AVX/AVX512F is enabled, matching the return
register selection path.
Also extend function_value_ms_64 so 32-byte and 64-byte eligible vector
returns are mapped to the SSE register class (YMM0/ZMM0 lanes).
Add tests for x86_64-*-mingw* that verify 256-bit and 512-bit vector
returns use YMM0/ZMM0 codegen.
gcc:
PR target/89597
* config/i386/i386.cc (function_value_ms_64): Handle 32-byte and
64-byte vector returns in registers when supported.
(ix86_return_in_memory): Do not force 32-byte/64-byte eligible
vector returns to memory for MS ABI.
gcc/testsuite:
* gcc.target/i386/pr89597-1.c: New test.
* gcc.target/i386/pr89597-2.c: New test.
Signed-off-by: Oleg Tolmatcev <oleg.tolmatcev@gmail.com> Signed-off-by: Jonathan Yong <10walls@gmail.com>
Which when we find an element, in order to return 1 we still go to scalar.
Obviously the scalar code is completely unneeded.
This patch teaches the vectorizer that when
1. We have no live values
2. We only have one exit (this is a restriction that will be lifted in a later
patch and is there because we need masking to avoid false positives, but see
testcase vect-early-break-no-epilog_11.c)
3. The loop has no side-effects
PR tree-optimization/120352
* gcc.dg/vect/vect-early-break-no-epilog_1.c: New test.
* gcc.dg/vect/vect-early-break-no-epilog_10.c: New test.
* gcc.dg/vect/vect-early-break-no-epilog_11.c: New test.
* gcc.dg/vect/vect-early-break-no-epilog_2.c: New test.
* gcc.dg/vect/vect-early-break-no-epilog_3.c: New test.
* gcc.dg/vect/vect-early-break-no-epilog_4.c: New test.
* gcc.dg/vect/vect-early-break-no-epilog_5.c: New test.
* gcc.dg/vect/vect-early-break-no-epilog_6.c: New test.
* gcc.dg/vect/vect-early-break-no-epilog_7.c: New test.
* gcc.dg/vect/vect-early-break-no-epilog_8.c: New test.
* gcc.dg/vect/vect-early-break-no-epilog_9.c: New test.
* gcc.target/aarch64/noeffect.c: New test.
* gcc.target/aarch64/noeffect10.c: New test.
* gcc.target/aarch64/noeffect11.c: New test.
* gcc.target/aarch64/noeffect2.c: New test.
* gcc.target/aarch64/noeffect3.c: New test.
* gcc.target/aarch64/noeffect4.c: New test.
* gcc.target/aarch64/noeffect5.c: New test.
* gcc.target/aarch64/noeffect6.c: New test.
* gcc.target/aarch64/noeffect7.c: New test.
* gcc.target/aarch64/noeffect8.c: New test.
* gcc.target/aarch64/noeffect9.c: New test.
* gcc.target/aarch64/sve/noeffect.c: New test.
* gcc.target/aarch64/sve/noeffect10.c: New test.
* gcc.target/aarch64/sve/noeffect11.c: New test.
* gcc.target/aarch64/sve/noeffect2.c: New test.
* gcc.target/aarch64/sve/noeffect3.c: New test.
* gcc.target/aarch64/sve/noeffect4.c: New test.
* gcc.target/aarch64/sve/noeffect5.c: New test.
* gcc.target/aarch64/sve/noeffect6.c: New test.
* gcc.target/aarch64/sve/noeffect7.c: New test.
* gcc.target/aarch64/sve/noeffect8.c: New test.
* gcc.target/aarch64/sve/noeffect9.c: New test.
Tamar Christina [Wed, 27 May 2026 09:52:27 +0000 (10:52 +0100)]
vect: refactor loop peeling to support explicit flag to redirect early exits [PR120352]
This patch series is the first in a few to optimize early break vectorization.
The first one addresses that certain loops don't require an epilog at all.
An example is
int a[N] = {0,0,0,1};
int b[N] = {0,0,0,1};
__attribute__((noipa, noinline))
int foo ()
{
for (int i = 0; i < N; i++)
{
if (a[i] > b[i])
return 1;
}
return 0;
}
where we have no value or side-effect to compute. Naturally there's no need to
redo any work to just return 1 or 0.
Teaching the vectorizer this however re-enabled epilogue nomask for early break
and so we still need to be able to peel for the epilogues. This peeling however
should not redirect all the alternative exits to the epilog. To understand when
this has to happen peeling now gets an extra parameter to indicate how to handle
the multiple exits.
This had an unfortunate interaction with uncounted loops, because uncounted
loops re-used the layout (with the intermediate merge block) but just being a
fall through block. When it did this it didn't put all PHI nodes in the final
merge block and as such relied on fixups later.
This made the actual changed needed for not needing epilogs more fragile than
needed so I first refactored peeling to be more consistent between early break
and uncounted loops and insure that all BB now explicitly mention and use all
PHI nodes from the exits.
The code should hopefully be a bit more robust now wrt to needed optimizations.
gcc/ChangeLog:
PR tree-optimization/120352
* tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): Add
redirect_exits.
(vect_do_peeling): Use it.
* tree-vectorizer.h (slpeel_tree_duplicate_loop_to_edge_cfg): Update
prototype.
which was dumb, but valid and the above optimization now gets the load
eliminated and the constants folded. However, in particular for scalars,
AArch64 has an optimization that's been a long for ages in which scalar FPR
constants are created using vector broadcasting operations. It assumes scalars
are accessed as scalars (as in, in the mode that created them).
So the above gets optimized to
movi v30.8b, 0x1
which is invalid. The original load requires the inactive elements to be zero,
where-as by using the paradoxical subreg it's relying on the implicit (as in,
not modelled in RTL) assumption that the load zeros the top bits, but doesn't
keep in mind that the load can be optimized away.
This patch fixes it by creating a full SVE vector of 0s and writing only the
values we want to set using an INSR. (i.e. using VL2 of bytes writes a short).
It then provides patterns to optimize this:
1. if it's still following a load, just emit the load.
2. if it's not, then optimize it to a zero'ing operation. so e.g. HI mode
issues an fmov h0, h0 and so clears the top bits to zero.
I choose this representation because even without the above operations it is
semantically valid and will generate correct code.
The alternative would be to delay this optimization to e.g. combine however we
have two problems there:
1. It's quite late, so the above constant cases for instance don't get optimized
and we keep the pointless store and loads.
2. Our RTX costs don't model predicates. and so it may not accept the
combination since the replacement is more expensive.
So I chose to keep the optimization early, but just replace the paradoxical
subreg with a zero-extend.
Richard Earnshaw [Tue, 19 May 2026 17:38:55 +0000 (18:38 +0100)]
MAINTAINERS: Add additional checking to check-MAINTAINERS.py
In order to maintain the new sorting, add a number of additional checks
to check-MAINTAINERS.py. In summary, these are:
- arrange to sort names by surname and then forname(s).
- rework the code to use regex matches for the fields to accommodate
some fields that spill over into the next column.
- arrange to sort by more than one field.
contrib/ChangeLog:
* check-MAINTAINERS.py (get_surname): Rename to ...
(get_name_for_sort): ... this. Add the forenames after the
surname.
(check_group): match against regexs and support additional
fields for secondary sorting.
(sections): Rework to use regexs, add rules for the other
sections in the MAINTAINERS file.
Richard Earnshaw [Tue, 19 May 2026 17:55:22 +0000 (18:55 +0100)]
MAINTAINERS: Sort Various Maintainers
Sort the Various Maintainers by area and then name. In a minor change
to the formatting, I've introduced the convention where if a field
overflows its allotted space, it must be terminated by at exactly two
spaces. This makes it possible for a parser to separate the component
from the subsequent maintainer name.
Evgeny Karpov [Tue, 19 May 2026 16:41:32 +0000 (16:41 +0000)]
aarch64: mingw: Enable init priority order
The patch enables init priority, which is needed for winpthreads and
supported now by aarch64-w64-mingw32.
This change allows building aarch64-w64-mingw32 from upstream
binutils/gcc/mingw repos.
gcc/ChangeLog:
* config/aarch64/aarch64-coff.h (SUPPORTS_INIT_PRIORITY):
Enable SUPPORTS_INIT_PRIORITY by default.
Pietro Monteiro [Tue, 26 May 2026 23:09:23 +0000 (19:09 -0400)]
libffi: Use correct include path for tests [PR125417]
Libffi testsuite uses relative directories for include paths. For
multilibbed targets we run the tests from the the main target build
directory, so using relative paths leads to the wrong fiules being
included by the tests. Fix by using variables that point into the
build dir for the current multilib variant being tested.
libffi/ChangeLog:
PR libffi/125417
* testsuite/lib/libffi.exp (libffi_target_compile): Use
${libffi_include} and ${blddirffi} instead of "../include" and
".." for include paths.
Signed-off-by: Pietro Monteiro <pietro@sociotechnical.xyz>
Without the change gcc fails to build on master in
--enable-checking=release mode as:
gcc/tree-vect-stmts.cc:10408:47: error: ‘stride_step’
may be used uninitialized [-Werror=maybe-uninitialized]
This happens due to a limit hit in uninit anaysis. To avoid intermittent
build failures dependent on code size let's unconditionally initialize
the stride_step.
PR bootstrap/125318
* tree-vect-stmts.cc (vectorizable_load): Explicitly
initialize stride_step to work around
-Werror=maybe-uninitialized build failure.
Here bb 15 predecessor is a normal edge.
So when merging the forwarder bb 15 into bb14 we end up with:
<bb 12> [local count: 206998870]:
# arr1$0_42(ab) = PHI <arr1$0_24(ab)(11), 9(9)>
# sj12_43(ab) = PHI <sj12_30(ab)(11), arr1$0_35(ab)(9)>
f8 ();
and now there is an overlap of live range of arr1$0_35 and arr1$0_42.
So we need to reject the case where we have phis and the phi arguments that
use abnormal uses.
Changes since v1:
* v2: Look at phi arguments of the forwarder block rather than the dest bb
having an abnormal edge out.
* v3: Fix bb_phis_references_abnormal_uses to use the gimple_phi_num_args to
search over the phi arguments. Also fix the commit message which was wrong.
Bootstrapped and tested on x86_64-linux-gnu.
PR tree-optimization/125396
gcc/ChangeLog:
* tree-cfgcleanup.cc (bb_phis_references_abnormal_uses): New function.
(maybe_remove_forwarder_block): Check to make sure the
forwarder block does not have a phi that references ssa name that has
abnormal uses.
gcc/testsuite/ChangeLog:
* gcc.dg/torture/pr125396-1.c: New test.
Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
Tomasz Kamiński [Tue, 26 May 2026 16:01:40 +0000 (18:01 +0200)]
libstdc++: Revert making ref_view<R> statically sized.
This patch reverts all changes except introduction of
ranges::__static_size from r17-810-g7239744d25dadf.
In addition to expected errors from breaking inplace_vector
preconditions, this lead to change in the return type of
define_static_array, when applied on (adapted) ref_view:
int x[10];
auto x = define_static_array(x | views::transform(...));
Type of x changed from span<const ...> to span<const ..., 10>,
due size being statically know.
This was considered beyond the scope of implementation freedom,
and we should wait for acceptance of P3928R0 instead.
libstdc++-v3/ChangeLog:
* include/std/ranges (ref_view::size()): Only call ranges::size(*_M_r).
(ref_view::empty): Only call ranges::empty(*_M_r).
* testsuite/23_containers/inplace_vector/cons/from_iota_neg.cc:
Except no errors from ref_view uses.
* testsuite/23_containers/inplace_vector/cons/from_range_neg.cc:
Likewise.
Fortran: Add debug functions for OpenMP data structures
show_omp_namelist and show_omp_clauses cannot be called from GDB because
dumpfile is NULL at debug time. Add debug wrappers that temporarily set it to
stderr.
gcc/fortran/ChangeLog:
* dump-parse-tree.cc (debug): Add debug functions for gfc_omp_namelist
and gfc_omp_clauses.
ada: Fix System.Interrupt_Names generation on VxWorks
The spec of Ada.Interrupts.Names for VxWorks (and RTEMS) contains a
subtype declaration. This is a deviation from the Ada reference manual
and the sed script used to generate System.Interrupt_Names failed to
handle it. This patch fixes this.
Tomasz Kamiński [Fri, 24 Apr 2026 03:26:13 +0000 (05:26 +0200)]
libstdc++: Make ref_view<R> statically sized if R has static size
This patch introduces ranges::__static_size<_Range> helper functions,
that returns ranges::size(__rg) for __statically_sized_range.
This function is then used for ref_view<R>::size if R has static size,
avoiding dereference of pointer value that is not known at compile time.
Similarly for ref_view<R>::empty() we compare the size with zero, if it
is known statically.
This implements relevant part of P3928R0: static_sized_range by
Hewill Kang. As standard does not specify when constexpr functions
are usable at compile time, such implementation are allowed (but not
mandated) by current draft.
libstdc++-v3/ChangeLog:
* include/bits/ranges_base.h (ranges::__static_size): Define.
* include/std/ranges (ref_view::size()): For ranges with static
size return ranges::__static_size<_Range>.
(ref_view::empty): For ranges with static size, compare size
against zero.
* testsuite/23_containers/inplace_vector/cons/from_iota_neg.cc:
Expect errors from ref_view uses.
* testsuite/23_containers/inplace_vector/cons/from_range_neg.cc:
Expect errors from ref_view uses.
Reviewed-by: Jonathan Wakely <jwakely@redhat.com> Reviewed-by: Patrick Palka <ppalka@redhat.com> Signed-off-by: Tomasz Kamiński <tkaminsk@redhat.com>
The test case illustrates that views applied to span<T, N> are still
statically sized, but once applied to array<T, N> are not. This is
caused by the fact that ref_view stores a pointer to array, and
dereference of unknown pointers does not produce reference to unknown,
and simply yield non-constant expressions (unknown pointer is not
equivalent to pointer to unknown, as it may be null).
libstdc++-v3/ChangeLog:
* include/std/inplace_vector (inplace_vector(std::from_range, __Rg&&)):
Add static_asserts checking range size.
* testsuite/23_containers/inplace_vector/cons/from_iota_neg.cc:
New test.
* testsuite/23_containers/inplace_vector/cons/from_range_neg.cc:
New test.
Reviewed-by: Jonathan Wakely <jwakely@redhat.com> Reviewed-by: Patrick Palka <ppalka@redhat.com> Signed-off-by: Tomasz Kamiński <tkaminsk@redhat.com>
Jonathan Wakely [Thu, 21 May 2026 16:09:47 +0000 (17:09 +0100)]
libstdc++: Deprecate std::memory_order::consume
This implements P3475R2, "Defang and deprecate memory_order::consume",
approved in Hagenberg, 2025.
It looks like the using-declaration for memory_order_consume in
<stdatomic.h> was not deprecated by the paper, but I don't think we can
implement that if we warn for the name in <atomic>. It doesn't make
sense to me for it to be deprecated in C++ but still usable in the C/C++
compatibility header. It's still just as useless in common C/C++
headers, so we should warn.
Jonathan Wakely [Thu, 21 May 2026 17:58:14 +0000 (18:58 +0100)]
libstdc++: Add missing constraints to vector and deque deduction guides
The standard requires that these deduction guides are constrained to
only accept a type that qualifies as an allocator for the second
templates argument.
libstdc++-v3/ChangeLog:
* include/bits/stl_deque.h: Add missing constraint on allocator
type in deduction guide.
* include/bits/stl_vector.h: Likewise.
* include/debug/deque: Likewise.
* include/debug/vector: Likewise.
* testsuite/23_containers/deque/cons/deduction_c++23.cc: Check
that deduction fails for a type which does not qualify as an
allocator.
* testsuite/23_containers/vector/cons/deduction_c++23.cc:
Likewise.
Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com>
Jonathan Wakely [Tue, 19 May 2026 15:51:14 +0000 (16:51 +0100)]
libstdc++: Split <iosfwd> and only include it in <ios> [PR125371]
The standard explicitly requires the <ios> header to include <iosfwd>,
which has declarations of all the standard stream buffers and stream
types. Because we include <ios> in <istream> and <ostream>, this means
that <iosfwd> is included everywhere, and so every iostream header has a
forward declaration of every iostream type. This means that for example,
<fstream> has a declaration (but not the definition) of std::stringbuf.
This leads to a poor user experience, because the compiler's fixit hints
for undeclared types do not trigger of the type _has_ been declared,
instead users get an error about using an incomplete type. See the
example in PR 125371, where using std::istringstream after including
<fstream> fails to suggest including <sstream>.
If we stop including <ios> in <istream> and <ostream>, and instead
include _most_ of the same things that <ios> provides, then we can avoid
the unhelpful declarations of the entire family of iostream types in
every header. Users who really do want a declaration of std::filebuf
or std::istringstream (but don't want the full definition) can still
explicitly include <iosfwd> to get those declarations. But they won't
get them as a side effect of <fstream> etc.
Various headers currently include <iosfwd> because they really do want
the declaration of e.g. std::ostream of std::streambuf_iterator. We can
split <iosfwd> into five smaller headers and then only include the relevant
one where required, e.g. <fstream> only needs to include iosfwd_file.h
and not iosfwd_string.h.
We need to add an explicit include of <ios> in <iostream>. The standard
requires it there, and after this change we no longer get it via
<istream> and <ostream>.
libstdc++-v3/ChangeLog:
PR libstdc++/125371
* config/io/basic_file_stdio.h: Include <bits/ios_base.h>
instead of <ios>.
* include/Makefile.am: Add new headers.
* include/Makefile.in: Regenerate.
* include/bits/fs_path.h: Include <bits/iosfwd.h> instead of
<iosfwd>.
* include/bits/locale_facets.h: Remove unused <iosfwd> and
<streambuf> includes.
* include/bits/localefwd.h: Include <bits/iosfwd.h> instead of
<iosfwd>.
* include/bits/ostream.h: Replace <ios> with its constituent
parts, except for <iosfwd>.
* include/bits/ostream_insert.h: Include <bits/iosfwd.h> instead
of <iosfwd>.
* include/bits/shared_ptr.h: Likewise.
* include/bits/std_thread.h: Likewise.
* include/bits/stream_iterator.h: Likewise.
* include/std/fstream: Include <bits/iosfwd_file.h>.
* include/std/iomanip: Include <bits/iosfwd.h> instead of
<iosfwd>.
* include/std/ios: Do not include <exception> or
<bits/char_traits.h>.
* include/std/iosfwd: Move declarations to new headers and
include those new headers. Tweak Doxygen comment.
* include/std/iostream: Include <ios>.
* include/std/istream: Replace <ios> with its constituent
parts, except for <iosfwd>.
* include/std/random: Include <bits/iosfwd.h> instead of
<iosfwd>.
* include/std/spanstream: Include <bits/iosfwd_span.h>.
* include/std/sstream: Include <bits/iosfwd_string.h>.
* include/std/streambuf: Include <bits/iosfwd.h> instead of
<iosfwd>.
* include/std/string_view: Likewise.
* include/std/syncstream: Include <bits/iosfwd_sync.h>.
* include/std/system_error: Include <bits/iosfwd.h> instead of
<iosfwd>.
* include/bits/iosfwd.h: New file.
* include/bits/iosfwd_file.h: New file.
* include/bits/iosfwd_span.h: New file.
* include/bits/iosfwd_string.h: New file.
* include/bits/iosfwd_sync.h: New file.
Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com>
Tomasz Kamiński [Fri, 24 Apr 2026 03:25:47 +0000 (05:25 +0200)]
libstdc++: Merged concept for ranges with static sized.
This patch replaces duplicated __detail::__statically_sized (from std/meta)
and simd::__static_sized_range (from include/bits/simd_details.h) concepts
with single range::__static_sized_range. The concept uses the implementation
based on __statically_sized concept, as it avoids triggering instantiations
of some class template for each possible size value.
libstdc++-v3/ChangeLog:
* include/bits/ranges_base.h (ranges::__static_sized_range):
Define.
* include/bits/simd_details.h (simd::__static_sized_range):
Remove.
(simd::__static_range_size): Use ranges::__static_sized_range.
* include/bits/simd_loadstore.h (simd::unchecked_store)
(simd::unchecked_load): Use ranges::__static_sized_range.
* include/bits/simd_vec.h (basic_vec::basic_vec(_Rg&&, flags<_Flags>)):
Replace __static_sized_range<_Rg, _S_size> with
ranges::__static_sized_range<_Rg> and traing requires size
for size value.
* include/std/meta (__detail::__statically_sized): Remove.
(std::define_static_array): Use ranges::__static_sized_range.
* testsuite/std/simd/traits_impl.cc: Remove test for
simd::__static_sized_range.
Reviewed-by: Jonathan Wakely <jwakely@redhat.com> Reviewed-by: Patrick Palka <ppalka@redhat.com> Signed-off-by: Tomasz Kamiński <tkaminsk@redhat.com>
Eric Botcazou [Fri, 13 Feb 2026 10:31:36 +0000 (11:31 +0100)]
ada: Fix missing accessibility check for anonymous access function result
This factors out from Apply_Access_Discrims_Accessibility_Check the logic
to generate an accessibility check for a single discriminant, moves two
other routines generating accessibility checks for returns from Exp_Ch6
to Accessibility, creates Apply_Accessibility_Check_For_Return to have
a single entry point, and adjusts Accessibility_Level to cope with the
additional patterns it is invoked on.
This also arranges for the computation of the minimum accessibility level
for access results to be entirely done in Analyze_Subprogram_Body_Helper
and in all cases (it was done only for function bodies without a spec).
gcc/ada/ChangeLog:
* accessibility.ads (Apply_Accessibility_Check): Rename into...
(Apply_Accessibility_Check_For_Parameter): ...this.
(Apply_Accessibility_Check_For_Return): New procedure.
(Effective_Extra_Accessibility): Minor tweak in description.
* accessibility.adb (Function_Call_Or_Allocator_Level): Apply the
specific treatment for returns to anonymous allocators as well.
(Accessibility_Level): Deal with literal null and Deref attribute.
(Apply_Accessibility_Check): Rename into...
(Apply_Accessibility_Check_For_Anonymous): New procedure extracted
from the old Apply_Access_Discrims_Accessibility_Check.
(Apply_Accessibility_Check_For_Class_Wide): New procedure taken
from Exp_Ch6.
(Apply_Accessibility_Check_For_Discriminant): Likewise.
(Apply_Accessibility_Check_For_Parameter): ...this.
(Apply_Accessibility_Check_For_Return): New procedure.
(Static_Accessibility_Level): Minor reformatting.
* exp_attr.adb (Expand_N_Attribute_Reference): Adjust to renaming.
* exp_ch3.adb (Expand_N_Object_Declaration): Generate accessibility
checks for returns by calling Apply_Accessibility_Check_For_Return.
* exp_ch4.adb (Expand_N_Type_Conversion): Adjust to renaming.
* exp_ch6.ads (Apply_Access_Discrims_Accessibility_Check): Delete.
(Apply_CW_Accessibility_Check): Likewise.
* exp_ch6.adb: Remove clauses for Exp_Atag.
(Apply_Access_Discrims_Accessibility_Check): Move to Accessibility.
(Apply_CW_Accessibility_Check): Likewise.
(Expand_Actuals): Adjust to renaming.
(Expand_Simple_Function_Return): Generate accessibility checks by
calling Apply_Accessibility_Check_For_Return.
* sem_ch6.adb (Analyze_Subprogram_Body_Helper): Tidy up and make
the computation of minimum accessibility levels more uniform.
(Create_Extra_Formals): Minor reformatting.
Javier Miranda [Fri, 13 Feb 2026 12:09:34 +0000 (12:09 +0000)]
ada: Overriding of First_Controlling_Parameter tagged type primitive
Implement rule for overriding primitives of tagged types that
have the First_Controlling_Parameter aspect.
gcc/ada/ChangeLog:
* sem_ch3.adb (Derive_Subprogram): Do not replace the type when
Derived_Type inherits the first controlling parameter aspect and
it is not the first formal of this operation.
* sem_disp.adb (Check_Controlling_Formals): For overriding
primitives of types with the first controlling parameter aspect
inherit controlling formals of the overridden parent primitive.
Viljar Indus [Fri, 13 Feb 2026 10:24:15 +0000 (12:24 +0200)]
ada: Fix SPARK RM 6.9 Rule 32 check
Ensure that the ghost equality check is only applied to user defined
equality operations.
gcc/ada/ChangeLog:
* ghost.adb (Check_Ghost_Equality_Op): Supply the type of the
operation as an argument.
* ghost.ads (Check_Ghost_Equality_Op): Likewise.
* sem_ch6.adb (Valid_Operator_Definition): Remove call to
Check_Ghost_Equality_Op.
(Check_For_Primitive_Subprogram): Call Check_Ghost_Equality_Op.
ada: Make Interrupt_State not require Ada.Interrupts
This makes it so using the Interrupt_State configuration pragma does not
add an implicit dependency to Ada.Interrupts. The rationale is given in
a comment.
gcc/ada/ChangeLog:
* libgnarl/s-inttyp.ads: New file.
* libgnarl/a-interr.ads (Interrupt_ID): Derive from
Preelab_Interrupt_ID.
* libgnarl/s-interr.ads (Interrupt_ID): Derive from
Preelab_Interrupt_ID.
(Ada_Interrupt_ID): Remove.
* libgnarl/s-interr__vxworks.ads (Ada_Interrupt_ID): Remove.
* xsintnam.sed: New file.
* Makefile.rtl: Register new runtime files.
* libgnarl/a-interr.adb: Adjust with clauses.
* rtsfind.ads (RE_Interrupt_Names, RE_Preelab_Interrupt_ID): New
variants.
* sem_prag.adb: Use entities from new preelaborate packages.
* gcc-interface/Makefile.in: Generate System.Interrupt_Names.
The task state for interrupt server tasks was not quite right for
unhandled tasks. This fixes that and makes a few comment and formatting
improvements.
Javier Miranda [Thu, 12 Feb 2026 11:02:57 +0000 (11:02 +0000)]
ada: Missing initialization of aggregate components
When a tagged type conversion is applied to a qualified expression
of an aggregate, at runtime some components are left uninitialized.
gcc/ada/ChangeLog:
* exp_ch4.adb (Expand_N_Type_Conversion): When the operand is a
qualified expression of an aggregate, force its evaluation by
capturing its value in a constant (to ensure full initialization
of the tagged object).
Viljar Indus [Tue, 10 Feb 2026 10:04:31 +0000 (12:04 +0200)]
ada: Implement SPARK RM 6.9 (23)
Implement the rule 23 for ghost code:
A user-defined primitive equality operation on a non-ghost record type shall
not be ghost, unless the record type has only limited views.
In addition, a user-defined primitive equality operation on a ghost record type
shall have a matching assertion level.
gcc/ada/ChangeLog:
* ghost.adb (Check_Ghost_Equality_Op): New function for the
implementation of the rule.
* ghost.ads (Check_Ghost_Equality_Op): Likewise.
* sem_ch6.adb (Valid_Operator_Definition): Add check for rule 23.
Eric Botcazou [Tue, 10 Feb 2026 19:09:59 +0000 (20:09 +0100)]
ada: Fix long-standing issue with qualified expressions of class-wide types
Given the very specific name resolution rules for qualified expressions, the
Covers predicate cannot be used when the qualified expression is of a class-
wide type and, therefore, Analyze_Qualified_Expression needs to resort to a
stricter type compatibility analysis. But, unlike Covers, it fails to factor
out the limited views of the types, which may lead to spurious errors.
gcc/ada/ChangeLog:
* sem_ch4.adb (Analyze_Qualified_Expression): For a class-wide type,
check for an exact match modulo the Non_Limited_View attribute.
If a scalar type's Put_Image aspect is specified via an
attribute_definition_clause (as opposed to using aspect_specification
syntax), the aspect specification was incorrectly ignored.
gcc/ada/ChangeLog:
* aspects.adb (Has_Aspect): In the call to Find_Aspect, pass in
True for the Or_Rep_Item parameter instead of letting it default
to False.
Piotr Trojanek [Sat, 31 Jan 2026 11:22:34 +0000 (12:22 +0100)]
ada: Remove Tempdir package
Package Tempdir is no longer needed; its uses have been replaced by an
equivalent routine in System.OS_Lib that does not rely on Name_Id, which is an
internal compiler data type.
The Tempdir package is no longer used by gnatmake.
Eric Botcazou [Mon, 9 Feb 2026 08:09:36 +0000 (09:09 +0100)]
ada: Fix internal error on access to function as component via limited with
The code generator cannot translate the specification of a package because
it contains a circularity created by the presence of a limited_with clause
for it in a withed package, and of a function call made through an access-
to-function type declared in the latter package returning a type declared
in the former package.
gcc/ada/ChangeLog:
PR ada/89609
* sem_res.adb (Resolve_Call): Do not override the Etype of the Name
entity when it denotes a function that returns the limited view of a
type coming from a limited_with clause.
Eric Botcazou [Sat, 7 Feb 2026 13:17:55 +0000 (14:17 +0100)]
ada: Factor out common pattern in Exp_Ch6
This factors out the common prologue in the four procedures dealing with
build-in-place calls in the various contexts. No functional changes.
gcc/ada/ChangeLog:
* exp_ch6.adb (Get_Function_Entity): New function.
(Make_Build_In_Place_Call_In_Allocator): Call it, turn some local
variables into constants and rename Function_Id as Func_Id.
(Make_Build_In_Place_Call_In_Anonymous_Context): Likewise.
(Make_Build_In_Place_Call_In_Assignment): Likewise.
(Make_Build_In_Place_Call_In_Object_Declaration): Likewise.
Gary Dismukes [Thu, 5 Feb 2026 23:32:52 +0000 (23:32 +0000)]
ada: Error on legal No_Return subprogram with formals subject to Type_Invariant
The compiler reports a spurious error indicating that a subprogram with
aspect No_Return doesn't satisfy that aspect in cases where the subprogram
has formals whose type specifies a Type_Invariant aspect. The need for
invariant or postcondition checks leads to the creation of a nested
subprogram that wraps the enclosing subprogram's statements and exception
handler, defeating the checking that's done in Sem_Ch6.Check_Returns.
The fix is to suppress generation of the _wrapped_statements subprogram,
which is legitimate because the invariants and postconditions will not be
executed in any case for a No_Return subprogram since they can never be
reached.
gcc/ada/ChangeLog:
* contracts.adb (Expand_Subprogram_Contract): Don't call
Build_Subprogram_Contract_Wrapper for a No_Return subprogram,
but include any prologue declarations (such as for preconditions).
Viljar Indus [Wed, 7 Jan 2026 08:55:56 +0000 (10:55 +0200)]
ada: Print restrictions in the SARIF report
gcc/ada/ChangeLog:
* errid-diagnostic_repository.ads: Add new diagnostics to the
repository. Map diagnostics to restrictions.
* errid-restriction_repository.ads: New pacakges for mapping
restricitions to diagnostics.
* errid.adb (heck_Diagnostic_To_Restriction_Consistency): New
method for repository consistency.
(Check_Diagnostic_To_Restriction_Consistency): New method for
repository consistency.
(Add_All_Restriction_Rules): New method for adding all of the
restrictions.
* errid.ads: Add new Diagnostic_Id-s.
* errout.adb (Add_Unique_Diagnostics_And_Switches): Add
restrictions to the SARIF_Printer.
* erroutc.ads: Add restrictions to the Error_Msg_Object.
* erroutc-sarif_emitter.adb (Print_Rule): Add method for printing
rules for restrictions.
* erroutc-sarif_emitter.ads: add restrictions as part of the
printer.
* errutil.adb (Error_Msg): Update diagnostic element creation.
* restrict.adb (Restriction_Msg): Add diagnostic id based on the
restriction id.
* gcc-interface/Make-lang.in (GNAT_ADA_OBJS, GNATBIND_OBJS): Add
new files.
* gcc-interface/Makefile.in (GNATMAKE_OBJS): Likewise.
Javier Miranda [Thu, 5 Feb 2026 19:29:22 +0000 (19:29 +0000)]
ada: Fix recursion calls in Remove_Side_Effects
This patch fixes a latent problem in the recursion calls
performed by Remove_Side_Effects. The problem was introduced
when the formal Renaming_Req was added in 2014/June/30. This
fix does not introduce functional changes; it fixes the issue
thus improving the behavior of this routine.
gcc/ada/ChangeLog:
* exp_util.adb (Remove_Side_Effects): Propagate actuals in
recursion calls, unless this is a known side-effect free
attribute whose expressions are also side-effect free.
Bob Duff [Sun, 1 Feb 2026 17:47:23 +0000 (12:47 -0500)]
ada: Tech debt: Remove exception handling from aspects
Remove the Aspect_Exit exception and related code.
The big hammer of exceptions is not needed here,
and it gets in the way of future refactoring.
Some comments were slightly wrong; remove them instead of fixing
them.
gcc/ada/ChangeLog:
* sem_ch13.adb (Analyze_One_Aspect): Remove the exception
declaration, raises, and handler. Inline the code in
Check_Expr_Is_OK_Static_Expression, which was called only once.
Marc Poulhiès [Fri, 23 Jan 2026 11:12:47 +0000 (12:12 +0100)]
ada: fix: use correct scope when unnesting subprocedure
By the original comment before this Analyze call, initially, the
compiler was not creating any new entity, so scope information should be
already there and correct. But now (~15y later), the Analyze call may
indirectly create new entities (e.g. IType) that will use Current_Scope
as their scope: this is incorrect and leads to a failed assertion in
gcc-interface. This change correctly push/pop the current subp entity as
the scope.
gcc/ada/ChangeLog:
* exp_unst.adb (Unnest_Subprogram): Push/Pop scope around Analyze
call.
Marc Poulhiès [Fri, 5 Dec 2025 10:24:56 +0000 (11:24 +0100)]
ada: fix: drop renamings along with dropped subp
During unnesting, the compiler may drop some subp if reachability
analysis decides it's never used. This change adds tracking for subp
renamings, making sure renamings are also dropped with the subp.
When traversing the tree, when looking at a subp renaming declaration, it's
possible that the Subps entry (accessed through Subps_Index) for the renamed
subp has not yet been created. In this case, the renaming is recorded in a
"pending" list, and moved later when the Subps entry is created.
gcc/ada/ChangeLog:
* exp_unst.adb (Maybe_Subp_Index): New non throwing version of
Subp_Index.
(Nullify_Renamings, Move_Pending_Renamings): New.
(Register_Subprogram): Record subp renamings. Call
Nullify_Renamings when a subp is dropped.
(with Elist): Moved to...
* exp_unst.ads (with Elist): ... here.
(Subp_Entry): Add Renamings component.
(Pending_Renamings): New list.
This commit removes the Ada runtime's dependency on libutil when
targeting Linux, where the library is typically empty. Moreover, when
the runtime is built with Makefile.rtl the dependency isn't present (see
Make variable MISCLIB); this commit therefore synchronizes the GPR build
with the Makefile build.
gcc/ada/ChangeLog:
* s-oscons-tmplt.c (PTY_Library): Define empty for Linux targets.
Eric Botcazou [Mon, 26 Jan 2026 08:16:20 +0000 (09:16 +0100)]
ada: Small refactoring in Check_Anonymous_Access_Return_With_Tasks
The procedure uses a custom version of the Might_Have_Tasks predicate, so
this changes it to call the predicate instead.
gcc/ada/ChangeLog:
* sem_ch6.adb (Check_Anonymous_Access_Return_With_Tasks): Declare
Scop as a constant and call the Might_Have_Tasks predicate instead
of using a custom implementation of it.
Steve Baird [Wed, 21 Jan 2026 22:42:31 +0000 (14:42 -0800)]
ada: Deep delta aggregates incorrectly rejected with -gnatX.
To enable the use of deep delta aggregates, it should only be necessary to
enable core extensions (e.g., via -gnatX) as opposed to enabling all
extensions (e.g., via -gnatX0).
gcc/ada/ChangeLog:
* doc/gnat_rm/gnat_language_extensions.rst: Correct example
to avoid using a not-yet-implemented form of deep delta aggregate.
* exp_aggr.adb (Make_Delta_Choice_LHS): Call Core_Extensions_Allowed
instead of All_Extensions_Allowed.
* par-ch4.adb (P_Simple_Expression): Likewise.
* sem_aggr.adb (Resolve_Delta_Array_Aggregate): Likewise.
* gnat_rm.texi: Regenerate.
Gary Dismukes [Wed, 21 Jan 2026 23:35:56 +0000 (23:35 +0000)]
ada: Parsing error on declare expr in expression default for generic formal function
The compiler incorrectly issues syntax errors for a generic formal function
with default given by an expression (a GNAT extension) when the expression
is a declare_expression. This is fixed by calling P_Expression_If_OK rather
than P_Expression to parse the expression, which properly handles parsing
declare_expressions without parentheses (but still requires parentheses to
enclose the expression).
gcc/ada/ChangeLog:
* par.adb (P_Expression_If_OK): Add declare expression to spec comment.
* par-ch4.adb (P_Expression_If_OK): Add declare expression to comments.
* par-ch12.adb (P_Formal_Subprogram_Declaration): Call
P_Expression_If_OK rather than P_Expression.
Javier Miranda [Wed, 21 Jan 2026 19:36:30 +0000 (19:36 +0000)]
ada: Boolean flag for Unsigned_Base_Range aspect is ignored
Unsigned_Base_Range is erroneously enabled when set to False.
gcc/ada/ChangeLog:
* sem_ch13.adb (Analyze_One_Aspect): For Unsigned_Base_Range aspect,
skip generating its corresponding pragma when the aspect is set
to False.
* sem_ch3.adb (Analyze_Full_Type_Declaration): Fix initialization
of local variable Is_Unsigned_Base_Range_Type_Decl to handle
Unsigned_Base_Range aspect set to False.
ada: Fix exception on attaching non-handler procedure
Before this patch, the program error raised when Attach_Handler was
called on a procedure without Interrupt_Handler specified was
accompanied by a message that related to a completely different error.
This patch fixes this.
Jin Ma [Tue, 19 May 2026 09:43:37 +0000 (17:43 +0800)]
RISC-V: Refactor riscv-fusion.cc to use table-driven dispatch
Refactor riscv_macro_fusion_pair_p to replace the large series of
if-blocks with a table-driven approach. Each fusion case is
extracted into its own static checker function with signature
(rtx_insn *prev, rtx_insn *curr), and a struct array
riscv_fusion_table drives the dispatch loop.
Each checker internally calls single_set and enforces its own
simple_sets_p and same-dest constraints, giving full flexibility
to inspect candidate insns and making it straightforward to add
future fusion rules (e.g. branch instructions) that do not
follow those patterns.
Extract the common same-dest register constraint into
riscv_fusion_same_dest_p to reduce code duplication across the
eleven checkers that require it.
Also rename the boolean helper functions (riscv_set_is_add, etc.)
to use the _p suffix per GNU/GCC naming convention for predicates.
No functional change intended.
gcc/ChangeLog:
* config/riscv/riscv-fusion.cc (riscv_fusion_same_dest_p):
New function.
(riscv_set_is_add_p): Rename from riscv_set_is_add.
(riscv_set_is_addi_p): Rename from riscv_set_is_addi.
(riscv_set_is_adduw_p): Rename from riscv_set_is_adduw.
(riscv_set_is_shNadd_p): Rename from riscv_set_is_shNadd.
(riscv_set_is_shNadduw_p): Rename from riscv_set_is_shNadduw.
(riscv_fuse_zextws): New function.
(riscv_fuse_zexth): Likewise.
(riscv_fuse_ldindexed): Likewise.
(riscv_fuse_expanded_ld): Likewise.
(riscv_fuse_ldpreincrement): Likewise.
(riscv_fuse_lui_addi): Likewise.
(riscv_fuse_auipc_addi): Likewise.
(riscv_fuse_lui_ld): Likewise.
(riscv_fuse_auipc_ld): Likewise.
(riscv_fuse_cache_aligned_std): Likewise.
(riscv_fuse_aligned_std): Likewise.
(riscv_fuse_bfext): Likewise.
(riscv_fuse_b_alui): Likewise.
(struct riscv_fusion_entry): New struct.
(riscv_fusion_table): New table.
(riscv_macro_fusion_pair_p): Refactor to use table-driven
dispatch loop with simplified checker interface.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/fusion-auipc-addi-2.c: New test.
* gcc.target/riscv/fusion-lui-addi-2.c: New test.
* gcc.target/riscv/fusion-zexth-2.c: New test.
* gcc.target/riscv/fusion-zextw-2.c: New test.
Jin Ma [Tue, 19 May 2026 09:31:27 +0000 (17:31 +0800)]
RISC-V: Fix multiple bugs in riscv_macro_fusion_pair_p
Fix several correctness and minor issues in the fusion pair
matching logic:
XINT (prev_set, 1) in RISCV_FUSE_AUIPC_LD incorrectly accesses
the SET node rather than its UNSPEC source operand. Use
XINT (SET_SRC (prev_set), 1) to match riscv_fuse_auipc_addi.
RISCV_FUSE_CACHE_ALIGNED_STD compared base registers with != instead
of ==, causing it to match stores with different bases rather than
the same base which is required for cache-line alignment analysis.
RISCV_FUSE_B_ALUI sub+smax pattern had a redundant CONST_INT_P
check on the same operand already validated by the CONST0_RTX
comparison.
RISCV_FUSE_LDINDEXED had a duplicate REG_P check on the same
operand.
Also fix a typo ("hte" -> "the") in a comment and correct the
dump output string from "RISCV_FUSE_ALIGNED_STD" to
"RISCV_FUSE_CACHE_ALIGNED_STD" for the cache-aligned case.
Tests are marked XFAIL as no upstream mtune currently enables
AUIPC_LD, CACHE_ALIGNED_STD, B_ALUI, or LDINDEXED. The
existing fusion-auipc-addi.c test indirectly validates the
XINT fix since AUIPC_ADDI shares the same UNSPEC_AUIPC check
code path.
gcc/ChangeLog:
* config/riscv/riscv-fusion.cc (riscv_macro_fusion_pair_p):
Fix XINT to access SET_SRC (prev_set) in AUIPC_LD case.
Fix base register comparison from != to == in
CACHE_ALIGNED_STD case. Remove redundant CONST_INT_P
check in B_ALUI sub+smax case. Remove duplicate REG_P
check in LDINDEXED case. Fix typo in comment. Fix dump
output name for CACHE_ALIGNED_STD.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/fusion-auipc-ld.c: New test.
* gcc.target/riscv/fusion-b-alui.c: New test.
* gcc.target/riscv/fusion-cache-aligned-std.c: New test.
* gcc.target/riscv/fusion-ldindexed.c: New test.
Andrew Pinski [Mon, 25 May 2026 19:44:48 +0000 (12:44 -0700)]
match: Fix up `(smaller)a ==/!= (smaller) b` pattern for pointers [PR125453]
While reviewing r17-632-g1c9808a71207eb, I missed that it was valid (in gimple)
to cast from a pointer to a smaller integral type. That meant with that
pattern we would get `ptr ^ ptr` which is invalid gimple.
This adds a check for integral type before applying this pattern.
Pushed as obvious after a bootstrap/test on x86_64-linux-gnu.
PR tree-optimization/125453
gcc/ChangeLog:
* match.pd (`(smaller)a ==/!= (smaller) b`): Reject
non integral types.
gcc/testsuite/ChangeLog:
* gcc.dg/torture/pr125453-1.c: New test.
Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
Georg-Johann Lay [Sun, 24 May 2026 20:16:46 +0000 (22:16 +0200)]
AVR: target/125409 - Add fixed-point conversions to / from [u]int24_t.
The test cases ran into
ld: undefined reference to `__fractunssapsi'
ld: undefined reference to `__fractunspsisa'
etc. because the backend didn't implement these conversions.
The worker function that outputs fixed-point conversions inline,
avr_out_fract, is generic enough to handle 24-bit integral modes, so
adding PSImode to the mode iterators in avr-fixed.md fixes the issue.
gcc/testsuite/
* gcc.target/avr/torture/pr125409.h: New file.
* gcc.target/avr/torture/pr125409-fx24-ssk.c: New test.
* gcc.target/avr/torture/pr125409-fx24-ssr.c: New test.
* gcc.target/avr/torture/pr125409-fx24-suk.c: New test.
* gcc.target/avr/torture/pr125409-fx24-sur.c: New test.
* gcc.target/avr/torture/pr125409-fx24-usk.c: New test.
* gcc.target/avr/torture/pr125409-fx24-usr.c: New test.
* gcc.target/avr/torture/pr125409-fx24-uuk.c: New test.
* gcc.target/avr/torture/pr125409-fx24-uur.c: New test.
Georg-Johann Lay [Sun, 24 May 2026 20:12:31 +0000 (22:12 +0200)]
AVR: ad target/121343 - Let __load_<size> insns use hard-reg constraints.
Insns that generate transparent __load_<size> calls can be simplified
using hard-reg constraints instead of explicit hard registers.
This handles __flash loads of 3-byte and 4-byte integral, floating point
and fixed-point values on devices without LPMx instruction.
PR target/121343
gcc/
* config/avr/avr.md (load_<mode>_libgcc): Rewrite to use
a hard-reg constraint for operand 0.
(gen_load<mode>_libgcc): Remove expander.
(mov<mode>): No more special handling needed for sources that
satisfy avr_load_libgcc_p.
Follow up to r16-5508-g77b8221af8fc82; seemingly, a testcase never got
added - and the internal representation changed afther the code was
written. At least the previous code ICE'd for the included testcase.
PR c/125377
gcc/ChangeLog:
* omp-general.cc (omp_check_for_duplicate_variant): Fix used
tree for 'inform' part of the error message.
gcc/testsuite/ChangeLog:
* c-c++-common/gomp/begin-declare-variant-1.c: New test.
Eric Botcazou [Wed, 21 Jan 2026 18:12:02 +0000 (19:12 +0100)]
ada: Fix crash on equality of unchecked union components of formal parameters
The bottom line is that we need to suspend the B.3.3(23/2) rule during the
expansion of the equality function of an unchecked union itself containing
a component of an unchecked union type subject to a per-object constraint,
but this was done too broadly instead of specifically for this case.
gcc/ada/ChangeLog:
* sem_util.adb (Prefix_Is_Formal_Parameter): Rename into...
(Prefix_Is_Formal_Parameter_Of_EQ): ...this. Return True only if
the formal parameter is that of an equality function built for an
unchecked union type.
(Has_Inferable_Discriminants): Adjust to above renaming.
Eric Botcazou [Wed, 21 Jan 2026 09:05:17 +0000 (10:05 +0100)]
ada: Fix different 'Img and 'Image on enumeration type with Put_Image
As documented in the GNAT RM, 'Img should behave like 'Image for objects.
The change fixes the problem and also implements more aggressive folding.
gcc/ada/ChangeLog:
* sem_attr.adb: Add with and use clauses for Exp_Put_Image.
(Eval_Attribute.Fold_Compile_Time_Known_Enumeration_Image): New
procedure factored out from....
(Eval_Attribute): ...here. Attempt to fold 'Img and 'Image for all
compile-time known values of enumeration, but not character, types,
provided that Put_Image need not be called, by invoking the nested
Fold_Compile_Time_Known_Enumeration_Image procedure on the value.
Denis Mazzucato [Tue, 20 Jan 2026 11:54:02 +0000 (12:54 +0100)]
ada: Update references to Parameter Associations RM 6.4.1
AI12-0095-1 added a paragraph after RM 6.4.1(6.3/3), all the subsequent RM
references within 6.x may be off by one; this patch updates those references.
Martin Clochard [Tue, 20 Jan 2026 16:44:13 +0000 (17:44 +0100)]
ada: Set Etype before analysis for conditions generated for 'Old
The absence of Etype decoration is problematic for GNATprove, which
cannot use analyze to fill the blanks in the output.
gcc/ada/ChangeLog:
* sem_util.adb (As_Boolean): utility to fill decoration in expressions
(Determining_Condition): set Etype for generated Boolean connectors
(Conditional_Evaluation_Condition): set Etype for generated connectors
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