]> git.ipfire.org Git - thirdparty/linux.git/log
thirdparty/linux.git
4 weeks ago.gitignore: ignore rustc long type txt files
Manos Pitsidianakis [Thu, 21 May 2026 10:21:15 +0000 (13:21 +0300)] 
.gitignore: ignore rustc long type txt files

When rustc prints an error containing a long type that doesn't fit in a
line, it will write the whole thing in a .txt file and print messages
like:

  note: the full type name has been written to
  'path/to/subsystem/module_name.long-type-11621316855315349594.txt'

[ Depending on the compiler version and the kind of error, there are
  two possible spellings -- copying them here for reference:

      = note: the full name for the type has been written to '...long-type-...txt'
      = note: the full type name has been written to '...long-type-...txt'

  In addition, we could clean the files as well in one of our
  cleaning Make targets [1][2].

  Another option would be `--verbose` (but it implies more things
  that we probably don't want) or `-Zwrite-long-types-to-disk=no`
  (unstable so far, but a possible alternative if we prefer to
  avoid the files and simply see the long types in the output
  -- I asked upstream Rust about it [3]).

Link: https://lore.kernel.org/rust-for-linux/CANiq72=cKXdmxEacuGET8fuz_v5eFGB50vnOnKZZJd6iEeAAFA@mail.gmail.com/
Link: https://github.com/Rust-for-Linux/linux/issues/1236
Link: https://rust-lang.zulipchat.com/#narrow/channel/131828-t-compiler/topic/.60-Zwrite-long-types-to-disk.3Dno.60/near/598310194
    - Miguel ]

Long types like core::result::Result<core::pin::Pin<Box<_, Kmalloc,
kernel::error::Error>: pin_init::PinInit<Box<_, Kmalloc>, _> are common
during development, so add a gitignore entry.

Signed-off-by: Manos Pitsidianakis <manos@pitsidianak.is>
Acked-by: Danilo Krummrich <dakr@kernel.org>
Link: https://patch.msgid.link/20260521-rust-gitignore-long-types-txt-v1-1-5be5e6fa427c@pitsidianak.is
[ Moved the lines closer to the existing rust-analyzer one. - Miguel ]
Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
4 weeks agolibbpf: Fix UAF in strset__add_str()
Carlos Llamas [Sat, 23 May 2026 16:27:21 +0000 (16:27 +0000)] 
libbpf: Fix UAF in strset__add_str()

strset_add_str_mem() might reallocate the strset data buffer in order to
accommodate the provided string 's'. However, if 's' points to a string
already present in the buffer, it becomes dangling after the realloc.
This leads to a use-after-free when attempting to memcpy() the string
into the new buffer.

One scenario that triggers this problematic path is when resolve_btfids
attempts to patch kfunc prototypes using existing BTF parameter names:

 | resolve_btfids: function bpf_list_push_back_impl already exists in BTF
 | Segmentation fault (core dumped)

Compiling resolve_btfids with fsanitize=address generates a detailed
report of the UAF:

 | =================================================================
 | ERROR: AddressSanitizer: heap-use-after-free on address 0x7f4c4a500bd4
 | ==1507892==ERROR: AddressSanitizer: heap-use-after-free on address 0x7f4c4a500bd4 at pc 0x55d25155a2a8 bp 0x7ffcef879060 sp 0x7ffcef878818
 | READ of size 5 at 0x7f4c4a500bd4 thread T0
 |     #0 0x55d25155a2a7 in memcpy (tools/bpf/resolve_btfids/resolve_btfids+0xcf2a7)
 |     #1 0x55d2515d708e in strset__add_str tools/lib/bpf/strset.c:162:2
 |     #2 0x55d2515c730b in btf__add_str tools/lib/bpf/btf.c:2109:8
 |     #3 0x55d2515c9020 in btf__add_func_param tools/lib/bpf/btf.c:3108:14
 |     #4 0x55d25159f0b5 in process_kfunc_with_implicit_args tools/bpf/resolve_btfids/main.c:1196:9
 |     #5 0x55d25159e004 in btf2btf tools/bpf/resolve_btfids/main.c:1229:9
 |     #6 0x55d25159cee7 in main tools/bpf/resolve_btfids/main.c:1535:6
 |     #7 0x7f4c78e29f76 in __libc_start_call_main csu/../sysdeps/nptl/libc_start_call_main.h:58:16
 |     #8 0x7f4c78e2a026 in __libc_start_main csu/../csu/libc-start.c:360:3
 |     #9 0x55d2514bb860 in _start (tools/bpf/resolve_btfids/resolve_btfids+0x30860)
 |
 | 0x7f4c4a500bd4 is located 13268 bytes inside of 2829000-byte region [0x7f4c4a4fd800,0x7f4c4a7b02c8)
 | freed by thread T0 here:
 |     #0 0x55d25155b700 in realloc (tools/bpf/resolve_btfids/resolve_btfids+0xd0700)
 |     #1 0x55d2515c426c in libbpf_reallocarray tools/lib/bpf/./libbpf_internal.h:220:9
 |     #2 0x55d2515c426c in libbpf_add_mem tools/lib/bpf/btf.c:224:13
 |
 | previously allocated by thread T0 here:
 |     #0 0x55d25155b2e3 in malloc (tools/bpf/resolve_btfids/resolve_btfids+0xd02e3)
 |     #1 0x55d2515d6e7d in strset__new tools/lib/bpf/strset.c:58:20

While resolve_btfids could be refactored to avoid this call path, let's
instead fix this issue at the source in strset__add_str() and avoid
similar scenarios.

Let's check if set->strs_data was reallocated and whether 's' points to
an internal string within the old strset buffer. In such case, 's' is
reconstructed to point to the new buffer.

While already here, also fix strset__find_str() which suffers from the
same problem by factoring out the common operations into a new helper
function strset_str_append().

Fixes: 90d76d3ececc ("libbpf: Extract internal set-of-strings datastructure APIs")
Suggested-by: Andrii Nakryiko <andrii@kernel.org>
Suggested-by: Mykyta Yatsenko <yatsenko@meta.com>
Signed-off-by: Carlos Llamas <cmllamas@google.com>
Signed-off-by: Andrii Nakryiko <andrii@kernel.org>
Link: https://lore.kernel.org/bpf/20260523162722.2718940-1-cmllamas@google.com
4 weeks agobpftool: Fix typo in struct_ops map FD generation for light skeleton
Siddharth Nayyar [Wed, 20 May 2026 09:40:44 +0000 (09:40 +0000)] 
bpftool: Fix typo in struct_ops map FD generation for light skeleton

When generating light skeletons for BPF programs containing struct_ops
maps, bpftool incorrectly outputs a stray literal 't' instead of a tab
character for the map file descriptor member in the links structure.
This causes a compilation error when the generated light skeleton is
used.

Correct the format string by replacing 't' with '\t'.

Fixes: 08ac454e258e ("libbpf: Auto-attach struct_ops BPF maps in BPF skeleton")
Signed-off-by: Siddharth Nayyar <sidnayyar@google.com>
Signed-off-by: Andrii Nakryiko <andrii@kernel.org>
Acked-by: Quentin Monnet <qmo@kernel.org>
Link: https://lore.kernel.org/bpf/20260520-struct_ops_gen_typo_fix-v1-1-4dee3771da46@google.com
4 weeks agolibbpf: Harden parse_vma_segs() path parsing
Michael Bommarito [Fri, 22 May 2026 20:13:53 +0000 (16:13 -0400)] 
libbpf: Harden parse_vma_segs() path parsing

parse_vma_segs() in tools/lib/bpf/usdt.c parses /proc/<pid>/maps
with two widthless scansets, "%s" into mode[16] and "%[^\n]"
into line[4096]. A VMA name in maps is not limited to that local
buffer; a deeply nested backing path can produce a maps record long
enough to overflow the stack buffer.

Bound both scansets to the declared buffer sizes ("%15s" for mode[16]
and "%4095[^\n]" for line[4096]) and drain any residue past line[4094]
with "%*[^\n]" before the trailing "\n". Without the drain, the residue
of an over-long record would stay in the stream and break the next
"%zx-%zx" parse, so the loop would exit early and silently skip later
maps records.

Also stop using sscanf(..., "%s") to peel the /proc/<pid>/root prefix
from lib_path. Parse the pid and prefix length with "%n", check for the
following slash, and copy the remainder with libbpf_strlcpy(). That
removes a second unbounded stack write and preserves paths containing
spaces.

Fixes: 74cc6311cec9 ("libbpf: Add USDT notes parsing and resolution logic")
Signed-off-by: Michael Bommarito <michael.bommarito@gmail.com>
Signed-off-by: Andrii Nakryiko <andrii@kernel.org>
Reviewed-by: Emil Tsalapatis <emil@etsalapatis.com>
Link: https://lore.kernel.org/bpf/20260522201353.1454653-1-michael.bommarito@gmail.com
4 weeks agodt-bindings: tegra: pmc: Add Tegra238 compatible
Prathamesh Shete [Mon, 18 May 2026 10:14:19 +0000 (10:14 +0000)] 
dt-bindings: tegra: pmc: Add Tegra238 compatible

The PMC found on Tegra238 is similar to the version in earlier chips but
some of the register offsets and bitfields differ, so add a specific
compatible string for this new variant.

Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agoMerge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Jakub Kicinski [Thu, 21 May 2026 22:02:54 +0000 (15:02 -0700)] 
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net

Cross-merge networking fixes after downstream PR (net-7.1-rc6).

Conflicts:

drivers/net/phy/air_en8811h.c
  d895767c33781 ("net: phy: air_en8811h: add AN8811HB MCU assert/deassert support")
  dddfadd75197e ("net: phy: Add Airoha phy library for shared code")
  5226bb6634cdf ("net: phy: air_phy_lib: Factorize BuckPBus register accessors")
  e08f0ea6daf2e ("net: phy: Rename Airoha common BuckPBus register accessors")

net/sched/sch_netem.c
  a2f6ed7b4873 ("net/sched: netem: add per-impairment extended statistics")
  9552b11e3eda ("net/sched: fix packet loop on netem when duplicate is on")

Adjacent changes:

drivers/dpll/zl3073x/core.c
  c1224569cef0 ("dpll: zl3073x: make frequency monitor a per-device attribute")
  54e65df8cf18 ("dpll: zl3073x: report FFO as DPLL vs input reference offset")

net/iucv/af_iucv.c
  347fdd4df85f ("af_iucv: convert to getsockopt_iter")
  3589d20a666c ("net/iucv: fix locking in .getsockopt")

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
4 weeks agoarm64: tegra: Mark MAX77620 as system power controller on Smaug
Diogo Ivo [Thu, 14 May 2026 14:47:22 +0000 (16:47 +0200)] 
arm64: tegra: Mark MAX77620 as system power controller on Smaug

Register the MAX77620 PMIC as the system power controller on Pixel C so
the driver can install its sys-off handler.

This allows the PMIC poweroff sequence to override the non-working PSCI
SYSTEM_OFF implementation on this platform.

Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agoRevert "nouveau/gsp: cleanup IS_ERR_OR_NULL in rm_alloc functions"
Lyude Paul [Thu, 28 May 2026 19:27:19 +0000 (15:27 -0400)] 
Revert "nouveau/gsp: cleanup IS_ERR_OR_NULL in rm_alloc functions"

This is probably too risky, see the discussion here:

  https://lists.freedesktop.org/archives/dri-devel/2026-May/570353.html

This reverts commit 281fe11c6c4aebc1a1eb9d21eaab7323ee5af979.

Signed-off-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Timur Tabi <ttabi@nvidia.com>
Link: https://patch.msgid.link/20260528192847.4077458-6-lyude@redhat.com
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
4 weeks agoRevert "nouveau/gsp: cleanup IS_ERR_OR_NULL in rpc_rd"
Lyude Paul [Thu, 28 May 2026 19:27:18 +0000 (15:27 -0400)] 
Revert "nouveau/gsp: cleanup IS_ERR_OR_NULL in rpc_rd"

This is probably much too risky. See the discussion here:

  https://lists.freedesktop.org/archives/dri-devel/2026-May/570353.html

This reverts commit 47f15f6cf068c14d1a5054066c445bee23f6047e.

Signed-off-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Timur Tabi <ttabi@nvidia.com>
Link: https://patch.msgid.link/20260528192847.4077458-5-lyude@redhat.com
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
4 weeks agoRevert "nouveau/gsp/rm: cleanup WARN_ON(IS_ERR_OR_NULL)"
Lyude Paul [Thu, 28 May 2026 19:27:17 +0000 (15:27 -0400)] 
Revert "nouveau/gsp/rm: cleanup WARN_ON(IS_ERR_OR_NULL)"

This is probably too risky, see the discussion here:

  https://lists.freedesktop.org/archives/dri-devel/2026-May/570353.html

This reverts commit 6198977a78af8769d3f3108e830901325b97cf03.

Signed-off-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Timur Tabi <ttabi@nvidia.com>
Link: https://patch.msgid.link/20260528192847.4077458-4-lyude@redhat.com
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
4 weeks agoRevert "nouveau/gsp/rm: cleanup IS_ERR_OR_NULL in core implementation"
Lyude Paul [Thu, 28 May 2026 19:27:16 +0000 (15:27 -0400)] 
Revert "nouveau/gsp/rm: cleanup IS_ERR_OR_NULL in core implementation"

This is probably too risky, see the discussion here:

  https://lists.freedesktop.org/archives/dri-devel/2026-May/570353.html

This reverts commit 67346c90ce275e835e93a4a13041afee47bd3f9e.

Signed-off-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Timur Tabi <ttabi@nvidia.com>
Link: https://patch.msgid.link/20260528192847.4077458-3-lyude@redhat.com
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
4 weeks agoRevert "nouveau/gsp/rm: cleanup remaining IS_ERR_OR_NULL usage"
Lyude Paul [Thu, 28 May 2026 19:27:15 +0000 (15:27 -0400)] 
Revert "nouveau/gsp/rm: cleanup remaining IS_ERR_OR_NULL usage"

This reverts commit 1a80c009e27b42e8c202d4c5dbd9dad9e22af742.

Embarassingly, it seems that I completely missed a pretty big issue this
patch causes according to Danilo and Sashiko:

https://lists.freedesktop.org/archives/dri-devel/2026-May/570353.html

Where it seems this causes some machines to segfault during nouveau probe.

So, revert this for the time being.

Signed-off-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Timur Tabi <ttabi@nvidia.com>
Link: https://patch.msgid.link/20260528192847.4077458-2-lyude@redhat.com
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
4 weeks agousb: xhci: tegra: Explicitly specify PMC instance to use
Thierry Reding [Mon, 3 Feb 2025 15:31:14 +0000 (16:31 +0100)] 
usb: xhci: tegra: Explicitly specify PMC instance to use

Currently the kernel relies on a global variable to reference the PMC
context. Use an explicit lookup for the PMC and pass that to the public
PMC APIs.

Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agoPCI: tegra: Explicitly specify PMC instance to use
Thierry Reding [Mon, 3 Feb 2025 15:30:24 +0000 (16:30 +0100)] 
PCI: tegra: Explicitly specify PMC instance to use

Currently the kernel relies on a global variable to reference the PMC
context. Use an explicit lookup for the PMC and pass that to the public
PMC APIs.

Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agomedia: vde: Explicitly specify PMC instance to use
Thierry Reding [Mon, 3 Feb 2025 15:29:35 +0000 (16:29 +0100)] 
media: vde: Explicitly specify PMC instance to use

Currently the kernel relies on a global variable to reference the PMC
context. Use an explicit lookup for the PMC and pass that to the public
PMC APIs.

Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agodrm/tegra: Explicitly specify PMC instance to use
Thierry Reding [Mon, 3 Feb 2025 15:28:38 +0000 (16:28 +0100)] 
drm/tegra: Explicitly specify PMC instance to use

Currently the kernel relies on a global variable to reference the PMC
context. Use an explicit lookup for the PMC and pass that to the public
PMC APIs.

Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agodrm/nouveau: tegra: Explicitly specify PMC instance to use
Thierry Reding [Mon, 3 Feb 2025 15:27:02 +0000 (16:27 +0100)] 
drm/nouveau: tegra: Explicitly specify PMC instance to use

Currently the kernel relies on a global variable to reference the PMC
context. Use an explicit lookup for the PMC and pass that to the public
PMC APIs.

Acked-by: Danilo Krummrich <dakr@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agoata: ahci_tegra: Explicitly specify PMC instance to use
Thierry Reding [Mon, 3 Feb 2025 15:25:29 +0000 (16:25 +0100)] 
ata: ahci_tegra: Explicitly specify PMC instance to use

Currently the kernel relies on a global variable to reference the PMC
context. Use an explicit lookup for the PMC and pass that to the public
PMC APIs.

Acked-by: Damien Le Moal <dlemoal@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agoMerge tag 'acpi-7.1-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael...
Linus Torvalds [Thu, 28 May 2026 20:45:10 +0000 (13:45 -0700)] 
Merge tag 'acpi-7.1-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull ACPI support fixes from Rafael Wysocki:
 "Fix three issues in the ACPI button driver: a possible crash due to a
  button press after unloading the driver (introduced during the 6.15
  development cycle), function keys breakage on Toshiba Tecra X40 due to
  missing ACPI events (introduced during the 7.0 development cycle), and
  a missing probe rollback path item that has not been added by mistake
  during a recent update"

* tag 'acpi-7.1-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm:
  ACPI: button: Add missing device class clearing on probe failures
  ACPI: button: Enable wakeup GPEs for ACPI buttons at probe time
  ACPI: button: Fix ACPI GPE handler leak during removal

4 weeks agoMerge tag 'pm-7.1-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Linus Torvalds [Thu, 28 May 2026 20:30:28 +0000 (13:30 -0700)] 
Merge tag 'pm-7.1-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull power management fix from Rafael Wysocki:
 "Fix a possible amd-pstate-ut cpufreq driver crash introduced by a
  recent update (K Prateek Nayak)"

* tag 'pm-7.1-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm:
  cpufreq/amd-pstate-ut: Disable dynamic_epp after the mode switch

4 weeks agodt-bindings: reserved-memory: Change maintainer for BPMP SHMEM
Thierry Reding [Fri, 17 Apr 2026 13:06:43 +0000 (15:06 +0200)] 
dt-bindings: reserved-memory: Change maintainer for BPMP SHMEM

Peter sadly passed away a while ago, so change the maintainers for BPMP
SHMEM to Jon and myself.

Suggested-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agoDocumentation: ABI: Take over as contact for sysfs-driver-tegra-fuse
Thierry Reding [Fri, 17 Apr 2026 13:05:10 +0000 (15:05 +0200)] 
Documentation: ABI: Take over as contact for sysfs-driver-tegra-fuse

Peter sadly passed away a while ago, so I'll be taking over as contact
for this ABI documentation.

Suggested-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agoMAINTAINERS: Move Peter De Schrijver to CREDITS
Thierry Reding [Fri, 16 Jan 2026 19:18:36 +0000 (20:18 +0100)] 
MAINTAINERS: Move Peter De Schrijver to CREDITS

Peter sadly passed away a while back. Paul did a much better job at
finding the right words to mourn this loss than I ever could, so I will
leave this link here:

  https://lore.kernel.org/lkml/alpine.DEB.2.21.999.2407240345480.11116@utopia.booyaka.com/T/#u

Co-developed-by: Paul Walmsley <pjw@kernel.org>
Signed-off-by: Paul Walmsley <pjw@kernel.org>
Co-developed-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Co-developed-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agodrm/amd/display: Add a default case for dc_status_to_str
Ivan Lipski [Wed, 27 May 2026 18:57:17 +0000 (14:57 -0400)] 
drm/amd/display: Add a default case for dc_status_to_str

[Why&How]
If a parsed dc_status case is not covered by the dc_status_to_str, the
switch case is skipped, and the function returns
"Unexpected status error".

This causes build failures when new dc_status enums are introduced.
Changing the 'return "Unexpected status error"' into default resolves it.

Signed-off-by: Ivan Lipski <ivan.lipski@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 weeks agodrm/amdgpu: fix amdgpu_vm_bo_reset_state_machine
Christian König [Fri, 22 May 2026 09:22:10 +0000 (11:22 +0200)] 
drm/amdgpu: fix amdgpu_vm_bo_reset_state_machine

Can't splice the list but need to handle each entry individually.

Otherwise we run into issues after a GPU reset.

Fixes: 4cdbba5a16aa ("drm/amdgpu: restructure VM state machine v4")
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jesse Zhang <jesse.zhang@amd.com>
Tested-by: Jesse Zhang <jesse.zhang@amd.com>
Reviewed-by: Sunil Khatri <sunil.khatri@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 weeks agocrypto: aegis128 - Use neon-intrinsics.h on ARM too
Ard Biesheuvel [Wed, 22 Apr 2026 17:17:02 +0000 (19:17 +0200)] 
crypto: aegis128 - Use neon-intrinsics.h on ARM too

Use the asm/neon-intrinsics.h header on ARM as well as arm64, so that
the calling code does not have to know the difference.

Clean up the Makefile a bit while at it.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://patch.msgid.link/20260422171655.3437334-16-ardb+git@google.com
Signed-off-by: Eric Biggers <ebiggers@kernel.org>
4 weeks agolib/crc: arm: Enable arm64's NEON intrinsics implementation of crc64
Ard Biesheuvel [Wed, 22 Apr 2026 17:17:01 +0000 (19:17 +0200)] 
lib/crc: arm: Enable arm64's NEON intrinsics implementation of crc64

Tweak the NEON intrinsics crc64 code written for arm64 so it can be
built for 32-bit ARM as well. The only workaround needed is to provide
alternatives for vmull_p64() and vmull_high_p64() on Clang, which only
defines those when building for the AArch64 or arm64ec ISA. Use the same
helpers for GCC too, to avoid doubling the size of the test/validation
matrix.

KUnit benchmark results (Cortex-A53 @ 1 Ghz)

Before:

   # crc64_nvme_benchmark: len=1: 35 MB/s
   # crc64_nvme_benchmark: len=16: 78 MB/s
   # crc64_nvme_benchmark: len=64: 87 MB/s
   # crc64_nvme_benchmark: len=127: 88 MB/s
   # crc64_nvme_benchmark: len=128: 88 MB/s
   # crc64_nvme_benchmark: len=200: 89 MB/s
   # crc64_nvme_benchmark: len=256: 89 MB/s
   # crc64_nvme_benchmark: len=511: 89 MB/s
   # crc64_nvme_benchmark: len=512: 89 MB/s
   # crc64_nvme_benchmark: len=1024: 90 MB/s
   # crc64_nvme_benchmark: len=3173: 90 MB/s
   # crc64_nvme_benchmark: len=4096: 90 MB/s
   # crc64_nvme_benchmark: len=16384: 90 MB/s

After:

   # crc64_nvme_benchmark: len=1: 32 MB/s
   # crc64_nvme_benchmark: len=16: 76 MB/s
   # crc64_nvme_benchmark: len=64: 71 MB/s
   # crc64_nvme_benchmark: len=127: 88 MB/s
   # crc64_nvme_benchmark: len=128: 618 MB/s
   # crc64_nvme_benchmark: len=200: 542 MB/s
   # crc64_nvme_benchmark: len=256: 920 MB/s
   # crc64_nvme_benchmark: len=511: 836 MB/s
   # crc64_nvme_benchmark: len=512: 1261 MB/s
   # crc64_nvme_benchmark: len=1024: 1531 MB/s
   # crc64_nvme_benchmark: len=3173: 1731 MB/s
   # crc64_nvme_benchmark: len=4096: 1851 MB/s
   # crc64_nvme_benchmark: len=16384: 1858 MB/s

Don't bother with big-endian, as it doesn't work correctly on Clang, and
is barely used these days.

Note that ARM disables preemption and softirq processing when using
kernel mode SIMD, so take care not to hog the CPU for too long.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://patch.msgid.link/20260422171655.3437334-15-ardb+git@google.com
Signed-off-by: Eric Biggers <ebiggers@kernel.org>
4 weeks agolib/crc: Turn NEON intrinsics crc64 implementation into common code
Ard Biesheuvel [Wed, 22 Apr 2026 17:17:00 +0000 (19:17 +0200)] 
lib/crc: Turn NEON intrinsics crc64 implementation into common code

Move and rename the CRC64 NEON intrinsics implementation source file and
rename the function name to reflect that it is NEON code that can be
shared. This will be wired up for 32-bit ARM in a subsequent patch.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://patch.msgid.link/20260422171655.3437334-14-ardb+git@google.com
Signed-off-by: Eric Biggers <ebiggers@kernel.org>
4 weeks agoxor/arm64: Use shared NEON intrinsics implementation from 32-bit ARM
Ard Biesheuvel [Wed, 22 Apr 2026 17:16:59 +0000 (19:16 +0200)] 
xor/arm64: Use shared NEON intrinsics implementation from 32-bit ARM

Tweak the arm64 code so that the pure NEON intrinsics implementation of
XOR is shared between arm64 and ARM. While at it, rename the arm64
specific piece xor-eor3.c to reflect that only the version based on the
EOR3 instruction is kept there.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://patch.msgid.link/20260422171655.3437334-13-ardb+git@google.com
Signed-off-by: Eric Biggers <ebiggers@kernel.org>
4 weeks agoxor/arm: Replace vectorized implementation with arm64's intrinsics
Ard Biesheuvel [Wed, 22 Apr 2026 17:16:58 +0000 (19:16 +0200)] 
xor/arm: Replace vectorized implementation with arm64's intrinsics

Drop the XOR implementation generated by the vectorizer: this has always
been a bit of a hack, and now that arm64 has an intrinsics version that
works on ARM too, let's use that instead.

So copy the part of the arm64 code that can be shared (so not the EOR3
version). The arm64 code will be updated in a subsequent patch to share
this implementation.

Performance (QEMU mach-virt VM running on Synquacer [Cortex-A53 @ 1 GHz]

Before:

[    3.519687] xor: measuring software checksum speed
[    3.521725]    neon            :  1660 MB/sec
[    3.524733]    32regs          :  1105 MB/sec
[    3.527751]    8regs           :  1098 MB/sec
[    3.529911]    arm4regs        :  1540 MB/sec

After:

[    3.517654] xor: measuring software checksum speed
[    3.519454]    neon            :  1896 MB/sec
[    3.522499]    32regs          :  1090 MB/sec
[    3.525560]    8regs           :  1083 MB/sec
[    3.527700]    arm4regs        :  1556 MB/sec

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Christoph Hellwig <hch@lst.de>
Link: https://patch.msgid.link/20260422171655.3437334-12-ardb+git@google.com
Signed-off-by: Eric Biggers <ebiggers@kernel.org>
4 weeks agoARM: Add a neon-intrinsics.h header like on arm64
Ard Biesheuvel [Wed, 22 Apr 2026 17:16:57 +0000 (19:16 +0200)] 
ARM: Add a neon-intrinsics.h header like on arm64

Add a header asm/neon-intrinsics.h similar to the one that arm64 has.
This makes it possible for NEON intrinsics code to be shared seamlessly
between ARM and arm64.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://patch.msgid.link/20260422171655.3437334-11-ardb+git@google.com
Signed-off-by: Eric Biggers <ebiggers@kernel.org>
4 weeks agoMerge tag 'net-7.1-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Linus Torvalds [Thu, 28 May 2026 20:13:48 +0000 (13:13 -0700)] 
Merge tag 'net-7.1-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net

Pull networking fixes from Paolo Abeni:
 "This is again significantly bigger than the same point into the
  previous cycle, but at least smaller than last week.

  I'm not aware of any pending regression for the current cycle.

  Including fixes from netfilter.

  Current release - regressions:

    - netfilter: walk fib6_siblings under RCU

  Previous releases - regressions:

    - netlink: fix sending unassigned nsid after assigned one

    - bridge: fix sleep in atomic context in netlink path

    - sched: fix ethx:ingress -> ethy:egress -> ethx:ingress mirred loop

    - ipv4: fix net->ipv4.sysctl_local_reserved_ports UaF

    - eth: tun: free page on short-frame rejection in tun_xdp_one()

  Previous releases - always broken:

    - skbuff: fix missing zerocopy reference in pskb_carve helpers

    - handshake: drain pending requests at net namespace exit

    - ethtool:
       - rss: avoid modifying the RSS context response
       - module: avoid leaking a netdev ref on module flash errors
       - coalesce: cap profile updates at NET_DIM_PARAMS_NUM_PROFILES

    - netfilter: fix dst corruption in same register operation

    - nfc: hci: fix out-of-bounds read in HCP header parsing

    - ipv6: exthdrs: refresh nh pointer after ipv6_hop_jumbo()

    - eth:
       - vti: use ip6_tnl.net in vti6_changelink().
       - vxlan: do not reuse cached ip_hdr() value after
         skb_tunnel_check_pmtu()"

* tag 'net-7.1-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net: (94 commits)
  dpll: zl3073x: make frequency monitor a per-device attribute
  dpll: zl3073x: use __dpll_device_change_ntf() and remove change_work
  dpll: export __dpll_device_change_ntf() for use under dpll_lock
  net/handshake: Drain pending requests at net namespace exit
  net/handshake: Verify file-reference balance in submit paths
  net/handshake: Close the submit-side sock_hold race
  net/handshake: hand off the pinned file reference to accept_doit
  net/handshake: Take a long-lived file reference at submit
  net/handshake: Pass negative errno through handshake_complete()
  nvme-tcp: store negative errno in queue->tls_err
  net/handshake: Use spin_lock_bh for hn_lock
  net: skbuff: fix missing zerocopy reference in pskb_carve helpers
  net: hibmcge: move dma_rmb() after dma_sync_single_for_cpu() in RX path
  net: hibmcge: disable Relaxed Ordering to fix RX packet corruption
  selftests/tc-testing: Add netem test case exercising loops
  selftests/tc-testing: Add mirred test cases exercising loops
  net/sched: act_mirred: Fix return code in early mirred redirect error paths
  net/sched: act_mirred: Fix blockcast recursion bypass leading to stack overflow
  net/sched: Fix ethx:ingress -> ethy:egress -> ethx:ingress mirred loop
  net/sched: fix packet loop on netem when duplicate is on
  ...

4 weeks agox86/hyperv/vtl: Use the wakeup mailbox to boot secondary CPUs
Ricardo Neri [Wed, 4 Mar 2026 23:41:21 +0000 (15:41 -0800)] 
x86/hyperv/vtl: Use the wakeup mailbox to boot secondary CPUs

The hypervisor is an untrusted entity for TDX guests. It cannot be used
to boot secondary CPUs. The function hv_vtl_wakeup_secondary_cpu() cannot
be used.

Instead, the virtual firmware boots the secondary CPUs and places them in
a state to transfer control to the kernel using the wakeup mailbox. The
firmware enumerates the mailbox via either an ACPI table or a DeviceTree
node.

If the wakeup mailbox is present, the kernel updates the APIC callback
wakeup_secondary_cpu_64() to use it.

Reviewed-by: Dexuan Cui <decui@microsoft.com>
Reviewed-by: Michael Kelley <mhklinux@outlook.com>
Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Signed-off-by: Dexuan Cui <dexuan@kernel.org>
4 weeks agox86/hyperv/vtl: Mark the wakeup mailbox page as private
Yunhong Jiang [Wed, 4 Mar 2026 23:41:20 +0000 (15:41 -0800)] 
x86/hyperv/vtl: Mark the wakeup mailbox page as private

The current code maps MMIO devices as shared (decrypted) by default in a
confidential computing VM.

In a TDX environment, secondary CPUs are booted using the Multiprocessor
Wakeup Structure defined in the ACPI specification. The virtual firmware
and the operating system function in the guest context, without
intervention from the VMM. Map the physical memory of the mailbox as
private. Use the is_private_mmio() callback.

Signed-off-by: Yunhong Jiang <yunhong.jiang@linux.intel.com>
Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Signed-off-by: Dexuan Cui <dexuan@kernel.org>
4 weeks agox86/acpi: Add a helper to get the address of the wakeup mailbox
Ricardo Neri [Wed, 4 Mar 2026 23:41:19 +0000 (15:41 -0800)] 
x86/acpi: Add a helper to get the address of the wakeup mailbox

A Hyper-V VTL level 2 guest in a TDX environment needs to map the physical
page of the ACPI Multiprocessor Wakeup Structure as private (encrypted). It
needs to know the physical address of this structure. Add a helper function
to retrieve the address.

Suggested-by: Michael Kelley <mhklinux@outlook.com>
Acked-by: Rafael J. Wysocki (Intel) <rafael@kernel.org>
Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Signed-off-by: Dexuan Cui <dexuan@kernel.org>
4 weeks agox86/hyperv/vtl: Setup the 64-bit trampoline for TDX guests
Yunhong Jiang [Wed, 4 Mar 2026 23:41:18 +0000 (15:41 -0800)] 
x86/hyperv/vtl: Setup the 64-bit trampoline for TDX guests

The hypervisor is an untrusted entity for TDX guests. It cannot be used
to boot secondary CPUs - neither via hypercalls nor the INIT assert,
de-assert, plus Start-Up IPI messages.

Instead, the platform virtual firmware boots the secondary CPUs and
puts them in a state to transfer control to the kernel. This mechanism uses
the wakeup mailbox described in the Multiprocessor Wakeup Structure of the
ACPI specification. The entry point to the kernel is trampoline_start64.

Allocate and setup the trampoline using the default x86_platform callbacks.

The platform firmware configures the secondary CPUs in long mode. It is no
longer necessary to locate the trampoline under 1MB memory. After handoff
from firmware, the trampoline code switches briefly to 32-bit addressing
mode, which has an addressing limit of 4GB. Set the upper bound of the
trampoline memory accordingly.

Reviewed-by: Dexuan Cui <decui@microsoft.com>
Reviewed-by: Michael Kelley <mhklinux@outlook.com>
Signed-off-by: Yunhong Jiang <yunhong.jiang@linux.intel.com>
Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Signed-off-by: Dexuan Cui <dexuan@kernel.org>
4 weeks agox86/realmode: Make the location of the trampoline configurable
Yunhong Jiang [Wed, 4 Mar 2026 23:41:17 +0000 (15:41 -0800)] 
x86/realmode: Make the location of the trampoline configurable

x86 CPUs boot in real mode. This mode uses a 1MB address space. The
trampoline must reside below this 1MB memory boundary.

There are platforms in which the firmware boots the secondary CPUs,
switches them to long mode and transfers control to the kernel. An example
of such a mechanism is the ACPI Multiprocessor Wakeup Structure.

In this scenario there is no restriction on locating the trampoline under
1MB memory. Moreover, certain platforms (for example, Hyper-V VTL guests)
may not have memory available for allocation below 1MB.

Add a new member to struct x86_init_resources to specify the upper bound
for the location of the trampoline memory. Preserve the default upper bound
of 1MB to conserve the current behavior.

Reviewed-by: Dexuan Cui <decui@microsoft.com>
Reviewed-by: Michael Kelley <mhklinux@outlook.com>
Originally-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Yunhong Jiang <yunhong.jiang@linux.intel.com>
Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Signed-off-by: Dexuan Cui <dexuan@kernel.org>
4 weeks agox86/hyperv/vtl: Set real_mode_header in hv_vtl_init_platform()
Yunhong Jiang [Wed, 4 Mar 2026 23:41:16 +0000 (15:41 -0800)] 
x86/hyperv/vtl: Set real_mode_header in hv_vtl_init_platform()

Hyper-V VTL clears x86_platform.realmode_{init(), reserve()} in
hv_vtl_init_platform() whereas it sets real_mode_header later in
hv_vtl_early_init(). There is no need to deal with the settings of real
mode memory in two places. Also, both functions are called much earlier
than x86_platform.realmode_init() (via an early_initcall), where the
real_mode_header is needed.

Set real_mode_header in hv_vtl_init_platform() to keep all code dealing
with memory for the real mode trampoline in one place. Besides making the
code more readable, it prepares it for a subsequent changeset in which the
behavior needs to change to support Hyper-V VTL guests in a TDX
environment.

Reviewed-by: Dexuan Cui <decui@microsoft.com>
Reviewed-by: Michael Kelley <mhklinux@outlook.com>
Suggested-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Yunhong Jiang <yunhong.jiang@linux.intel.com>
Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Signed-off-by: Dexuan Cui <dexuan@kernel.org>
4 weeks agox86/dt: Parse the Wakeup Mailbox for Intel processors
Ricardo Neri [Wed, 4 Mar 2026 23:41:15 +0000 (15:41 -0800)] 
x86/dt: Parse the Wakeup Mailbox for Intel processors

The Wakeup Mailbox is a mechanism to boot secondary CPUs on systems that do
not want or cannot use the INIT + StartUp IPI messages.

The platform firmware is expected to implement the mailbox as described in
the Multiprocessor Wakeup Structure of the ACPI specification. It is also
expected to publish the mailbox to the operating system as described in the
corresponding DeviceTree schema that accompanies the documentation of the
Linux kernel.

Reuse the existing functionality to set the memory location of the mailbox
and update the wakeup_secondary_cpu_64() APIC callback. Make this
functionality available to DeviceTree-based systems by making CONFIG_X86_
MAILBOX_WAKEUP depend on either CONFIG_OF or CONFIG_ACPI_MADT_WAKEUP.

do_boot_cpu() uses wakeup_secondary_cpu_64() when set. It will be set if a
wakeup mailbox is enumerated via an ACPI table or a DeviceTree node. For
cases in which this behavior is not desired, this APIC callback can be
updated later during boot using platform-specific hooks.

Reviewed-by: Dexuan Cui <decui@microsoft.com>
Co-developed-by: Yunhong Jiang <yunhong.jiang@linux.intel.com>
Signed-off-by: Yunhong Jiang <yunhong.jiang@linux.intel.com>
Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Signed-off-by: Dexuan Cui <dexuan@kernel.org>
4 weeks agodt-bindings: reserved-memory: Wakeup Mailbox for Intel processors
Ricardo Neri [Wed, 4 Mar 2026 23:41:14 +0000 (15:41 -0800)] 
dt-bindings: reserved-memory: Wakeup Mailbox for Intel processors

Add DeviceTree bindings to enumerate the wakeup mailbox used in platform
firmware for Intel processors.

x86 platforms commonly boot secondary CPUs using an INIT assert, de-assert
followed by Start-Up IPI messages. The wakeup mailbox can be used when this
mechanism is unavailable.

The wakeup mailbox offers more control to the operating system to boot
secondary CPUs than a spin-table. It allows the reuse of the same wakeup
vector for all CPUs while maintaining control over which CPUs to boot and
when. While it is possible to achieve the same level of control using a
spin-table, it would require specifying a separate `cpu-release-addr` for
each secondary CPU.

The operation and structure of the mailbox are described in the
Multiprocessor Wakeup Structure defined in the ACPI specification. Note
that this structure does not specify how to publish the mailbox to the
operating system (ACPI-based platform firmware uses a separate table). No
ACPI table is needed in DeviceTree-based firmware to enumerate the mailbox.

Nodes that want to refer to the reserved memory usually define
a `memory-region` property. /cpus/cpu* nodes would want to refer to the
mailbox, but they do not have such property defined in the DeviceTree
specification. Moreover, it would imply that there is a memory region per
CPU. Instead, add a `compatible` property that the operating system can use
to discover the mailbox.

Reviewed-by: Dexuan Cui <decui@microsoft.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Rafael J. Wysocki (Intel) <rafael.j.wysocki@intel.com>
Co-developed-by: Yunhong Jiang <yunhong.jiang@linux.intel.com>
Signed-off-by: Yunhong Jiang <yunhong.jiang@linux.intel.com>
Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Signed-off-by: Dexuan Cui <dexuan@kernel.org>
4 weeks agox86/acpi: Add functions to setup and access the wakeup mailbox
Ricardo Neri [Wed, 4 Mar 2026 23:41:13 +0000 (15:41 -0800)] 
x86/acpi: Add functions to setup and access the wakeup mailbox

Systems that describe hardware using DeviceTree graphs may enumerate and
implement the wakeup mailbox as defined in the ACPI specification but do
not otherwise depend on ACPI. Expose functions to setup and access the
location of the wakeup mailbox from outside ACPI code.

The function acpi_setup_mp_wakeup_mailbox() stores the physical address of
the mailbox and updates the wakeup_secondary_cpu_64() APIC callback.

The function acpi_madt_multiproc_wakeup_mailbox() returns a pointer to the
mailbox.

Acked-by: Rafael J. Wysocki (Intel) <rafael@kernel.org>
Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Signed-off-by: Dexuan Cui <dexuan@kernel.org>
4 weeks agox86/topology: Add missing struct declaration and attribute dependency
Ricardo Neri [Wed, 4 Mar 2026 23:41:12 +0000 (15:41 -0800)] 
x86/topology: Add missing struct declaration and attribute dependency

The prototypes for get_topology_cpu_type_name() and
get_topology_cpu_type() take a pointer to struct cpuinfo_x86, but
asm/topology.h neither includes nor forward-declares the structure.
Including asm/topology.h, directly or indirectly, without including
asm/processor.h triggers a warning:

    ./arch/x86/include/asm/topology.h:159:47: error: ‘struct cpuinfo_x86’
    declared inside parameter list will not be visible outside of this
    definition or declaration [-Werror]
    159 | const char *get_topology_cpu_type_name(struct cpuinfo_x86 *c);
        |                                               ^~~~~~~~~~~

Since only a pointer is needed, add a forward declaration of struct
cpuinfo_x86.

Additionally, sysctl_sched_itmt_enabled is declared in asm/topology.h with
the __read_mostly attribute, but the header does not include linux/cache.h.
This causes a build failure when including asm/topology.h but not linux/
cache.h:

     ./arch/x86/include/asm/topology.h:264:27: error: expected ‘=’, ‘,’,
     ‘;’, ‘asm’ or ‘__attribute__’ before ‘sysctl_sched_itmt_enabled’
     264 | extern bool __read_mostly sysctl_sched_itmt_enabled;
         |                           ^~~~~~~~~~~~~~~~~~~~~~~~~

Include the required header.

Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202511181954.UMxCeTV1-lkp@intel.com/
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202511190008.AA0NTn3G-lkp@intel.com/
Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Signed-off-by: Dexuan Cui <dexuan@kernel.org>
4 weeks agoMerge remote-tracking branch 'drm/drm-next' into drm-rust-next
Danilo Krummrich [Thu, 28 May 2026 18:04:24 +0000 (20:04 +0200)] 
Merge remote-tracking branch 'drm/drm-next' into drm-rust-next

Backmerge to pull in commit 838d852da850 ("rust: allow
`clippy::collapsible_match` globally"), in order to get rid of spurious
warnings messing with developer tooling.

Signed-off-by: Danilo Krummrich <dakr@kernel.org>
4 weeks agoMerge tag 'gpio-fixes-for-v7.1-rc6' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Thu, 28 May 2026 19:36:39 +0000 (12:36 -0700)] 
Merge tag 'gpio-fixes-for-v7.1-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux

Pull gpio fixes from Bartosz Golaszewski:

 - fix interrupt handling in gpio-mxc

 - fix scoped_guard() usage in gpio-adnp

 - don't accept partial writes in gpio-virtuser debugfs interface as
   they can't really work correctly

 - fix resource leaks in gpio-rockchip

 - fix locking issues in remove path in shared GPIO management

 - undo the vote of a GPIO shared proxy virtual device on GPIO release

* tag 'gpio-fixes-for-v7.1-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux:
  gpio: rockchip: teardown bugs and resource leaks
  gpio: rockchip: convert bank->clk to devm_clk_get_enabled()
  gpio: virtuser: Fix uninitialized data bug in gpio_virtuser_direction_do_write()
  gpio: shared: fix lockdep false positive by removing unneeded lock
  gpio: shared: fix deadlock on shared proxy's parent removal
  gpio: adnp: fix flow control regression caused by scoped_guard()
  gpio: shared: undo the vote of the proxy on GPIO free
  gpio: mxc: fix irq_high handling

4 weeks agomedia: rockchip: rkcif: add support for rk3588 vicap mipi capture
Michael Riesch [Fri, 22 May 2026 21:23:09 +0000 (23:23 +0200)] 
media: rockchip: rkcif: add support for rk3588 vicap mipi capture

The RK3588 Video Capture (VICAP) unit features a Digital Video Port (DVP)
and six MIPI CSI-2 capture interfaces. Add initial support for this variant
to the rkcif driver and enable the MIPI CSI-2 capture interfaces.

Reviewed-by: Mehdi Djait <mehdi.djait@linux.intel.com>
Signed-off-by: Michael Riesch <michael.riesch@collabora.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
4 weeks agomedia: dt-bindings: add rockchip rk3588 vicap
Michael Riesch [Fri, 22 May 2026 21:23:08 +0000 (23:23 +0200)] 
media: dt-bindings: add rockchip rk3588 vicap

Add documentation for the Rockchip RK3588 Video Capture (VICAP) unit. To
that end, make the existing rockchip,rk3568-vicap documentation more
general and introduce variant specific constraints.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Michael Riesch <michael.riesch@collabora.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
4 weeks agoDocumentation: admin-guide: media: add rk3588 vicap
Michael Riesch [Fri, 22 May 2026 21:23:07 +0000 (23:23 +0200)] 
Documentation: admin-guide: media: add rk3588 vicap

Add a section that describes the Rockchip RK3588 VICAP.

Reviewed-by: Mehdi Djait <mehdi.djait@linux.intel.com>
Signed-off-by: Michael Riesch <michael.riesch@collabora.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
4 weeks agosecurity/keys: fix missed RCU read section on lookup
Linus Torvalds [Thu, 28 May 2026 18:45:41 +0000 (11:45 -0700)] 
security/keys: fix missed RCU read section on lookup

Nicholas Carlini reports that the keyring code calls assoc_array_find()
in find_key_to_update() without holding the RCU read lock, while the
assoc_array_gc() code really is designed around removing the node from
the tree and then freeing it after an RCU grace-period.

The regular key handling doesn't see this because holding the keyring
semaphore hides any lifetime issues, but the persistent key handling
uses a different model.

Instead of extending the keyring locking, just do the simple RCU locking
that the assoc_array was designed for.

Reported-by: Nicholas Carlini <npc@anthropic.com>
Cc: David Howells <dhowells@redhat.com>
Cc: Jarkko Sakkinen <jarkko@kernel.org>
Cc: Paul Moore <paul@paul-moore.com>
Cc: James Morris James Morris <jmorris@namei.org>
Cc: Serge E. Hallyn <serge@hallyn.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
4 weeks agofirmware: stratix10-rsu: Fix NULL deref on rsu_send_msg() timeout in probe
Dinh Nguyen [Thu, 21 May 2026 02:54:57 +0000 (21:54 -0500)] 
firmware: stratix10-rsu: Fix NULL deref on rsu_send_msg() timeout in probe

rsu_send_msg() can return -ETIMEDOUT when
wait_for_completion_interruptible_timeout() fires while the SMC call is still
pending. In stratix10_rsu_probe(), the error paths for COMMAND_RSU_DCMF_VERSION,
COMMAND_RSU_DCMF_STATUS, COMMAND_RSU_MAX_RETRY and COMMAND_RSU_GET_SPT_TABLE
call stratix10_svc_free_channel() - which sets chan->scl to NULL - but then
fall through and queue the next request on the same channel. The next svc
kthread that runs will dereference pdata->chan->scl in its receive callback
path, triggering a NULL pointer dereference identical to the one fixed by
commit c45f7263100c ("firmware: stratix10-rsu: Fix NULL pointer dereference
when RSU is disabled") for the COMMAND_RSU_STATUS path.

Apply the same cleanup pattern to the remaining failure paths: remove the
async client, free the channel, and return early so no further messages are
queued on a channel whose scl has been cleared.

While at it, clean up stratix10_rsu_probe() in two ways without changing
behavior:

- Drop redundant zero-initialization of fields already cleared by
  devm_kzalloc(): client.receive_cb, status.* and spt0/1_address
  (INVALID_SPT_ADDRESS is 0x0).

- Replace five identical 3-line error-cleanup blocks
  (stratix10_svc_remove_async_client() + stratix10_svc_free_channel() +
  return ret) with goto labels (remove_async_client, free_channel),
  matching the standard kernel resource-unwinding pattern and making it
  easier to extend the probe sequence without forgetting matching
  cleanup.

Also move init_completion() next to mutex_init() so sync-primitive
initialization is grouped before anything that could trigger a
callback.

Fixes: 15847537b623 ("firmware: stratix10-rsu: Migrate RSU driver to use stratix10 asynchronous framework.")
Cc: stable@kernel.org
Assisted-by: Claude:claude-4.7-opus-high Cursor
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v2: Add a minor clean-up of the function stratix10_rsu_probe() to have a
    centralize exit for all the rsu_send_async_msg() and rsu_send_msg().

4 weeks agofirmware: stratix10-svc: Don't fail probe when async ops unsupported
Muhammad Amirul Asyraf Mohamad Jamian [Thu, 16 Apr 2026 07:22:07 +0000 (00:22 -0700)] 
firmware: stratix10-svc: Don't fail probe when async ops unsupported

When the ATF version is too old to support SIP SVC v3 asynchronous
operations (e.g. ATF 2.5), stratix10_svc_async_init() returns
-EOPNOTSUPP. The probe function currently treats any non-zero return
as fatal and aborts, logging:

  stratix10-svc firmware:svc: Intel Service Layer Driver: ATF version \
    is not compatible for async operation
  stratix10-svc firmware:svc: probe with driver stratix10-svc failed \
    with error -95

This prevents the SVC driver from loading entirely, causing all
dependent client drivers (hwmon, RSU, FCS) to also fail to probe even
though they can operate correctly via the synchronous V1 SMC path.

Fix this by treating -EOPNOTSUPP from stratix10_svc_async_init() as a
non-fatal degraded condition. The driver loads in sync-only mode and
logs:

  stratix10-svc firmware:svc: Intel Service Layer Driver Initialized \
    (sync-only mode)

Fixes: bcb9f4f07061 ("firmware: stratix10-svc: Add support for async communication")
Cc: stable@vger.kernel.org
Signed-off-by: Muhammad Amirul Asyraf Mohamad Jamian <muhammad.amirul.asyraf.mohamad.jamian@altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
4 weeks agofirmware: stratix10-svc: Return -EOPNOTSUPP when ATF async unsupported
Muhammad Amirul Asyraf Mohamad Jamian [Thu, 16 Apr 2026 07:22:06 +0000 (00:22 -0700)] 
firmware: stratix10-svc: Return -EOPNOTSUPP when ATF async unsupported

Add a 'supported' flag to struct stratix10_async_ctrl to indicate
whether the secure firmware supports SIP SVC v3 asynchronous
communication. When the ATF version check in stratix10_svc_async_init()
fails, set supported=false and return -EOPNOTSUPP instead of -EINVAL.

This allows callers to distinguish between "async not supported by this
ATF version" (-EOPNOTSUPP) and "programming error / bad argument"
(-EINVAL), and take appropriate action (e.g. fall back to synchronous
V1 SMC path) rather than treating both as fatal.

Also update stratix10_svc_add_async_client() to return -EOPNOTSUPP
immediately when async is not supported, rather than -EINVAL from the
!actrl->initialized check, so client drivers receive a consistent and
meaningful error code.

This patch is a prerequisite for the following fix and must be applied
together with it to correctly restore functionality on old ATF versions.

Fixes: bcb9f4f07061 ("firmware: stratix10-svc: Add support for async communication")
Cc: stable@vger.kernel.org
Suggested-by: Anders Hedlund <anders.hedlund@windriver.com>
Signed-off-by: Mahesh Rao <mahesh.rao@altera.com>
Signed-off-by: Muhammad Amirul Asyraf Mohamad Jamian <muhammad.amirul.asyraf.mohamad.jamian@altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
4 weeks agomedia: ti: j721e-csi2rx: Fix error handling for media_entity_remote_source_pad_unique()
Chen Ni [Fri, 22 May 2026 01:57:34 +0000 (09:57 +0800)] 
media: ti: j721e-csi2rx: Fix error handling for media_entity_remote_source_pad_unique()

The media_entity_remote_source_pad_unique() function returns an error
pointer on failure, not NULL. Fix the check to use IS_ERR() and return
PTR_ERR() to correctly handle allocation failures.

Fixes: 982135c0eac6 ("media: ti: j721e-csi2rx: add a subdev for the core device")
Fixes: 3ed9c0a1fdba ("media: ti: j721e-csi2rx: add multistream support")
Signed-off-by: Chen Ni <nichen@iscas.ac.cn>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
4 weeks agomedia: ti: j721e-csi2rx: Minor cleanup of loop variables
Rishikesh Donadkar [Wed, 20 May 2026 13:57:05 +0000 (19:27 +0530)] 
media: ti: j721e-csi2rx: Minor cleanup of loop variables

Replace open-coded `i--; for (; i >= 0; i--)` patterns with the
idiomatic `while (i--)` in the error unwind paths of
csi_async_notifier_complete() and ti_csi2rx_probe().

Also scope loop variables directly in the for statement instead of
declaring them at the top of the function in ti_csi2rx_suspend(),
ti_csi2rx_resume() and ti_csi2rx_remove(). Change the type to
unsigned int in the first two to match csi->num_ctx.

Signed-off-by: Rishikesh Donadkar <r-donadkar@ti.com>
Reviewed-by: Jai Luthra <jai.luthra@ideasonboard.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
4 weeks agomedia: pci: intel: Add CVS support for IPU bridge driver
Miguel Vadillo [Wed, 27 May 2026 17:05:30 +0000 (10:05 -0700)] 
media: pci: intel: Add CVS support for IPU bridge driver

CVS is located between IPU device and sensors and is available in
existing commercial platforms from multiple OEMs. The connection
information between them in firmware is not enough to build a V4L2
connection graph. This patch parses the connection properties from the
SSDB buffer in DSDT and builds the connection using software nodes.

From the IPU bridge point of view, CVS is just like IVSC.

Signed-off-by: Miguel Vadillo <miguel.vadillo@intel.com>
Tested-by: Mehdi Djait <mehdi.djait@linux.intel.com> # Dell XPS 13 9350 + IPU7
Reviewed-by: Mehdi Djait <mehdi.djait@linux.intel.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
4 weeks agomedia: i2c: cvs: Add driver of Intel Computer Vision Sensing Controller(CVS)
Miguel Vadillo [Wed, 27 May 2026 17:05:29 +0000 (10:05 -0700)] 
media: i2c: cvs: Add driver of Intel Computer Vision Sensing Controller(CVS)

Add driver for Intel Computer Vision Sensing (CVS) devices found on
Intel Luna Lake (LNL), Panther Lake (PTL), and Arrow Lake (ARL)
platforms.

The CVS device acts as a V4L2 sub-device bridge that manages CSI-2
link ownership between the host (Linux) and firmware for camera
sensors. It provides:

- Query the device status via sysfs interface
- CSI-2 link ownership arbitration between host and CVS firmware
- MIPI CSI-2 configuration management
- Privacy LED control coordination
- Power management integration with runtime PM

The driver consists of two main components:
  core.c: Core driver with probe, command transport, and power management
  v4l2.c: V4L2 sub-device and media framework integration

Hardware Interface:
- I2C for command/control communication with device firmware
- GPIO signals for ownership handshaking (request/response)
- Optional reset and wake interrupt for full-capability variants
- Integration with Intel IPU via ipu_bridge

The driver supports two hardware capability levels:
- Light capability: Basic GPIO-based ownership (2 GPIOs)
- Full capability: Enhanced with reset control and wake IRQ (4 GPIOs)

Device-specific quirks are handled via a quirk table to accommodate
variations across different CVS implementations (Lattice, Synaptics).

In addition to I2C-based operation, the driver supports platform
device instantiation for systems where CVS is exposed without I2C
transport, falling back to GPIO-only ownership control.

The CVS driver integrates with the IPU bridge for automatic device
discovery via ACPI on supported platforms.

PCI device IDs for Intel IPU7 (0x645d, shared by MTL and LNL) and
IPU7.5 (0xb05d, shared by ARL and PTL) are included in the
driver-local icvs_pci_tbl lookup table, enabling CVS to locate these
IPU variants without modifying the shared ipu6-pci-table header.

A PM runtime device link is established between IPU (consumer) and CVS
(supplier) so that the PM framework automatically resumes CVS before
IPU begins streaming, triggering cvs_runtime_resume() to claim CSI-2
link ownership. Ownership is released via cvs_runtime_suspend() after
the autosuspend delay.

Signed-off-by: Miguel Vadillo <miguel.vadillo@intel.com>
Tested-by: Mehdi Djait <mehdi.djait@linux.intel.com> # Dell XPS 13 9350 + IPU7
Reviewed-by: Mehdi Djait <mehdi.djait@linux.intel.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
4 weeks agoASoC: Intel: catpt: Error handling and debug improvements
Mark Brown [Thu, 28 May 2026 18:12:52 +0000 (19:12 +0100)] 
ASoC: Intel: catpt: Error handling and debug improvements

Cezary Rojewski <cezary.rojewski@intel.com> says:

Outcome of a long debug to solve one, long-standing bug ocurring very
rarely on Haswell/Broadwell machines during the boot procedure of the
AudioDSP firmware.  Clever/unfortunate user can increase the
reproduction rare to 100%.

The bug: an exception occurring early during FW boot (firmware side, not
the software one) leaves the firmware hanging and the existing software
code is incappable of recognizing such problem.  The only solution a
user currently has is: rmmod and then modprobe the driver.

Recently, together with Krzysztof from the firmware team decided to take
it up and clear the dashboard.

The exception handling takes just a few lines of code (all part of the
first patch), everything else that this patchset is composed of improves
the debugability and logging.  If anything similar pops up, the
developers can see what's going on.

Link: https://patch.msgid.link/20260528083444.1439233-1-cezary.rojewski@intel.com
4 weeks agoASoC: Intel: catpt: Print error code if board-registration fails
Cezary Rojewski [Thu, 28 May 2026 08:34:44 +0000 (10:34 +0200)] 
ASoC: Intel: catpt: Print error code if board-registration fails

Message alone without the code does not tell us much.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://patch.msgid.link/20260528083444.1439233-4-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
4 weeks agoASoC: Intel: catpt: Add pretty-trace for large IPC payloads
Cezary Rojewski [Thu, 28 May 2026 08:34:43 +0000 (10:34 +0200)] 
ASoC: Intel: catpt: Add pretty-trace for large IPC payloads

Mimic mechanism found in the Intel's avs-driver and update the existing
IPC payload tracing to allow for pretty printing even large payloads.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://patch.msgid.link/20260528083444.1439233-3-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
4 weeks agoASoC: Intel: catpt: Complete coredump handling
Cezary Rojewski [Thu, 28 May 2026 08:34:42 +0000 (10:34 +0200)] 
ASoC: Intel: catpt: Complete coredump handling

An exception may occur during the firmware booting procedure.  In such
case the firmware sends COREDUMP_REQUESTS and expects the driver to dump
relevant information and finish with the COREDUMP_RELEASE write.

To distinguish such situation from generic timeout, always signal
fw_ready completion when a coredump request is received and translate
it to -EREMOTEIO in catpt_boot_firmware().

The "FW READY" print makes the success clearly visible even when
the event-traces are not enabled.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://patch.msgid.link/20260528083444.1439233-2-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
4 weeks agoKVM: arm64: Remove @arch from __load_stage2()
Zenghui Yu (Huawei) [Wed, 18 Mar 2026 14:43:05 +0000 (22:43 +0800)] 
KVM: arm64: Remove @arch from __load_stage2()

Since commit fe49fd940e22 ("KVM: arm64: Move VTCR_EL2 into struct s2_mmu"),
@arch is no longer required to obtain the per-kvm_s2_mmu vtcr and can be
removed from __load_stage2().

Signed-off-by: Zenghui Yu (Huawei) <zenghui.yu@linux.dev>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Link: https://patch.msgid.link/20260318144305.56831-1-zenghui.yu@linux.dev
Signed-off-by: Marc Zyngier <maz@kernel.org>
4 weeks agodrm/nouveau/gsp: formally support GA100
Timur Tabi [Thu, 30 Apr 2026 22:38:38 +0000 (17:38 -0500)] 
drm/nouveau/gsp: formally support GA100

Now that Nouveau supports GA100 properly, it should no longer require
the NvEnableUnsupportedChipsets parameter in order to enable it.

Signed-off-by: Timur Tabi <ttabi@nvidia.com>
Link: https://patch.msgid.link/20260430223838.2530778-11-ttabi@nvidia.com
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
4 weeks agodrm/nouveau/gsp: require GSP-RM for GA100 support
Timur Tabi [Thu, 30 Apr 2026 22:38:37 +0000 (17:38 -0500)] 
drm/nouveau/gsp: require GSP-RM for GA100 support

Nouveau supports Turing and Ampere GPUs with or without GSP-RM.
Support without GSP-RM is mostly academic, since GSP-RM is
needed to run the GPU at full clocks.  It is also the default
mode for these GPUs.

GA100 is a special case, however.  The current code has some support
for running GA100 without GSP-RM, but several features are missing.
More importantly, some required firmware images like ucode_ahesasc.bin
are not available and would need to be provided by Nvidia.

To prevent Nouveau from even trying to boot on GA100 without GSP-RM,
remove the non-GSP fallback option in the ga100_gsps[] array.

Signed-off-by: Timur Tabi <ttabi@nvidia.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Link: https://patch.msgid.link/20260430223838.2530778-10-ttabi@nvidia.com
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
4 weeks agodrm/nouveau/bios: skip the IFR header if present
Timur Tabi [Thu, 30 Apr 2026 22:38:36 +0000 (17:38 -0500)] 
drm/nouveau/bios: skip the IFR header if present

The GPU's ROM may begin with an Init-from-ROM (IFR) header that precedes
the PCI Expansion ROM images (VBIOS).  When present, the PROM shadow
method must parse this header to determine the offset where the PCI ROM
images actually begin, and adjust all subsequent reads accordingly.

On most GPUs this is not needed because either the PRAMIN shadow method
(which reads from VRAM via the display engine) succeeds first, or the IFR
microcode has already applied the ROM offset so that PROM reads
transparently skip the header.  However, on GA100 neither of these
applies: GA100 has no display engine (so PRAMIN is unavailable), and the
IFR offset is not applied to PROM reads on this GPU.

Signed-off-by: Timur Tabi <ttabi@nvidia.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Link: https://patch.msgid.link/20260430223838.2530778-9-ttabi@nvidia.com
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
4 weeks agodrm/nouveau/bios: specify correct display fuse register for Ampere and Ada
Timur Tabi [Thu, 30 Apr 2026 22:38:35 +0000 (17:38 -0500)] 
drm/nouveau/bios: specify correct display fuse register for Ampere and Ada

The NV_FUSE_STATUS_OPT_DISPLAY register is used to determine whether
the GPU has display hardware.  The current code that normally reads
this register is instead hard-coded to check for GA100 vs later GPUs.
Since this function is called only on pre-Hopper GPUs, and this
if-statement applies only to GA100 and later, the check works
because GA100 is the only non-display Ampere and Ada GPU.

However, there actually is a register that can be read, so we should
use it.

Fixes: a34632482f1e ("drm/nouveau/bios/ga10[024]: initial support")
Signed-off-by: Timur Tabi <ttabi@nvidia.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Link: https://patch.msgid.link/20260430223838.2530778-8-ttabi@nvidia.com
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
4 weeks agodrm/nouveau: GA100 has an FRTS region size of zero
Timur Tabi [Thu, 30 Apr 2026 22:38:34 +0000 (17:38 -0500)] 
drm/nouveau: GA100 has an FRTS region size of zero

When booting with GSP-RM, the FRTS data region normally needs to be
allocated.  However, on GA100, this region is not used and so its
size needs to be set to zero.

The truth is that GA100 is just special, and the simplest way to
determine the proper FRTS data region size is to check for this
GPU specifically.

Signed-off-by: Timur Tabi <ttabi@nvidia.com>
Link: https://patch.msgid.link/20260430223838.2530778-7-ttabi@nvidia.com
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
4 weeks agodrm/nouveau: only boot FRTS if its region is allocated
Timur Tabi [Thu, 30 Apr 2026 22:38:33 +0000 (17:38 -0500)] 
drm/nouveau: only boot FRTS if its region is allocated

On some Nvidia GPUs (i.e. GA100), the FRTS region is not allocated
(its size is set to 0).  In such cases, FWSEC-FRTS should not be run.

Signed-off-by: Timur Tabi <ttabi@nvidia.com>
Link: https://patch.msgid.link/20260430223838.2530778-6-ttabi@nvidia.com
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
4 weeks agodrm/nouveau/gsp: read MMU_LOCK to fix WPR placement on GA100
Timur Tabi [Thu, 30 Apr 2026 22:38:32 +0000 (17:38 -0500)] 
drm/nouveau/gsp: read MMU_LOCK to fix WPR placement on GA100

On GA100, the row remapper hardware reserves a small amount of DRAM at
the end of framebuffer for spare rows used to repair memory errors at
runtime.  When an uncorrectable ECC error is detected in a DRAM row,
the row remapper redirects accesses to a spare row, transparently
repairing the fault.

The LOCAL_MEMORY_RANGE register (0x100ce0) reports the GPU's FB address
range, but its encoding rounds to 1GB boundaries.  On GA100, VBIOS
originally rounded this value down, which could lose up to ~1GB of
usable FB.  As a workaround, newer VBIOS instead rounds up to the next
1GB boundary and programs MMU_LOCK (registers 0x1fa82c/0x1fa830) to
mark the gap between the actual usable FB and the rounded-up range as
reserved.

OpenRM's kgspCalculateFbLayout_TU102() handles this by reading the
MMU_LOCK registers and computing the WPR top boundary as:

    vbiosReservedOffset = min(mmuLockLo, vgaWorkspaceOffset)

Without this, the WPR region is placed at the top of LOCAL_MEMORY_RANGE,
which overlaps the reserved region.  The booter firmware detects this
and rejects the WPR layout.

Add ga100_gsp_mmu_lock_lo() to read the MMU_LOCK range and clamp
gsp->fb.bios.addr accordingly, mirroring OpenRM's behavior.

This is a GA100-only issue.  GA102 and later add the
NV_USABLE_FB_SIZE_IN_MB register which reports the correct usable FB
size directly, eliminating the need for the MMU_LOCK workaround.

Signed-off-by: Timur Tabi <ttabi@nvidia.com>
Link: https://patch.msgid.link/20260430223838.2530778-5-ttabi@nvidia.com
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
4 weeks agodrm/nouveau/gsp: use fb.bios.addr for gspFwWprEnd instead of vga_workspace.addr
Timur Tabi [Thu, 30 Apr 2026 22:38:31 +0000 (17:38 -0500)] 
drm/nouveau/gsp: use fb.bios.addr for gspFwWprEnd instead of vga_workspace.addr

In OpenRM's kgspCalculateFbLayout_TU102(), gspFwWprEnd is derived from
vbiosReservedOffset, which is computed as:

    vbiosReservedOffset = min(mmuLockLo, vgaWorkspaceOffset)

The VGA workspace offset is one input into this calculation, not the
direct source of gspFwWprEnd.  vbiosReservedOffset is the effective
top boundary for WPR2 placement, and it may be lower than the VGA
workspace when VBIOS has locked a region via MMU_LOCK.

In Nouveau, gsp->fb.bios.addr is the equivalent of vbiosReservedOffset,
while gsp->fb.bios.vga_workspace.addr corresponds to the raw VGA
workspace location.  The original code assigned vga_workspace.addr to
gspFwWprEnd, which produced the correct result only because bios.addr
was always set equal to vga_workspace.addr and never adjusted.

Use gsp->fb.bios.addr for gspFwWprEnd to correctly mirror OpenRM's
layout logic, so that future adjustments to bios.addr (such as clamping
it to an MMU_LOCK boundary) are properly reflected in the WPR metadata
passed to the booter.

Signed-off-by: Timur Tabi <ttabi@nvidia.com>
Link: https://patch.msgid.link/20260430223838.2530778-4-ttabi@nvidia.com
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
4 weeks agodrm/nouveau/gsp: add SEC2 to GA100 chip table
Timur Tabi [Thu, 30 Apr 2026 22:38:30 +0000 (17:38 -0500)] 
drm/nouveau/gsp: add SEC2 to GA100 chip table

The booter-load and booter-unload firmware run on the SEC2 falcon.
During tu102_gsp_oneinit(), the booter constructor needs device->sec2
to access the SEC2 falcon.

Without the .sec2 entry, device->sec2 is NULL and this dereference
crashes during GSP-RM boot.

Signed-off-by: Timur Tabi <ttabi@nvidia.com>
Link: https://patch.msgid.link/20260430223838.2530778-3-ttabi@nvidia.com
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
4 weeks agoscripts: modpost: detect and report truncated buf_printf() output
Alexandre Courbot [Wed, 27 May 2026 11:52:17 +0000 (20:52 +0900)] 
scripts: modpost: detect and report truncated buf_printf() output

buf_printf() uses a fixed-size stack buffer. vsnprintf() returns the
number of bytes that *would* have been written to that buffer, which can
be larger than the size of said buffer if the formatted string is too
long.

The problem is that whenever this happens buf_printf() currently passes
this length, unchecked, to buf_write(), which silently reads past the
stack buffer and copies invalid data into the output buffer.

Fix this by detecting vsnprintf() failures and truncations before
appending to the output buffer, and report a fatal error instead of
producing corrupt symbol names.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Link: https://patch.msgid.link/20260527-nova-exports-v2-1-06de4c556d55@nvidia.com
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
4 weeks agokbuild: rpm-pkg: append %{?dist} macro to Release tag
Yafang Shao [Tue, 26 May 2026 06:27:32 +0000 (14:27 +0800)] 
kbuild: rpm-pkg: append %{?dist} macro to Release tag

Add support for the %{?dist} macro in the kernel.spec file. This enables
building and releasing kernel RPMs with a custom distribution suffix
(e.g., via rpmbuild's --define option) to better match production
environment tracking.

Signed-off-by: Yafang Shao <laoar.shao@gmail.com>
Link: https://patch.msgid.link/20260526062732.84006-1-laoar.shao@gmail.com
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
4 weeks agonouveau/gsp/rm: cleanup remaining IS_ERR_OR_NULL usage
Hongling Zeng [Thu, 28 May 2026 06:24:51 +0000 (14:24 +0800)] 
nouveau/gsp/rm: cleanup remaining IS_ERR_OR_NULL usage

Clean up the remaining IS_ERR_OR_NULL() checks in ctrl.c and rpc.c.
The underlying functions return error pointers, so IS_ERR() is
sufficient.

This affects:
- r535_gsp_rpc_ctrl() in ctrl.c
- r535_gsp_rpc_ctor() in rpc.c

Signed-off-by: Hongling Zeng <zenghongling@kylinos.cn>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Link: https://patch.msgid.link/20260528062451.54107-6-zenghongling@kylinos.cn
Reviewed-by: Lyude Paul <lyude@redhat.com>
4 weeks agonouveau/gsp/rm: cleanup WARN_ON(IS_ERR_OR_NULL)
Hongling Zeng [Thu, 28 May 2026 06:24:50 +0000 (14:24 +0800)] 
nouveau/gsp/rm: cleanup WARN_ON(IS_ERR_OR_NULL)

Replace WARN_ON(IS_ERR_OR_NULL()) with WARN_ON(IS_ERR()) in various
GSP-RM files. The underlying functions return error pointers, so
checking for NULL is redundant.

This affects:
- r535_bar_bar2_update_pde() in bar.c

Signed-off-by: Hongling Zeng <zenghongling@kylinos.cn>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Link: https://patch.msgid.link/20260528062451.54107-5-zenghongling@kylinos.cn
Reviewed-by: Lyude Paul <lyude@redhat.com>
4 weeks agonouveau/gsp/rm: cleanup IS_ERR_OR_NULL in core implementation
Hongling Zeng [Thu, 28 May 2026 06:24:49 +0000 (14:24 +0800)] 
nouveau/gsp/rm: cleanup IS_ERR_OR_NULL in core implementation

Clean up IS_ERR_OR_NULL() checks in the core RPC and alloc
implementation files. The underlying functions return error pointers,
so IS_ERR() is sufficient.

This affects:
- r535_gsp_rpc_rm_free() in alloc.c
- r535_gsp_rpc_rm_alloc_push() in alloc.c
- r535_gsp_msgq_recv() in rpc.c

Signed-off-by: Hongling Zeng <zenghongling@kylinos.cn>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Link: https://patch.msgid.link/20260528062451.54107-4-zenghongling@kylinos.cn
Reviewed-by: Lyude Paul <lyude@redhat.com>
4 weeks agonouveau/gsp: cleanup IS_ERR_OR_NULL in rpc_rd
Hongling Zeng [Thu, 28 May 2026 06:24:48 +0000 (14:24 +0800)] 
nouveau/gsp: cleanup IS_ERR_OR_NULL in rpc_rd

The underlying nvkm_gsp_rpc_get() function returns error pointers,
so checking for NULL with IS_ERR_OR_NULL() is redundant. Use IS_ERR()
instead.

This affects nvkm_gsp_rpc_rd().

Signed-off-by: Hongling Zeng <zenghongling@kylinos.cn>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Link: https://patch.msgid.link/20260528062451.54107-3-zenghongling@kylinos.cn
Reviewed-by: Lyude Paul <lyude@redhat.com>
4 weeks agonouveau/gsp: cleanup IS_ERR_OR_NULL in rm_alloc functions
Hongling Zeng [Thu, 28 May 2026 06:24:47 +0000 (14:24 +0800)] 
nouveau/gsp: cleanup IS_ERR_OR_NULL in rm_alloc functions

The underlying functions already return error pointers, so checking for
NULL with IS_ERR_OR_NULL() is redundant. Use IS_ERR() instead.

This affects:
- nvkm_gsp_rm_alloc_get()
- nvkm_gsp_rm_alloc()

Signed-off-by: Hongling Zeng <zenghongling@kylinos.cn>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Link: https://patch.msgid.link/20260528062451.54107-2-zenghongling@kylinos.cn
Reviewed-by: Lyude Paul <lyude@redhat.com>
4 weeks agotimers/migration: Update stale @online doc to @available
Zhan Xusheng [Tue, 26 May 2026 02:21:06 +0000 (10:21 +0800)] 
timers/migration: Update stale @online doc to @available

Commit 8312cab5ff47 ("timers/migration: Rename 'online' bit to
'available'") renamed the 'online' field of struct tmigr_cpu to
'available'. The kernel doc comment above the struct still describes the
old field name.

Update it to reflect the actual field name and use the 'available' wording
in the description.

Fixes: 8312cab5ff47 ("timers/migration: Rename 'online' bit to 'available'")
Signed-off-by: Zhan Xusheng <zhanxusheng@xiaomi.com>
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Link: https://patch.msgid.link/20260526022106.1302279-1-zhanxusheng@xiaomi.com
4 weeks agoHID: wacom: Fix OOB write in wacom_hid_set_device_mode()
Lee Jones [Wed, 27 May 2026 16:05:26 +0000 (17:05 +0100)] 
HID: wacom: Fix OOB write in wacom_hid_set_device_mode()

wacom_hid_set_device_mode() currently assumes that the HID_DG_INPUTMODE
usage is always located in the first field (field[0]) of the feature report.
However, a device can specify HID_DG_INPUTMODE in a different field.

If HID_DG_INPUTMODE is in a field other than the first one and the first
field has a report_count smaller than the usage_index of HID_DG_INPUTMODE,
this leads to an out-of-bounds write to r->field[0]->value.

Fix this by storing the field index of HID_DG_INPUTMODE in 'struct
hid_data' during feature mapping.  In wacom_hid_set_device_mode(), use
this stored field index to access the correct field and add bounds
checks to ensure both the field index and the value index are within
valid ranges before writing.

Cc: stable@vger.kernel.org
Fixes: 5ae6e89f7409 ("HID: wacom: implement the finger part of the HID generic handling")
Tested-by: Ping Cheng <ping.cheng@wacom.com>
Reviewed-by: Ping Cheng <ping.cheng@wacom.com>
Signed-off-by: Lee Jones <lee@kernel.org>
Signed-off-by: Benjamin Tissoires <bentiss@kernel.org>
4 weeks agocgroup: pair max limit READ_ONCE() with WRITE_ONCE()
Ren Tamura [Thu, 28 May 2026 04:28:39 +0000 (13:28 +0900)] 
cgroup: pair max limit READ_ONCE() with WRITE_ONCE()

cgroup.max.descendants and cgroup.max.depth are shown through seq_file.
Their show callbacks read cgrp->max_descendants and cgrp->max_depth with
READ_ONCE(), respectively.

The corresponding write callbacks update the same scalar fields while
holding the cgroup lock, but the seq_file show path does not serialize
against those stores. This leaves the lockless show-side loads annotated
with READ_ONCE(), while the corresponding stores remain plain stores.

Use WRITE_ONCE() for the updates so the intended lockless access is marked
consistently on both sides. This does not change locking, ordering, or
user-visible semantics.

Assisted-by: OpenAI-Codex:gpt-5.5
Signed-off-by: Ren Tamura <ren.tamura.oss@gmail.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
4 weeks agoMAINTAINERS: BITOPS: include bitrev.[ch]
Yury Norov [Wed, 6 May 2026 17:52:06 +0000 (13:52 -0400)] 
MAINTAINERS: BITOPS: include bitrev.[ch]

Arch bitrev API is covered in MAINTAINERS under the BITOPS entry,
while generic bitrev is unmaintained. Move it under BITOPS too.

Signed-off-by: Yury Norov <ynorov@nvidia.com>
4 weeks agoarch/riscv: Add bitrev.h file to support rev8 and brev8
Jinjie Ruan [Wed, 6 May 2026 17:52:05 +0000 (13:52 -0400)] 
arch/riscv: Add bitrev.h file to support rev8 and brev8

The RISC-V Bit-manipulation Extension for Cryptography (Zbkb) provides
the 'brev8' instruction, which reverses the bits within each byte.
Combined with the 'rev8' instruction (from Zbb or Zbkb), which reverses
the byte order of a register, we can efficiently implement 16-bit,
32-bit, and (on RV64) 64-bit bit reversal.

This is significantly faster than the default software table-lookup
implementation in lib/bitrev.c, as it replaces memory accesses and
multiple arithmetic operations with just two or three hardware
instructions.

Select HAVE_ARCH_BITREVERSE as well as GENERIC_BITREVERSE,
and provide <asm/bitrev.h> to utilize these instructions when
the Zbkb extension is available at runtime via the alternatives
mechanism.

[Yury: select the options conditionally on BITREVERSE]

Link: https://docs.riscv.org/reference/isa/unpriv/b-st-ext.html
Suggested-by: David Laight <david.laight.linux@gmail.com>
Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Signed-off-by: Yury Norov <ynorov@nvidia.com>
4 weeks agobitops: Define generic___bitrev8/16/32 for reuse
Jinjie Ruan [Wed, 6 May 2026 17:52:04 +0000 (13:52 -0400)] 
bitops: Define generic___bitrev8/16/32 for reuse

Define generic___bitrev8/16/32 using the implementation in
<linux/bitrev.h>, so they can be reused in <asm/bitrev.h>,
such as RISCV.

Reviewed-by: Yury Norov <ynorov@nvidia.com>
Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Signed-off-by: Yury Norov <ynorov@nvidia.com>
4 weeks agolib/bitrev: Introduce GENERIC_BITREVERSE
Yury Norov [Wed, 6 May 2026 17:52:03 +0000 (13:52 -0400)] 
lib/bitrev: Introduce GENERIC_BITREVERSE

The generic bit reversal implementation is controlled by
!HAVE_ARCH_BITREVERSE. This makes it difficult for architectures to
provide a hardware-accelerated implementation while being able to
fall back to the generic version if needed.

This patch adds GENERIC_BITREVERSE, so bitreverse API is controlled by
BITREVERSE, GENERIC_BITREVERSE and HAVE_ARCH_BITREVERSE options. The
relationship between them is described as follows:

 - BITREVERSE is selected by user code; it's required to generate the API;
 - Architectures may select HAVE_ARCH_BITREVERSE and provide an arch
   implementation in arch/$(ARCH)/include/asm/bitrev.h.
 - if HAVE_ARCH_BITREVERSE isn't set, BITREVERSE selects GENERIC_BITREVERSE;
 - if GENERIC_BITREVERSE is set and HAVE_ARCH_BITREVERSE is not, the kernel
   provides generic implementation only, and wires bitrevXX() to it.
 - if HAVE_ARCH_BITREVERSE is set and GENERIC_BITREVERSE is not, the arch
   code provides __arch_bitrevXX(), and it is wired to bitrevXX();
 - if both GENERIC_BITREVERSE and HAVE_ARCH_BITREVERSE are selected, the kernel
   generates generic___bitrev(), but wires bitrev() to the __arch_bitrev().

The last option allows architectures to use generic___bitrev() as a
fallback option.

Drivers and core code should never select GENERIC_BITREVERSE or
HAVE_ARCH_BITREVERSE explicitly.

Architectures that require generic bitreverse API as a fallback should
explicitly enable GENERIC_BITREVERSE together with HAVE_ARCH_BITREVERSE.

Signed-off-by: Yury Norov <ynorov@nvidia.com>
4 weeks agoarch: select HAVE_ARCH_BITREVERSE conditionally on BITREVERSE
Yury Norov [Wed, 6 May 2026 17:52:02 +0000 (13:52 -0400)] 
arch: select HAVE_ARCH_BITREVERSE conditionally on BITREVERSE

Architectures may have bit reversal instructions, but if the API not
needed, the corresponding option should not be selected because it may
lead to generating the unneeded code.

Signed-off-by: Yury Norov <ynorov@nvidia.com>
4 weeks agobitmap: fix find helper documentation
Yury Norov [Thu, 21 May 2026 16:03:45 +0000 (12:03 -0400)] 
bitmap: fix find helper documentation

find_nth_and_bit() and find_nth_and_andnot_bit() may return a value
greater than @size when the requested bit does not exist, matching
find_nth_bit(). Document that correctly. All current users are safe
against the '>=' vs '==' conditions.

Also fix the for_each_clear_bitrange_from() parameter descriptions so
they describe clear ranges instead of set ranges.

Signed-off-by: Yury Norov <ynorov@nvidia.com>
4 weeks agobitmap: drop bitmap_print_to_pagebuf()
Yury Norov [Tue, 19 May 2026 16:30:57 +0000 (12:30 -0400)] 
bitmap: drop bitmap_print_to_pagebuf()

Now that all users of bitmap_print_to_pagebuf() are switched to the
alternatives, drop the function.

Signed-off-by: Yury Norov <ynorov@nvidia.com>
4 weeks agocpumask: switch cpumap_print_to_pagebuf() to using scnprintf()
Yury Norov [Tue, 19 May 2026 16:30:56 +0000 (12:30 -0400)] 
cpumask: switch cpumap_print_to_pagebuf() to using scnprintf()

In preparation for removing bitmap_print_to_pagebuf(), switch
cpumap_print_to_pagebuf() to using scnprintf("%*pbl").

Signed-off-by: Yury Norov <ynorov@nvidia.com>
4 weeks agonvme: add support multipath passthrough iostats
Keith Busch [Thu, 28 May 2026 01:00:41 +0000 (18:00 -0700)] 
nvme: add support multipath passthrough iostats

Don't skip the io accounting for passthrough commands if the user
enabled tracking these.

Reviewed-by: Nilay Shroff <nilay@linux.ibm.com>
Reviewed-by: Nitesh Shetty <nj.shetty@samsung.com>
Signed-off-by: Keith Busch <kbusch@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Link: https://patch.msgid.link/20260528010041.1533124-3-kbusch@meta.com
Signed-off-by: Jens Axboe <axboe@kernel.dk>
4 weeks agoblock: export passthrough stats enabled
Keith Busch [Thu, 28 May 2026 01:00:40 +0000 (18:00 -0700)] 
block: export passthrough stats enabled

A user can enable io accounting for passthrough requests, so export the
helper that checks if the request should be tracked. This will enable
stacking drivers to to report iostats for passthrough workloads. Since
the stacking request_queue may not be the one providing the request, the
API has to add a parameter for the caller to specify which one to check.

Reviewed-by: Nilay Shroff <nilay@linux.ibm.com>
Reviewed-by: Nitesh Shetty <nj.shetty@samsung.com>
Signed-off-by: Keith Busch <kbusch@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Link: https://patch.msgid.link/20260528010041.1533124-2-kbusch@meta.com
Signed-off-by: Jens Axboe <axboe@kernel.dk>
4 weeks agodrm/tegra: Fix iommu_map_sgtable() return value check
Mikko Perttunen [Tue, 21 Apr 2026 04:02:37 +0000 (13:02 +0900)] 
drm/tegra: Fix iommu_map_sgtable() return value check

Commit "iommu: return full error code from iommu_map_sg[_atomic]()"
changed iommu_map_sgtable() to return an ssize_t and negative values
in error cases, rather than a size_t and a zero.

Update tegra_bo_iommu_map() to correctly check for errors from
iommu_map_sgtable.

Fixes: ad8f36e4b6b1 ("iommu: return full error code from iommu_map_sg[_atomic]()")
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patch.msgid.link/20260421-iommu_map_sgtable-return-v1-2-fb484c07d2a1@nvidia.com
4 weeks agogpu: host1x: Fix iommu_map_sgtable() return value check
Mikko Perttunen [Tue, 21 Apr 2026 04:02:36 +0000 (13:02 +0900)] 
gpu: host1x: Fix iommu_map_sgtable() return value check

Commit "iommu: return full error code from iommu_map_sg[_atomic]()"
changed iommu_map_sgtable() to return an ssize_t and negative values
in error cases, rather than a size_t and a zero.

pin_job() also was incorrectly assigning to 'int', which could cause
overflows into negative values.

Update pin_job() to correctly check for errors from iommu_map_sgtable.

Fixes: ad8f36e4b6b1 ("iommu: return full error code from iommu_map_sg[_atomic]()")
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patch.msgid.link/20260421-iommu_map_sgtable-return-v1-1-fb484c07d2a1@nvidia.com
4 weeks agogpu: host1x: Fix missing 'host1x_context_device_bus_type'
Ben Dooks [Fri, 9 Jan 2026 12:45:07 +0000 (12:45 +0000)] 
gpu: host1x: Fix missing 'host1x_context_device_bus_type'

The drivers/gpu/host1x/context_bus.c does not include any declaration of
host1x_context_device_bus_type, and after including "context.h" it also
showed that there are two definitions in the kernel because the extern
declaration was missing the const qualifier.

Include linux/host1x_context_bus.h and drop the wrong declaration from
context.h. While at it, also predeclare struct host1x_memory_context.

Fixes the following sparse warning:

    drivers/gpu/host1x/context_bus.c:9:23: warning: symbol 'host1x_context_device_bus_type' was not declared. Should it be static?

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
[treding@nvidia.com: minor fixups, reword commit message to reflect changes]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patch.msgid.link/20260123140512.609167-1-ben.dooks@codethink.co.uk
4 weeks agodrm/tegra: dc: Fix device node reference leak in tegra_dc_has_output()
Felix Gu [Tue, 27 Jan 2026 16:43:10 +0000 (00:43 +0800)] 
drm/tegra: dc: Fix device node reference leak in tegra_dc_has_output()

The of_for_each_phandle() macro increments the reference count of the
device node it iterates over. If the loop exits early, the reference must
be released manually.

In tegra_dc_has_output(), the function returns true immediately when a
match is found, failing to release the current node's reference.

Fix this by adding a call to of_node_put() before returning from the loop.

Fixes: c57997bce423 ("drm/tegra: sor: Add Tegra186 support")
Signed-off-by: Felix Gu <ustc.gu@gmail.com>
Acked-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patch.msgid.link/20260128-dc-v1-1-a88205826301@gmail.com
4 weeks agodrm/tegra: Enable cmu for Tegra186 and Tegra194
Aaron Kling [Tue, 7 Apr 2026 07:09:37 +0000 (02:09 -0500)] 
drm/tegra: Enable cmu for Tegra186 and Tegra194

Without the cmu, nvdisplay will display colors that are notably darker
than intended. The vendor bootloader and the downstream display driver
enable the cmu and sets a sRGB table. Loading that table here results in
the intended colors.

Co-developed-by: Kurt Kiefer <kekiefer@gmail.com>
Signed-off-by: Kurt Kiefer <kekiefer@gmail.com>
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Tested-by: Jasper Korten <jja2000@gmail.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com> # Jetson AGX Xavier
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patch.msgid.link/20260407-tegra-drm-cmu-v4-1-2fe95f305afd@gmail.com
4 weeks agogpu: host1x: Fix device reference leak in host1x_device_parse_dt() error path
Guangshuo Li [Mon, 13 Apr 2026 14:15:26 +0000 (22:15 +0800)] 
gpu: host1x: Fix device reference leak in host1x_device_parse_dt() error path

After device_initialize(), the embedded struct device in struct
host1x_device should be released through the device core with
put_device().

In host1x_device_add(), if host1x_device_parse_dt() fails, the current
error path frees the object directly with kfree(device). That bypasses
the normal device lifetime handling and leaks the reference held on the
embedded struct device.

The issue was identified by a static analysis tool I developed and
confirmed by manual review.

Fix this by using put_device() in the host1x_device_parse_dt() failure
path.

Fixes: f4c5cf88fbd50 ("gpu: host1x: Provide a proper struct bus_type")
Cc: stable@vger.kernel.org
Signed-off-by: Guangshuo Li <lgs201920130244@gmail.com>
Acked-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patch.msgid.link/20260413141526.2961841-1-lgs201920130244@gmail.com
4 weeks agogpu: host1x: mipi: Fix device_node reference leak in tegra_mipi_request()
Felix Gu [Thu, 16 Apr 2026 12:09:29 +0000 (20:09 +0800)] 
gpu: host1x: mipi: Fix device_node reference leak in tegra_mipi_request()

In tegra_mipi_request(), when provider.np is not equal with args.np, it
returns without calling of_node_put(args.np), causing a reference leak.

Convert to use the existing goto out pattern to ensure proper cleanup.

Fixes: 767598d447aa ("gpu: host1x: mipi: Update tegra_mipi_request() to be node based")
Signed-off-by: Felix Gu <ustc.gu@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patch.msgid.link/20260416-mipi-v1-1-9c027175abdf@gmail.com
4 weeks agodrm/tegra: Make tegra_fb_alloc() an internal interface
Thomas Zimmermann [Tue, 21 Apr 2026 07:29:09 +0000 (09:29 +0200)] 
drm/tegra: Make tegra_fb_alloc() an internal interface

Fbdev framebuffer allocation now goes through the regular ioctl call
chain. This makes tegra_fb_alloc() an internal helper function. Declare
it as static.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patch.msgid.link/20260421073646.144712-6-tzimmermann@suse.de
4 weeks agodrm/tegra: fbdev: Use a DRM client buffer
Thomas Zimmermann [Tue, 21 Apr 2026 07:29:08 +0000 (09:29 +0200)] 
drm/tegra: fbdev: Use a DRM client buffer

Replace the internal DRM framebuffer with a DRM client buffer. The
client buffer allocates the DRM framebuffer on a file and also uses
GEM object handles via the regular ADDFB2 interfaces.

Using client-buffer interfaces unifies framebuffer allocation for
DRM clients in user space and tegra's internal fbdev emulation. It
also simplifies the clean-up side of the fbdev emulation.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patch.msgid.link/20260421073646.144712-5-tzimmermann@suse.de
4 weeks agodrm/tegra: fbdev: Calculate buffer geometry with format helpers
Thomas Zimmermann [Tue, 21 Apr 2026 07:29:07 +0000 (09:29 +0200)] 
drm/tegra: fbdev: Calculate buffer geometry with format helpers

Replace the geometry and size calculation in tegra's fbdev emulation
with DRM format helpers. This consists of a 4CC lookup from the fbdev
parameters, format lookup, pitch calculation and size calculation.
Then allocate the GEM buffer object for the framebuffer memory from
the calculated size.

Set up mode_cmd with the calculated values just before allocating the
framebuffer. This code will later be replaced with a DRM client buffer.

Set framebuffer size fields in struct fb_info from the size stored in
the GEM buffer object instead of what has been requested. The requested
size is an estimate, while the buffer size is the exact value rounded
to the correct alignment.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patch.msgid.link/20260421073646.144712-4-tzimmermann@suse.de
4 weeks agodrm/tegra: fbdev: Remove offset into framebuffer memory
Thomas Zimmermann [Tue, 21 Apr 2026 07:29:06 +0000 (09:29 +0200)] 
drm/tegra: fbdev: Remove offset into framebuffer memory

The screen_buffer field in struct fb_info contains the kernel address
of the first byte of framebuffer memory. Do not add the display offset.
This offset only describes scrolling during scanout.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Fixes: de2ba664c30f ("gpu: host1x: drm: Add memory manager and fb")
Cc: dri-devel@lists.freedesktop.org
Cc: linux-tegra@vger.kernel.org
Cc: <stable@vger.kernel.org> # v3.10+
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patch.msgid.link/20260421073646.144712-3-tzimmermann@suse.de