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5 weeks agoclk: mediatek: mt8195: convert CLK_XTAL to CLK_PAD_CLK26M
David Lechner [Tue, 10 Mar 2026 15:32:24 +0000 (10:32 -0500)] 
clk: mediatek: mt8195: convert CLK_XTAL to CLK_PAD_CLK26M

Replace all uses of CLK_XTAL with CLK_PAD_CLK26M.

This avoids declaring the same parent clock two different ways and will
eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-11-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: mt8188: convert CLK_XTAL to CLK_PAD_CLK26M
David Lechner [Tue, 10 Mar 2026 15:32:23 +0000 (10:32 -0500)] 
clk: mediatek: mt8188: convert CLK_XTAL to CLK_PAD_CLK26M

Replace all uses of CLK_XTAL with CLK_PAD_CLK26M.

This avoids declaring the same parent clock two different ways and will
eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-10-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: mt8183: convert CLK_XTAL to CLK_PAD_CLK26M
David Lechner [Tue, 10 Mar 2026 15:32:22 +0000 (10:32 -0500)] 
clk: mediatek: mt8183: convert CLK_XTAL to CLK_PAD_CLK26M

Replace all uses of CLK_XTAL with CLK_PAD_CLK26M.

This avoids declaring the same parent clock two different ways and will
eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-9-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: mt7988: convert CLK_XTAL to CLK_PAD_CLK40M
David Lechner [Tue, 10 Mar 2026 15:32:21 +0000 (10:32 -0500)] 
clk: mediatek: mt7988: convert CLK_XTAL to CLK_PAD_CLK40M

Replace all uses of CLK_XTAL with CLK_PAD_CLK40M.

This will eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-8-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: mt7987: convert CLK_XTAL to CLK_PAD_CLK40M
David Lechner [Tue, 10 Mar 2026 15:32:20 +0000 (10:32 -0500)] 
clk: mediatek: mt7987: convert CLK_XTAL to CLK_PAD_CLK40M

Replace all uses of CLK_XTAL with CLK_PAD_CLK40M.

This will eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-7-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: mt7986: convert CLK_XTAL to CLK_PAD_CLK40M
David Lechner [Tue, 10 Mar 2026 15:32:19 +0000 (10:32 -0500)] 
clk: mediatek: mt7986: convert CLK_XTAL to CLK_PAD_CLK40M

Replace all uses of CLK_XTAL with CLK_PAD_CLK40M.

This will eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-6-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: mt7981: convert CLK_XTAL to CLK_PAD_CLK40M
David Lechner [Tue, 10 Mar 2026 15:32:18 +0000 (10:32 -0500)] 
clk: mediatek: mt7981: convert CLK_XTAL to CLK_PAD_CLK40M

Replace all uses of CLK_XTAL with CLK_PAD_CLK40M.

This will eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-5-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: mt7629: convert CLK_XTAL to CLK_PAD_CLK40M
David Lechner [Tue, 10 Mar 2026 15:32:17 +0000 (10:32 -0500)] 
clk: mediatek: mt7629: convert CLK_XTAL to CLK_PAD_CLK40M

Replace all uses of CLK_XTAL with CLK_PAD_CLK40M.

This will eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-4-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: mt7623: convert CLK_XTAL to CLK_PAD_CLK26M
David Lechner [Tue, 10 Mar 2026 15:32:16 +0000 (10:32 -0500)] 
clk: mediatek: mt7623: convert CLK_XTAL to CLK_PAD_CLK26M

Replace all uses of CLK_XTAL with CLK_PAD_CLK26M.

This avoids declaring the same parent clock two different ways and will
eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-3-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: mt7622: convert CLK_XTAL to CLK_PAD_CLK25M
David Lechner [Tue, 10 Mar 2026 15:32:15 +0000 (10:32 -0500)] 
clk: mediatek: mt7622: convert CLK_XTAL to CLK_PAD_CLK25M

Replace all uses of CLK_XTAL with CLK_PAD_CLK25M.

This avoids declaring the same parent clock two different ways and will
eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-2-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: replace xtal2_rate with struct mtk_parent
David Lechner [Tue, 10 Mar 2026 15:32:14 +0000 (10:32 -0500)] 
clk: mediatek: replace xtal2_rate with struct mtk_parent

Replace the hard-coded xtal rate for PLL parents with struct mtk_parent.

This avoids declaring the same clock rate in multiple places and will
allow future drivers to use an arbitrary clock.

The variable is renamed to something that better indicate what the field
is actually used for.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-1-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoMerge tag 'qcom-fixes-24Mar2026' of https://source.denx.de/u-boot/custodians/u-boot...
Tom Rini [Tue, 24 Mar 2026 15:15:03 +0000 (09:15 -0600)] 
Merge tag 'qcom-fixes-24Mar2026' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon

- Assorted Qualcomm platform fixes

5 weeks agoclk: mediatek: mt8195: use ext_clock_rates
David Lechner [Mon, 9 Mar 2026 22:51:11 +0000 (17:51 -0500)] 
clk: mediatek: mt8195: use ext_clock_rates

Convert the mt8195 clock driver to use ext_clock_rates.

Now that we have the ext_clock_rates feature and also mux clock parents
have been converted to struct mtk_parent, we can remove the hack of
adding "missing" topckgen clocks. Instead we can use the proper parents.

The topckgen ID map is still needed though because the upstream
dt-bindings didn't use the conventional number ordering by clock type
for these.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260309-clk-mtk-mt8188-drop-extra-top-clocks-v1-2-6ee4743a8465@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: mt8188: use ext_clock_rates
David Lechner [Mon, 9 Mar 2026 22:51:10 +0000 (17:51 -0500)] 
clk: mediatek: mt8188: use ext_clock_rates

Convert the mt8188 clock driver to use ext_clock_rates.

Now that we have the ext_clock_rates feature and also mux clock parents
have been converted to struct mtk_parent, we can remove the hack of
adding "missing" topckgen clocks. Instead we can use the proper parents.

The topckgen ID map is still needed though because the upstream
dt-bindings didn't use the conventional number ordering by clock type
for these.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260309-clk-mtk-mt8188-drop-extra-top-clocks-v1-1-6ee4743a8465@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: mt8365: drop topckgen map
David Lechner [Tue, 3 Mar 2026 22:17:47 +0000 (16:17 -0600)] 
clk: mediatek: mt8365: drop topckgen map

Drop the clock ID map for MT8365 TOPCKGEN clocks.

Previously, we didn't have the EXT clock feature, so we needed the map.
Now we can replace it with the new feature to avoid the map.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260303-mtk-clk-8365-drop-map-v1-1-17f81c375290@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: refactor duplicate *_mux_get_rate()
David Lechner [Tue, 17 Mar 2026 23:23:29 +0000 (18:23 -0500)] 
clk: mediatek: refactor duplicate *_mux_get_rate()

Refactor two identical functions for getting mux clock rates. The
functions are renamed and moved to the section of the code that contains
other common functions.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-16-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: remove CLK_PARENT_MIXED flag
David Lechner [Tue, 17 Mar 2026 23:23:28 +0000 (18:23 -0500)] 
clk: mediatek: remove CLK_PARENT_MIXED flag

Remove CLK_PARENT_MIXED and all dead code paths related to it.

All mux clocks have been converted to use struct mtk_parent (the
parent_flags field of the parent/parent_flags union). Use of this
struct was indicated by CLK_PARENT_MIXED. Now, this is always the case
and we can drop the flag and the union. All MUX_MIXED* macros are
change to use the equivalent MUX* macros since we no longer need to
set the flag.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-15-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: remove use of CLK_BYPASS_XTAL flag
David Lechner [Tue, 17 Mar 2026 23:23:27 +0000 (18:23 -0500)] 
clk: mediatek: remove use of CLK_BYPASS_XTAL flag

Remove the CLK_BYPASS_XTAL flag completely.

It was a bit of a hack that was meant to handle mux clocks that had
mixed parents (e.g. XTAL and TOPCKGEN). The idea was that if you didn't
have CLK_XTAL as a parent, then you were supposed to add the
CLK_BYPASS_XTAL flag to the clock tree. There are likely a number of
drivers missing this since it is not intuitive.

In the meantime, we have introduced the CLK_PARENT_MIXED flag which
handles this more robustly. All of the affected drivers (the ones
without CLK_BYPASS_XTAL) have been updated to use CLK_PARENT_MIXED, so
the CLK_BYPASS_XTAL flag is no longer needed on other drivers.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-14-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: mt8518: convert to struct mtk_parent
David Lechner [Tue, 17 Mar 2026 23:23:26 +0000 (18:23 -0500)] 
clk: mediatek: mt8518: convert to struct mtk_parent

Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-13-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: mt8516: convert to struct mtk_parent
David Lechner [Tue, 17 Mar 2026 23:23:25 +0000 (18:23 -0500)] 
clk: mediatek: mt8516: convert to struct mtk_parent

Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-12-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: mt8512: convert to struct mtk_parent
David Lechner [Tue, 17 Mar 2026 23:23:24 +0000 (18:23 -0500)] 
clk: mediatek: mt8512: convert to struct mtk_parent

Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-11-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: mt8365: convert to struct mtk_parent
David Lechner [Tue, 17 Mar 2026 23:23:23 +0000 (18:23 -0500)] 
clk: mediatek: mt8365: convert to struct mtk_parent

Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-10-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: mt8195: convert to struct mtk_parent
David Lechner [Tue, 17 Mar 2026 23:23:22 +0000 (18:23 -0500)] 
clk: mediatek: mt8195: convert to struct mtk_parent

Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-9-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: mt8188: convert to struct mtk_parent
David Lechner [Tue, 17 Mar 2026 23:23:21 +0000 (18:23 -0500)] 
clk: mediatek: mt8188: convert to struct mtk_parent

Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-8-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: mt8183: convert to struct mtk_parent
David Lechner [Tue, 17 Mar 2026 23:23:20 +0000 (18:23 -0500)] 
clk: mediatek: mt8183: convert to struct mtk_parent

Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-7-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: mt7988: convert to struct mtk_parent
David Lechner [Tue, 17 Mar 2026 23:23:19 +0000 (18:23 -0500)] 
clk: mediatek: mt7988: convert to struct mtk_parent

Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-6-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: mt7987: convert to struct mtk_parent
David Lechner [Tue, 17 Mar 2026 23:23:18 +0000 (18:23 -0500)] 
clk: mediatek: mt7987: convert to struct mtk_parent

Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-5-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: mt7981: convert to struct mtk_parent
David Lechner [Tue, 17 Mar 2026 23:23:17 +0000 (18:23 -0500)] 
clk: mediatek: mt7981: convert to struct mtk_parent

Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-4-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: mt7629: convert to struct mtk_parent
David Lechner [Tue, 17 Mar 2026 23:23:16 +0000 (18:23 -0500)] 
clk: mediatek: mt7629: convert to struct mtk_parent

Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-3-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: mt7623: convert to struct mtk_parent
David Lechner [Tue, 17 Mar 2026 23:23:15 +0000 (18:23 -0500)] 
clk: mediatek: mt7623: convert to struct mtk_parent

Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-2-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agoclk: mediatek: mt7622: convert to struct mtk_parent
David Lechner [Tue, 17 Mar 2026 23:23:14 +0000 (18:23 -0500)] 
clk: mediatek: mt7622: convert to struct mtk_parent

Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-1-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
5 weeks agowatchdog: qcom: stop watchdog by default
Casey Connolly [Wed, 21 Jan 2026 00:36:51 +0000 (01:36 +0100)] 
watchdog: qcom: stop watchdog by default

Prevent the Qualcomm watchdog from autostarting and ensure it's stopped
when the driver probed. In some cases the watchdog is left running by
a previous bootloader stage. Disable autostart so it isn't left running
when we boot into the OS, this behaviour can be changed by enabling
autostart in the board defconfig.

Reviewed-by: Stefan Roese <stefan.roese@mailbox.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Link: https://patch.msgid.link/20260121003659.69305-1-casey.connolly@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
5 weeks agoqcom: rpmh: don't error for SLEEP requests
Casey Connolly [Fri, 20 Mar 2026 15:45:41 +0000 (16:45 +0100)] 
qcom: rpmh: don't error for SLEEP requests

Just stub out non-active votes, if we return an error the caller may
propagate it and not send its active vote. Since we don't suspend
there's no risk of us entering a broken state due to missing votes.

Link: https://patch.msgid.link/20260320-casey-qcom-rpmh-serial-fixes-v1-2-b81d05832eec@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
5 weeks agoserial: msm-geni: allow invalid clock
Casey Connolly [Fri, 20 Mar 2026 15:45:40 +0000 (16:45 +0100)] 
serial: msm-geni: allow invalid clock

Pre-relocation we may not have a clock but it's usually been enabled for
us already, or worst case we will enable it after relocation. Erroring
out in this case will almost always cause U-Boot to hang pre-relocation
which is undesirable and may be hard to debug.

Link: https://patch.msgid.link/20260320-casey-qcom-rpmh-serial-fixes-v1-1-b81d05832eec@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
5 weeks agopower: regulator: qcom: Correct dependenecies for DM_REGULATOR_QCOM_USB_VBUS
Tom Rini [Mon, 23 Mar 2026 19:53:02 +0000 (13:53 -0600)] 
power: regulator: qcom: Correct dependenecies for DM_REGULATOR_QCOM_USB_VBUS

The DM_REGULATOR_QCOM_USB_VBUS functionality can only work with DM_PMIC
enabled as well, so express this dependency in Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
Link: https://patch.msgid.link/20260323195302.2363577-1-trini@konsulko.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
5 weeks agophy: qcom: qusb2: Add QCS615 QUSB2 PHY support
Balaji Selvanathan [Fri, 13 Feb 2026 09:01:20 +0000 (14:31 +0530)] 
phy: qcom: qusb2: Add QCS615 QUSB2 PHY support

Add support for QCS615 QUSB2 PHY by introducing platform-specific
initialization table and register layout. The implementation reuses
the IPQ6018 register layout and defines QCS615-specific tuning
parameters for proper USB PHY operation.

Taken from Linux commit 8adbf20e0502 ("phy: qcom-qusb2: Add support for QCS615")

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20260213-talos_usb-v1-3-4c4355d61437@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
5 weeks agoclk: qcom: qcs615: Add GCC_AHB2PHY_WEST_CLK clock support
Balaji Selvanathan [Fri, 13 Feb 2026 09:01:19 +0000 (14:31 +0530)] 
clk: qcom: qcs615: Add GCC_AHB2PHY_WEST_CLK clock support

Add GCC_AHB2PHY_WEST_CLK gate clock definition to the QCS615
clock driver. This clock is required for proper PHY operation
and eliminates clock-related warnings during USB initialization.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20260213-talos_usb-v1-2-4c4355d61437@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
5 weeks agoclk: qcom: qcs615: Add GCC_USB3_PRIM_CLKREF_CLK support
Balaji Selvanathan [Fri, 13 Feb 2026 09:01:18 +0000 (14:31 +0530)] 
clk: qcom: qcs615: Add GCC_USB3_PRIM_CLKREF_CLK support

Add support for GCC_USB3_PRIM_CLKREF_CLK to the QCS615 clock driver.
This clock is referenced in the device tree USB node but was not
implemented in U-Boot, causing "Clock 152 not found" warnings during
fastboot run.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://patch.msgid.link/20260213-talos_usb-v1-1-4c4355d61437@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
5 weeks agoPrepare v2026.04-rc5 v2026.04-rc5
Tom Rini [Mon, 23 Mar 2026 20:19:17 +0000 (14:19 -0600)] 
Prepare v2026.04-rc5

Signed-off-by: Tom Rini <trini@konsulko.com>
5 weeks agoMerge patch series "DDR configuration refactor and 16GB dual-rank support"
Tom Rini [Mon, 23 Mar 2026 15:19:00 +0000 (09:19 -0600)] 
Merge patch series "DDR configuration refactor and 16GB dual-rank support"

Emanuele Ghidoli <ghidoliemanuele@gmail.com> says:

From: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>

This series refactors the DDR configuration handling for the
Toradex Aquila AM69 board and adds support for a 16GB dual-rank
memory configuration, while changing the HW_CFG pins value to
DDR configurations mapping.

Link: https://lore.kernel.org/r/20260309155342.145432-1-ghidoliemanuele@gmail.com
5 weeks agoboard: toradex: aquila-am69: Add support for 16GB dual rank memory configuration
Emanuele Ghidoli [Mon, 9 Mar 2026 15:53:08 +0000 (16:53 +0100)] 
board: toradex: aquila-am69: Add support for 16GB dual rank memory configuration

Move the existing 16GB single-rank configuration to HW_CFG 0x03 and use
the previous HW_CFG 0x01 value for the new 16GB dual-rank configuration.

There is no hardware using the former 16GB single-rank configuration,
so reuse the HW_CFG value for the new 16GB dual-rank configuration,
which will be used in production.

Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
5 weeks agoboard: toradex: aquila-am69: refactor memory configuration
Emanuele Ghidoli [Mon, 9 Mar 2026 15:53:07 +0000 (16:53 +0100)] 
board: toradex: aquila-am69: refactor memory configuration

The memory controller configuration doesn't depend only on the memory
size, so refactor the code to use the memory configuration read from
the HW_CFG pin instead of the memory size.
Additionally, make use of one header file for all the memory
configurations.

Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
5 weeks agoMerge patch series "Provide a class for building filesystem images"
Tom Rini [Mon, 23 Mar 2026 15:18:38 +0000 (09:18 -0600)] 
Merge patch series "Provide a class for building filesystem images"

Simon Glass <sjg@chromium.org> says:

Create a class around mk_fs() to handle the common tasks of image
creation, such as managing scratch directories and cleaning up.

Start with a few small cleanups to mk_fs(), then convert the helper
to use a class.

Link: https://lore.kernel.org/r/20260309151307.831537-1-sjg@chromium.org
5 weeks agotest: Convert fs_helper to use a class
Simon Glass [Mon, 9 Mar 2026 15:13:04 +0000 (09:13 -0600)] 
test: Convert fs_helper to use a class

Create a class around mk_fs() (and later setup_image()) to handle the
common tasks of image creation. Many callers of fs_helper.mk_fs()
create their own scratch directories while users of
fs_helper.setup_image() rely on one being returned. Unify this by
adding 'srcdir' as a field while converting to a class.

The class delegates to the existing mk_fs() function for the actual
filesystem creation, adding lifecycle management for scratch
directories and the image file.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 weeks agotest: fs_helper: Drop the size_gran argument
Simon Glass [Mon, 9 Mar 2026 15:13:03 +0000 (09:13 -0600)] 
test: fs_helper: Drop the size_gran argument

Nothing uses this argument, so make it a constant for now.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Christian Taedcke <christian.taedcke@weidmueller.com>
5 weeks agotest: Update comment for fs_helper.setup_image()
Simon Glass [Mon, 9 Mar 2026 15:13:02 +0000 (09:13 -0600)] 
test: Update comment for fs_helper.setup_image()

This function actually allows creating two partitions now, so update its
comment to match that.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 weeks agotest: fs_helper: Add a quiet flag to mk_fs()
Simon Glass [Mon, 9 Mar 2026 15:13:01 +0000 (09:13 -0600)] 
test: fs_helper: Add a quiet flag to mk_fs()

In many cases callers only want to see warnings and errors from the
filesystem-creation tools, not their normal output.

Add a quiet parameter to mk_fs() that suppresses the output of mkfs
and switches mcopy from verbose to quiet mode.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 weeks agotest: fs_helper: Allow passing the image filename
Simon Glass [Mon, 9 Mar 2026 15:13:00 +0000 (09:13 -0600)] 
test: fs_helper: Allow passing the image filename

The mk_fs() function always generates its own image filename from the
prefix and fs_type. Some callers need to specify a custom leaf name
while still keeping the image under the persistent-data directory.

Add an fs_img parameter that accepts a leaf filename. When provided,
it is joined with persistent_data_dir instead of the default name.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 weeks agoMerge tag 'fsl-qoriq-next-2026-03-23' of https://source.denx.de/u-boot/custodians...
Tom Rini [Mon, 23 Mar 2026 15:16:21 +0000 (09:16 -0600)] 
Merge tag 'fsl-qoriq-next-2026-03-23' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq into next

CI: https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq/-/pipelines/29614

- Kconfig update for SCMI_FIRMWARE
- Add SCMI pinctrl driver

5 weeks agoMerge tag 'mmc-next-2026-03-23' of https://source.denx.de/u-boot/custodians/u-boot...
Tom Rini [Mon, 23 Mar 2026 15:15:33 +0000 (09:15 -0600)] 
Merge tag 'mmc-next-2026-03-23' of https://source.denx.de/u-boot/custodians/u-boot-mmc into next

CI: https://source.denx.de/u-boot/custodians/u-boot-mmc/-/pipelines/29613

- Add missing quote in error message in regulator
- Support for emmc 5.1b specification

5 weeks agoinclude: env: ti: move board specific scripts out of ti_common
Anshul Dalal [Fri, 6 Mar 2026 12:02:37 +0000 (17:32 +0530)] 
include: env: ti: move board specific scripts out of ti_common

bootcmd_ti_mmc had cpsw0_qsgmii_phyinit related scripts even though this
was only relevant for the j721e/j7200 SoCs. This patch instead factors
out those scripts into a generic 'board_init' which is called as part of
bootcmd_ti_mmc.

This allows boards to more easily add custom behaviour to the ti_mmc
bootflow instead of having to modify the ti_common.env file.

Signed-off-by: Anshul Dalal <anshuld@ti.com>
5 weeks agoMerge tag 'fsl-qoriq-for-2026.04-rc5' of https://source.denx.de/u-boot/custodians...
Tom Rini [Mon, 23 Mar 2026 14:03:17 +0000 (08:03 -0600)] 
Merge tag 'fsl-qoriq-for-2026.04-rc5' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq

CI: https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq/-/pipelines/29615

- Fix SPI flash clock for ls102xa

5 weeks agoboard/BuR/zynq: don't select non-existent SPL_BINMAN_FDT
Heinrich Schuchardt [Wed, 25 Feb 2026 06:35:59 +0000 (07:35 +0100)] 
board/BuR/zynq: don't select non-existent SPL_BINMAN_FDT

Symbol CONFIG_SPL_BINMAN_FDT does not exist.
Don't select it.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@at.abb.com>
Tested-by: Wolfgang Wallner <wolfgang.wallner@at.abb.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260225063559.47481-1-heinrich.schuchardt@canonical.com
5 weeks agoserial: Enable SYS_NS16550 on incorrectly migrated platforms
Tom Rini [Thu, 19 Mar 2026 16:33:43 +0000 (10:33 -0600)] 
serial: Enable SYS_NS16550 on incorrectly migrated platforms

With the migration to DM_SERIAL in commit 191b10ac70d7 ("PowerPC /
Layerscape: Finish migration to DM_SERIAL") a number of platforms were
incorrectly migrated and did not enable SYS_NS16550 despite previously
having enabled the non-DM NS16650 serial driver. Enable these now.

Fixes: 191b10ac70d7 ("PowerPC / Layerscape: Finish migration to DM_SERIAL")
Reported-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
5 weeks agomicroblaze: Rework TARGET_MICROBLAZE_GENERIC implementation
Tom Rini [Tue, 17 Mar 2026 01:24:12 +0000 (19:24 -0600)] 
microblaze: Rework TARGET_MICROBLAZE_GENERIC implementation

As exposed by "make randconfig", some symbols such as
XILINX_MICROBLAZE0_PVR can be set without TARGET_MICROBLAZE_GENERIC but
have a transitive dependency on it. The easiest path of resolution here
is that since there is only one valid microblaze "board", rework that
symbol to be non-optional.

Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260317012412.4162279-1-trini@konsulko.com
5 weeks agotimer: Correct Kconfig entry for XILINX_TIMER
Tom Rini [Tue, 17 Mar 2026 01:24:46 +0000 (19:24 -0600)] 
timer: Correct Kconfig entry for XILINX_TIMER

As exposed by "make randconfig", we have an issue with the dependencies
for XILINX_TIMER. This symbol is a case where we have one that covers
both main U-Boot and SPL. In this case, we need to select SPL_REGMAP not
when SPL is enabled but rather when SPL_TIMER is enabled (and in turn,
SPL_DM).

Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260317012446.4162630-1-trini@konsulko.com
5 weeks agoarm64: versal2: Fix UFS boot command sequence
Padmarao Begari [Fri, 6 Mar 2026 12:48:07 +0000 (13:48 +0100)] 
arm64: versal2: Fix UFS boot command sequence

The BOOTENV_DEV_UFS macro is incomplete - it only initializes UFS
and scans SCSI devices but does not actually boot anything. This
causes the boot sequence to stop after scsi scan without loading
a kernel.

Update BOOTENV_DEV_UFS to set the devnum environment variable to
the UFS instance number, initialize the device using $devnum, and
delegate the boot process to the shared scsi_boot script. Remove
the explicit scsi scan, as it is already handled by scsi_boot.

This matches the pattern used by other boot device macros and
ensures that UFS devices can successfully boot using the distro
boot framework.

Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5447ce1d5c4a21b0b62ce76ad642296110364041.1772801284.git.michal.simek@amd.com
5 weeks agonet: zynq_gem: Add support for dma-coherent flag
Michal Simek [Mon, 2 Mar 2026 07:43:34 +0000 (08:43 +0100)] 
net: zynq_gem: Add support for dma-coherent flag

When dma-coherent DT property is passed there is no need to do any cache
operations.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/10c7a40364162cc8d3c82cb3e64e043f49a5153e.1772437409.git.michal.simek@amd.com
5 weeks agonet: zynq_gem: clear TXSR transfer complete
Padmarao Begari [Mon, 2 Mar 2026 07:43:33 +0000 (08:43 +0100)] 
net: zynq_gem: clear TXSR transfer complete

The Zynq GEM TX status register retains the transfer‑complete bit
until it is explicitly cleared. The current flow waits for
transfer‑complete but never clears it, so on the next send the wait
loop returns immediately because transfer‑complete is already high.
This causes the driver to report TX completion before the new DMA
transfer has actually finished, which breaks back‑to‑back
transmissions. This issue causes timeouts during LWIP TFTP transfers
when cache coherency is enabled.
Fix this by explicitly clearing transfer‑complete (write‑to‑clear)
after the wait completes, so each transmit starts with a clean TXSR.

Co-developed-by: Harini Katakam <harini.katakam@amd.com>
Signed-off-by: Harini Katakam <harini.katakam@amd.com>
Co-developed-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/f354680d43fba0f590a6fae693848e5bf7114ba5.1772437409.git.michal.simek@amd.com
5 weeks agonet: zynq_gem: Disable broadcast packets
Michal Simek [Mon, 2 Mar 2026 07:43:32 +0000 (08:43 +0100)] 
net: zynq_gem: Disable broadcast packets

There is no reason to react on broadcast packets that's why just ignore
them not to waste cycles on packets which are not for the platform.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6e10793b7d72668343756edb66221f1415570250.1772437409.git.michal.simek@amd.com
5 weeks agospi: cadence_qspi: pulse controller reset at probe
Padmarao Begari [Sun, 15 Feb 2026 15:16:26 +0000 (20:46 +0530)] 
spi: cadence_qspi: pulse controller reset at probe

The driver previously only deasserted the optional bulk reset,
leaving the controller in whatever state earlier stages left it and
risking failed probes or bad transfers. Assert the reset first, wait
10 µs, and then deassert so the OSPI block starts from a known state.

Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260215151639.3472200-1-padmarao.begari@amd.com
5 weeks agoarm64: versal2: Enable GIC600 support
Padmarao Begari [Thu, 26 Feb 2026 09:28:01 +0000 (10:28 +0100)] 
arm64: versal2: Enable GIC600 support

Add and enable the GIC600 support configuration by default for
Versal Gen 2.

Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e3135eee33282281572fbc960aa45b5d0f355158.1772098079.git.michal.simek@amd.com
5 weeks agospi: cadence_qspi: Disable the DAC mode in indirect read
Venkatesh Yadav Abbarapu [Wed, 30 Apr 2025 05:09:23 +0000 (10:39 +0530)] 
spi: cadence_qspi: Disable the DAC mode in indirect read

Hang has been observed on QEMU, as it starts with indac
read and fills sram, but after dma is triggered, it tries
dac read instead (based on priority) which gets blocked.
Disable the DAC mode in indirect DMA read and enable back
for writes as DAC mode is used.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Tested-by: Padmarao Begari <padmarao.begari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20250430050923.135256-1-venkatesh.abbarapu@amd.com
5 weeks agoxilinx: Enable GPIO delay driver on Versal platforms
Michal Simek [Tue, 17 Feb 2026 10:50:33 +0000 (11:50 +0100)] 
xilinx: Enable GPIO delay driver on Versal platforms

GPIO delay driver is necessary to use to extend delay times for USB hubs.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6744d3a93f48658178a53d218a4a6ca2fbb050dd.1771325431.git.michal.simek@amd.com
5 weeks agoi2c: muxes: pca954x: Add support for pca9848
Michal Simek [Mon, 16 Feb 2026 08:14:01 +0000 (09:14 +0100)] 
i2c: muxes: pca954x: Add support for pca9848

Add support for PCA9848 chip.

Reviewed-by: Heiko Schocher <hs@nabladev.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/72cadba2a21e9d5723d54994b898d8a6880042e0.1771229639.git.michal.simek@amd.com
5 weeks agoarmv7: ls102xa: fix SPI flash clock
Michael Walle [Wed, 18 Mar 2026 14:29:17 +0000 (15:29 +0100)] 
armv7: ls102xa: fix SPI flash clock

Commit bb6f3c0f7634 ("armv7: ls102xa: Update SCFG_QSPI_CLKSEL value")
broke the SPI boot on the LS1021ATSN board (ls1021atsn_qspi_defconfig)
at least.

The commit message reads
   Update SCFG_QSPI_CLKSEL value : 0xC -> 0x5
   which means ClusterPLL/16

The original submitted patch had the following description:
   Value 0xC is reserved. Replace it with correct value 0x5 which
   is ClusterPLL/16

Unfortunatly, the little information which was there, was stripped even
further. Why is 0x5 the "correct" value? In fact, it seems that the
upper bit is just ignored and thus the value 0xC translates to 0x4 which
is ClusterPLL/20. This, will result in a SPI clock of 60MHz (if the PLL
is clocked at 1.2GHz). But even that is too much for the (default) 03h
read opcode (max 50MHz). Set the value to ClusterPLL/24 which is 50MHz.

Link: https://lore.kernel.org/r/1568804284-25162-1-git-send-email-kuldeep.singh@nxp.com/
Fixes: bb6f3c0f7634 ("armv7: ls102xa: Update SCFG_QSPI_CLKSEL value")
Signed-off-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
5 weeks agoconfigs: ls1021atsn: enable serial driver
Michael Walle [Wed, 18 Mar 2026 14:29:16 +0000 (15:29 +0100)] 
configs: ls1021atsn: enable serial driver

Switching to DM_SERIAL disabled any serial driver. Re-enable it again.

Fixes: 191b10ac70d7 ("PowerPC / Layerscape: Finish migration to DM_SERIAL")
Signed-off-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
5 weeks agoarm: dts: ls1021a-tsn: add default serial output
Michael Walle [Wed, 18 Mar 2026 14:29:15 +0000 (15:29 +0100)] 
arm: dts: ls1021a-tsn: add default serial output

Since switching to DM_SERIAL 'stdout-path' seems to be necessary.

Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
5 weeks agodm: regulator: fix missing quote in error message
David Lechner [Thu, 19 Mar 2026 22:30:04 +0000 (17:30 -0500)] 
dm: regulator: fix missing quote in error message

Fix a missing closing quote in the error message when a regulator name
is not unique.

Signed-off-by: David Lechner <dlechner@baylibre.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
5 weeks agommc: Add support for eMMC 5.1B specification
Han Xu [Wed, 25 Feb 2026 21:13:32 +0000 (15:13 -0600)] 
mmc: Add support for eMMC 5.1B specification

Add support for eMMC specification version 5.1B by defining
MMC_VERSION_5_1B and including it in the version array.

eMMC 5.1B (JESD84-B51B) is a minor revision of the 5.1 specification
that primarily addresses MDT (Manufacturing Date) adjustment for dates
beyond 2025. This aligns with the Linux kernel commit 9996707822f82
("mmc: core: Adjust MDT beyond 2025").

Since the manufacturing date field is not currently used in U-Boot,
this change has no functional impact beyond proper device recognition.
It allows the driver to correctly identify and initialize eMMC devices
that report version 5.1B in their Extended CSD register.

Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
5 weeks agoscmi: pinctrl: add pinctrl driver for SCMI
Dan Carpenter [Wed, 11 Mar 2026 19:41:25 +0000 (22:41 +0300)] 
scmi: pinctrl: add pinctrl driver for SCMI

This driver adds the base support of pinctrl over SCMI.  The driver
does two main things.  First, it allows you to configure the initial
pin states.  Secondly, it's used a base to build a GPIO driver on
top of it.

To configure the states then add a pinmux config to the scmi_pinctrl
section:

        scmi_pinctrl: protocol@19 {
                reg = <0x19>;
                pinmux1: pinmux_test {
                        pinmux = <0 1 0xFFFFFFFF 18 1
                                  0 2 0xFFFFFFFF 18 1
                                  0 3 0xFFFFFFFF 18 1>;
                        function = "f_gpio1";
                        groups = "grp_1", "grp_3";
                };
        };

Under linux the pinctrl subsystem will parse the function and group
properties and use that to handle muxing.  However, under u-boot the
pin muxing is done using the "pinmux" property, which feeds raw SCMI
pinctrl PINCTRL_SETTINGS_CONFIGURE commands to the server.  The
numbers are: selector, identifier, function_id, config_type, and
config_value.  In the example above, it sets pins 1, 2, and 3 to 1.
The linux-kernel ignores this pinmux property.

Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
5 weeks agoscmi: update comments for scmi_pinctrl_config_set_in()
Dan Carpenter [Wed, 11 Mar 2026 19:39:39 +0000 (22:39 +0300)] 
scmi: update comments for scmi_pinctrl_config_set_in()

Delete some extra space characters to make checkpatch.pl happy:

WARNING: please, no space before tabs

Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
5 weeks agoscmi: pinctrl: add pinctrl message IDs
Dan Carpenter [Wed, 11 Mar 2026 19:39:35 +0000 (22:39 +0300)] 
scmi: pinctrl: add pinctrl message IDs

Add all the pinctrl message IDs.  I renamed SCMI_MSG_PINCTRL_CONFIG_SET
to SCMI_PINCTRL_SETTINGS_CONFIGURE so the naming matches the spec better.

Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Linus Walleij <linusw@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
5 weeks agoscmi: Rework SCMI_FIRMWARE implementation
Tom Rini [Tue, 17 Mar 2026 01:24:14 +0000 (19:24 -0600)] 
scmi: Rework SCMI_FIRMWARE implementation

As exposed by "make randconfig", how we have SCMI_FIRMWARE today is
incomplete, and in one case, used incorrectly. First, SCMI_FIRMWARE has
a build-time dependency on OF_CONTROL being enabled, so add that.
Second, RESET_SCMI depends on SCMI_FIRMWARE being enabled, it should not
select that symbol. In turn, a number of platforms need to now enable
SCMI_FIRMWARE explicitly and not rely on RESET_SCMI to enable it for
them.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Anshul Dalal <anshuld@ti.com>
Acked-by: Michal Simek <michal.simek@amd.com> # Versal Gen 2
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
5 weeks agotests: FIT: Add "clone" image attack image test
Tom Rini [Wed, 18 Mar 2026 17:02:33 +0000 (11:02 -0600)] 
tests: FIT: Add "clone" image attack image test

Related to the problem resolved with commit 2092322b31cc ("boot: Add
fit_config_get_hash_list() to build signed node list"), add a testcase
for the problem as well.

Reported-by: Apple Security Engineering and Architecture (SEAR)
Signed-off-by: Tom Rini <trini@konsulko.com>
5 weeks agopower: pmic: enable sysreset function with device tree property
Svyatoslav Ryhel [Sat, 7 Feb 2026 17:43:40 +0000 (19:43 +0200)] 
power: pmic: enable sysreset function with device tree property

Add a condition to enable the PMIC sysreset function via the
system-power-controller device tree property in addition to the existing
Kconfig dependency, provided the PMIC supports it.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> # RK8xx
5 weeks agoboard: lg: star: make panel fix optional
Svyatoslav Ryhel [Tue, 13 Jan 2026 09:00:31 +0000 (11:00 +0200)] 
board: lg: star: make panel fix optional

Currently, U-Boot fails with an FDT patching error if the LG Optimus 2X
device tree lacks a panel node. Since the panel is optional hardware,
patching should be optional as well. Fix this by allowing bootflow to
continue if the panel node is missing.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 weeks agoARM: tegra: rename sdhci nodes to mmc
Svyatoslav Ryhel [Tue, 13 Jan 2026 10:12:30 +0000 (12:12 +0200)] 
ARM: tegra: rename sdhci nodes to mmc

Align with existing Linux Tegra device trees to simplify using U-Boot
device trees as a base for future Linux adaptations.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 weeks agoARM: tegra: remove unsupported properties from the max8907 node
Svyatoslav Ryhel [Tue, 13 Jan 2026 09:27:14 +0000 (11:27 +0200)] 
ARM: tegra: remove unsupported properties from the max8907 node

Remove interrupt and GPIO controller properties from MAX8907 node since
the PMIC does not have any GPIO cells and does not expose any interrupt
features.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 weeks agoARM: tegra: mot: change backlight LED source
Svyatoslav Ryhel [Thu, 29 Jan 2026 18:39:45 +0000 (20:39 +0200)] 
ARM: tegra: mot: change backlight LED source

Mot based devices use LM3532 LED controller with 3 sources. Panel
backlight uses LED 0 while keypad uses LED 1 and 2. Adjust device tree
accordingly.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 weeks agoARM: tegra: surface-2: fix panel supply
Svyatoslav Ryhel [Sat, 7 Feb 2026 18:11:16 +0000 (20:11 +0200)] 
ARM: tegra: surface-2: fix panel supply

Rename vdd-supply to power-supply according to the latest schema.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 weeks agoARM: tegra: lg-x3: fix panel property
Svyatoslav Ryhel [Sat, 7 Feb 2026 18:10:13 +0000 (20:10 +0200)] 
ARM: tegra: lg-x3: fix panel property

Rename renesas,inversion to renesas,column-inversion according to latest
schema.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 weeks agovideo: ltl106hl02: adjust power supply name
Svyatoslav Ryhel [Sat, 7 Feb 2026 18:08:53 +0000 (20:08 +0200)] 
video: ltl106hl02: adjust power supply name

Rename vdd-supply to power-supply according to the latest schema.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 weeks agovideo: r61307: adjust property name
Svyatoslav Ryhel [Sat, 7 Feb 2026 18:07:03 +0000 (20:07 +0200)] 
video: r61307: adjust property name

Rename renesas,inversion to renesas,column-inversion according to latest
schema.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 weeks agoinput: cpcap_pwrbutton: simplify parent verification
Svyatoslav Ryhel [Sat, 7 Feb 2026 18:43:11 +0000 (20:43 +0200)] 
input: cpcap_pwrbutton: simplify parent verification

Check for 'cpcap' within the compatible string, as various CPCAP
compositions always include this component.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 weeks agoinput: cpcap_pwrbutton: set default keycode fallback
Svyatoslav Ryhel [Sat, 7 Feb 2026 18:26:21 +0000 (20:26 +0200)] 
input: cpcap_pwrbutton: set default keycode fallback

Set a default fallback value if no keycode is defined

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 weeks agopower: cpcap: make regulator node names case independent
Svyatoslav Ryhel [Sat, 7 Feb 2026 10:46:25 +0000 (12:46 +0200)] 
power: cpcap: make regulator node names case independent

The Linux kernel CPCAP driver uses uppercase regulator node names, while
this driver uses lowercase. Since regulator names can be case-insensitive,
update the driver to support both uppercase and lowercase node names.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 weeks agopower: pmic: cpcap: add Mapphone and Mot compatibles
Svyatoslav Ryhel [Sat, 7 Feb 2026 10:00:34 +0000 (12:00 +0200)] 
power: pmic: cpcap: add Mapphone and Mot compatibles

Add Mapphone and Mot compatibles supported by Linux kernel.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 weeks agopower: regulator: cpcap: remove bit_offset_from_cpcap_lowest_voltage
Svyatoslav Ryhel [Fri, 6 Feb 2026 14:33:38 +0000 (16:33 +0200)] 
power: regulator: cpcap: remove bit_offset_from_cpcap_lowest_voltage

The bit_offset_from_cpcap_lowest_voltage value was inherited from the
downstream kernel as a quirk. With the correct voltage table, it is no
longer needed. An additional benefit is that SW1, SW2, and SW4 now share
the same voltage table.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 weeks agopwm: tegra: properly calculate pulse and frequency divider fields
Ion Agorria [Tue, 3 Feb 2026 11:29:59 +0000 (13:29 +0200)] 
pwm: tegra: properly calculate pulse and frequency divider fields

The pulse width field requires better precision during calculation. Add a
proper frequency divider calculation based on the PWM clock instead of
hardcoding it to 1.

Signed-off-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 weeks agopwm: tegra: fix pulse_width calculation
Jonas Schwöbel [Tue, 11 Mar 2025 22:11:47 +0000 (23:11 +0100)] 
pwm: tegra: fix pulse_width calculation

The pulse_width is expressed as N/256. A 100% duty cycle is only possible
when multiplied by 256 instead of 255.

Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 weeks agopwm: tegra: add set_invert PWM operation
Jonas Schwöbel [Tue, 11 Mar 2025 22:06:46 +0000 (23:06 +0100)] 
pwm: tegra: add set_invert PWM operation

Add active-low support to the PWM controller, useful for active-low
pwm-leds.

Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 weeks agopwm: tegra: add probe function
Jonas Schwöbel [Tue, 11 Mar 2025 22:01:20 +0000 (23:01 +0100)] 
pwm: tegra: add probe function

When PWM config was updated the clock was restarted which caused loss of
previous configuration of other channels. Further this fixes a bug/hang
that can happen when set_enable was called before set_config.

Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 weeks agoARM: tegra: ap: add debug prints for unknown SKU
Ion Agorria [Tue, 27 Jan 2026 09:27:33 +0000 (11:27 +0200)] 
ARM: tegra: ap: add debug prints for unknown SKU

Add debug log prints with a message that SKU is unknown.

Signed-off-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 weeks agoARM: tegra: ap: add default fallback for Tegra20 SKU
Ion Agorria [Tue, 27 Jan 2026 09:32:20 +0000 (11:32 +0200)] 
ARM: tegra: ap: add default fallback for Tegra20 SKU

Until now all Tegra chips except Tegra20 had a fallback if SKU is not
known. This caused issues previously when certain SKU wasn't known. Add a
fallback for Tegra20 aligning it with other Tegra SoC generations.

Signed-off-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 weeks agoARM: tegra: ap: add support T20 A04 SKU id
Ion Agorria [Tue, 27 Jan 2026 09:18:36 +0000 (11:18 +0200)] 
ARM: tegra: ap: add support T20 A04 SKU id

Add definition for Tegra20 SKU 0x4 / A04 found in Sony Tablet P.

Signed-off-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 weeks agodoc: board: tegra: improve documentation
Svyatoslav Ryhel [Thu, 8 Jan 2026 09:57:10 +0000 (11:57 +0200)] 
doc: board: tegra: improve documentation

Remove redundant chapters, clarify and reword confusing sections.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 weeks agoMerge patch series "bootm: Clean up arch-specific, pre-OS clean-up"
Tom Rini [Thu, 19 Mar 2026 00:36:50 +0000 (18:36 -0600)] 
Merge patch series "bootm: Clean up arch-specific, pre-OS clean-up"

Simon Glass <sjg@chromium.org> says:

Each arch does something slightly different before booting the OS. Some
archs even do different things depending on the CPU type.

It is quite hard to know what actually happens in the final milliseconds
before the OS boot.

This series attempts to start cleaning up U-Boot in this area.

The basic intent is to create a new bootm_final() function which can be
called by all archs. It provides some flags for a couple of necessary
variations but otherwise it is generic.

All architectures are converted over to use this new function.

board_quiesce_devices() is moved into bootm_final() so that all archs
benefit from it.

This series fixes a bug in device_remove() is fixed where removing a
parent with specialised flags (e.g. DM_REMOVE_ACTIVE_ALL) could leave
children activated, since they do not match the flags. This fixes is
needed to avoid bootm_final() causing test failures on sandbox.

Future work could take this a little further:
- Convert EFI loader to use the same function
- Improve comments for cleanup_before_linux() across architectures
- Support fake-run tracing on all archs

Link: https://lore.kernel.org/r/20260306023638.2678886-1-sjg@chromium.org
5 weeks agosandbox: Call bootm_final()
Simon Glass [Fri, 6 Mar 2026 02:36:26 +0000 (19:36 -0700)] 
sandbox: Call bootm_final()

Add a call to bootm_final() before the simulated kernel jump. This
adds the "Starting kernel" message, bootstage tracking,
board_quiesce_devices() and dm_remove_devices_active() which were not
previously called on sandbox.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
5 weeks agoxtensa: Call bootm_final()
Simon Glass [Fri, 6 Mar 2026 02:36:25 +0000 (19:36 -0700)] 
xtensa: Call bootm_final()

Add a call to bootm_final() before jumping to the kernel. This adds
the "Starting kernel" message, bootstage tracking,
board_quiesce_devices() and dm_remove_devices_active() which were not
previously called on Xtensa.

Signed-off-by: Simon Glass <simon.glass@canonical.com>