]> git.ipfire.org Git - thirdparty/gcc.git/commit
RISC-V: Add test for vec_duplicate + vaaddu.vv combine case 0 with GR2VR cost 0,...
authorPan Li <pan2.li@intel.com>
Mon, 21 Jul 2025 01:13:27 +0000 (09:13 +0800)
committerPan Li <pan2.li@intel.com>
Mon, 21 Jul 2025 13:27:18 +0000 (21:27 +0800)
commit04cfb71957473c3c738e2900940a6781a3f0544d
treec87b62a16bcc9aa35488b5e90afc2b6bb4555995
parent9e2aaaba47cf635169e9051c4e86f39d04c69f1d
RISC-V: Add test for vec_duplicate + vaaddu.vv combine case 0 with GR2VR cost 0, 2 and 15 for QI, HI and SI mode

Add asm dump check and run test for vec_duplicate + vaaddu.vv
combine to vaaddu.vx, with the GR2VR cost is 0, 2 and 15.  Please
note DImode is not included here.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c: Add asm check.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h: Add test
helper macros.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h: Add test
data for run test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u16.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u32.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u8.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
14 files changed:
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u16.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u32.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u8.c [new file with mode: 0644]