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author	Yat Long Poon <yatlong.poon@arm.com>
	Fri, 3 Jan 2025 19:07:30 +0000 (19:07 +0000)
committer	Wilco Dijkstra <wilco.dijkstra@arm.com>
	Thu, 27 Feb 2025 17:52:45 +0000 (17:52 +0000)
commit	4073e4ee2c68de89b7220afba8d0780f86d9c60e
tree	f1e8e00270a128315cda6455b985323ea9aefe4c	tree
parent	78abd3ef6e607853def82a97bf34a3c632db04e2	commit \| diff

AArch64: Improve codegen for SVE logs

Reduce memory access by using lanewise MLA and moving constants to struct
and reduce number of MOVPRFXs.
Update maximum ULP error for double log_sve from 1 to 2.
Speedup on Neoverse V1 for log (3%), log2 (5%), and log10 (4%).

(cherry picked from commit 32d193a372feb28f9da247bb7283d404b84429c6)

A mirror of the official glibc repository

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sysdeps/aarch64/fpu/log10_sve.c		diff \| blob \| blame \| history
sysdeps/aarch64/fpu/log2_sve.c		diff \| blob \| blame \| history
sysdeps/aarch64/fpu/log_sve.c		diff \| blob \| blame \| history
sysdeps/aarch64/libm-test-ulps		diff \| blob \| blame \| history