]> git.ipfire.org Git - thirdparty/glibc.git/commit
x86-64: Optimize load of all bits set into ZMM register [BZ #28252]
authorH.J. Lu <hjl.tools@gmail.com>
Fri, 20 Aug 2021 13:42:24 +0000 (06:42 -0700)
committerSunil K Pandey <skpgkp2@gmail.com>
Mon, 2 May 2022 20:00:04 +0000 (13:00 -0700)
commitc09d92d4f657560bf884c735bc8fdd53e4276367
tree934f08c809ab2b1103c53da8642d40932cbd95b9
parent83454fe8d7f8b7f628308687cd56155a61076e66
x86-64: Optimize load of all bits set into ZMM register [BZ #28252]

Optimize loads of all bits set into ZMM register in AVX512 SVML codes
by replacing

vpbroadcastq .L_2il0floatpacket.16(%rip), %zmmX

and

vmovups   .L_2il0floatpacket.13(%rip), %zmmX

with
vpternlogd $0xff, %zmmX, %zmmX, %zmmX

This fixes BZ #28252.

(cherry picked from commit 78c9ec9000f873abe7a15a91b87080a2e4308260)
sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_d_log8_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core_avx512.S