]> git.ipfire.org Git - thirdparty/binutils-gdb.git/commit
[sim] Run spellcheck.sh in sim (part 1)
authorTom de Vries <tdevries@suse.de>
Sat, 23 Nov 2024 12:07:38 +0000 (13:07 +0100)
committerTom de Vries <tdevries@suse.de>
Sat, 23 Nov 2024 12:07:38 +0000 (13:07 +0100)
commitd2d240ff89b4d3359ea70cdb47d3e79294ca891a
treed277cf5c4263881d513deb2d7389c2a0c1f4610b
parent8dfa29fcbd60bead4d67569bd14c818540959130
[sim] Run spellcheck.sh in sim (part 1)

Run gdb/contrib/spellcheck.sh on directory sim.

Fix auto-corrected typos:
...
accessable -> accessible
accidently -> accidentally
accomodate -> accommodate
adress -> address
afair -> affair
agains -> against
agressively -> aggressively
annuled -> annulled
arbitary -> arbitrary
arround -> around
auxillary -> auxiliary
availablity -> availability
clasic -> classic
comming -> coming
controled -> controlled
controling -> controlling
destory -> destroy
existance -> existence
explictly -> explicitly
faciliate -> facilitate
fouth -> fourth
fullfilled -> fulfilled
guarentee -> guarantee
hinderance -> hindrance
independant -> independent
inital -> initial
loosing -> losing
occurance -> occurrence
occured -> occurred
occuring -> occurring
omited -> omitted
oportunity -> opportunity
parallely -> parallelly
permissable -> permissible
postive -> positive
powerfull -> powerful
preceed -> precede
preceeding -> preceding
preceeds -> precedes
primative -> primitive
probaly -> probably
programable -> programmable
propogate -> propagate
propper -> proper
recieve -> receive
reconized -> recognized
refered -> referred
refering -> referring
relevent -> relevant
responisble -> responsible
retreive -> retrieve
safty -> safety
specifiying -> specifying
spontanous -> spontaneous
sqaure -> square
successfull -> successful
supress -> suppress
sytem -> system
thru -> through
transfered -> transferred
trigered -> triggered
unfortunatly -> unfortunately
upto -> up to
usefull -> useful
wierd -> weird
writen -> written
doesnt -> doesn't
isnt -> isn't
...

Manually undid the "andd -> and" transformation in sim/testsuite/cr16/andd.cgs
and sim/cr16/simops.c.

Tested by rebuilding on x86_64-linux.

Approved-By: Tom Tromey <tom@tromey.com>
89 files changed:
sim/aarch64/memory.c
sim/arm/armcopro.c
sim/arm/armemu.c
sim/bfin/devices.h
sim/bfin/dv-bfin_cec.c
sim/common/dv-pal.c
sim/common/hw-base.h
sim/common/hw-device.h
sim/common/hw-instances.h
sim/common/hw-tree.c
sim/common/sim-arange.c
sim/common/sim-bits.h
sim/common/sim-config.h
sim/common/sim-core.h
sim/common/sim-engine.h
sim/common/sim-inline.h
sim/common/sim-io.c
sim/common/sim-resume.c
sim/erc32/exec.c
sim/erc32/float.c
sim/erc32/sis.h
sim/frv/frv-sim.h
sim/frv/profile.c
sim/frv/traps.c
sim/h8300/compile.c
sim/igen/gen-engine.c
sim/igen/gen-icache.c
sim/igen/gen-semantics.c
sim/igen/gen-semantics.h
sim/igen/gen.c
sim/igen/igen.c
sim/igen/igen.h
sim/igen/ld-decode.c
sim/igen/ld-decode.h
sim/igen/ld-insn.c
sim/igen/lf.h
sim/lm32/dv-lm32uart.c
sim/m32r/mloop2.in
sim/m32r/mloopx.in
sim/m32r/traps.c
sim/m68hc11/dv-m68hc11tim.c
sim/mips/acinclude.m4
sim/mips/interp.c
sim/mips/m16.igen
sim/mips/mips.igen
sim/mips/sim-main.h
sim/mn10300/interp.c
sim/ppc/BUGS
sim/ppc/INSTALL
sim/ppc/README
sim/ppc/RUN
sim/ppc/altivec_registers.h
sim/ppc/corefile.h
sim/ppc/cpu.h
sim/ppc/debug.c
sim/ppc/device.h
sim/ppc/emul_bugapi.c
sim/ppc/gen-icache.c
sim/ppc/gen-idecode.c
sim/ppc/gen-semantics.h
sim/ppc/hw_cpu.c
sim/ppc/hw_eeprom.c
sim/ppc/hw_ide.c
sim/ppc/hw_init.c
sim/ppc/hw_opic.c
sim/ppc/hw_phb.c
sim/ppc/idecode_expression.h
sim/ppc/igen.c
sim/ppc/igen.h
sim/ppc/ld-decode.h
sim/ppc/powerpc.igen
sim/ppc/psim.c
sim/ppc/psim.texinfo
sim/ppc/std-config.h
sim/ppc/tree.c
sim/ppc/vm.c
sim/ppc/vm.h
sim/sh/interp.c
sim/testsuite/bfin/se_illegalcombination.S
sim/testsuite/bfin/se_undefinedinstruction1.S
sim/testsuite/bfin/se_undefinedinstruction2.S
sim/testsuite/d10v/t-macros.i
sim/testsuite/frv/testutils.inc
sim/testsuite/h8300/ldc.s
sim/testsuite/h8300/stc.s
sim/testsuite/h8300/testutils.inc
sim/v850/simops.c
sim/v850/v850-sim.h
sim/v850/v850.igen