RISC-V: Avoid parsing arch string repeatedly for dis-assembler

RISC-V: Avoid parsing arch string repeatedly for dis-assembler

Since we now always generate $x+isa for now, these would increase the
dis-assemble time by parsing the same architecture string repeatedly.  We
already have `arch_str' field into `subset_list' to record the current
architecture stirng, but it's only useful for assembler, since dis-assembler
and linker don't need it before.  Now for dis-assembler, we just need to
update the `arch_str' after parsing the architecture stirng, and then avoid
parsing repeatedly if the strings are the same.