]> git.ipfire.org Git - thirdparty/gcc.git/commit
aarch64: Rename bic/orn patterns to iorn/andn for vector modes
authorAndrew Pinski <quic_apinski@quicinc.com>
Mon, 22 Jul 2024 18:19:11 +0000 (11:19 -0700)
committerThomas Koenig <tkoenig@gcc.gnu.org>
Sun, 28 Jul 2024 17:06:01 +0000 (19:06 +0200)
commitfe2e945c18752903d8db4118ef033d606525dc83
tree0652afed2c4fabc4258aa6f450ecd3613431754d
parente93bb5da972050c78ac3b945c7ee9d548f064ef9
aarch64: Rename bic/orn patterns to iorn/andn for vector modes

This renames the patterns orn<mode>3 to iorn<mode>3 so it
matches the new optab that was added with r15-1890-gf379596e0ba99d.
Likewise for bic<mode>3 to andn<mode>3.

Note the operand 1 and operand 2 are swapped from the original
patterns to match the optab now.

Built and tested for aarch64-linux-gnu with no regression.

gcc/ChangeLog:

* config/aarch64/aarch64-simd.md
(bic<mode>3<vczle><vczbe>): Rename to ...
(andn<mode>3<vczle><vczbe>): This. Also swap operands.
(orn<mode>3<vczle><vczbe>): Rename to ...
(iorn<mode>3<vczle><vczbe>): This. Also swap operands.
(vec_cmp<mode><v_int_equiv>): Update orn call to iorn
and swap the last two arguments.

gcc/testsuite/ChangeLog:

* g++.target/aarch64/vect_cmp-1.C: New test.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
gcc/config/aarch64/aarch64-simd.md
gcc/testsuite/g++.target/aarch64/vect_cmp-1.C [new file with mode: 0644]