]> git.ipfire.org Git - thirdparty/qemu.git/commit
i386/cpu: Consolidate CPUID 0x4 leaf
authorZhao Liu <zhao1.liu@intel.com>
Fri, 11 Jul 2025 10:21:30 +0000 (18:21 +0800)
committerPaolo Bonzini <pbonzini@redhat.com>
Sat, 12 Jul 2025 13:28:21 +0000 (15:28 +0200)
commitfe77a78149359485459db26814af436cfc873afe
tree1d561005b1bf4cf9c7cd40d19e485f86a918f1a8
parent6699e5dc864b0793e4fd90ef8038f6c71fcd0d47
i386/cpu: Consolidate CPUID 0x4 leaf

Modern Intel CPUs use CPUID 0x4 leaf to describe cache information
and leave space in 0x2 for prefetch and TLBs (even TLB has its own leaf
CPUID 0x18).

And 0x2 leaf provides a descriptor 0xFF to instruct software to check
cache information in 0x4 leaf instead.

Therefore, follow this behavior to encode 0xFF when Intel CPU has 0x4
leaf with "x-consistent-cache=true" for compatibility.

In addition, for older CPUs without 0x4 leaf, still enumerate the cache
descriptor in 0x2 leaf, except the case that there's no descriptor
matching the cache model, then directly encode 0xFF in 0x2 leaf. This
makes sense, as in the 0x2 leaf era, all supported caches should have
the corresponding descriptor.

Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Tested-by: Yi Lai <yi1.lai@intel.com>
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20250711102143.1622339-6-zhao1.liu@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
target/i386/cpu.c