grub_addr_t dlinesz);
void grub_arm_clean_dcache_range_armv7 (grub_addr_t start, grub_addr_t end,
grub_addr_t dlinesz);
+void grub_arm_clean_dcache_range_poc_armv7 (grub_addr_t start, grub_addr_t end,
+ grub_addr_t dlinesz);
void grub_arm_invalidate_icache_range_armv6 (grub_addr_t start, grub_addr_t end,
grub_addr_t dlinesz);
void grub_arm_invalidate_icache_range_armv7 (grub_addr_t start, grub_addr_t end,
}
void
-grub_arch_sync_dma_caches (void *address, grub_size_t len)
+grub_arch_sync_dma_caches (volatile void *address, grub_size_t len)
{
- grub_arch_sync_caches (address, len);
+ grub_addr_t start = (grub_addr_t) address;
+ grub_addr_t end = start + len;
+
+ if (type == ARCH_UNKNOWN)
+ probe_caches ();
+ start = ALIGN_DOWN (start, grub_arch_cache_max_linesz);
+ end = ALIGN_UP (end, grub_arch_cache_max_linesz);
+ switch (type)
+ {
+ case ARCH_ARMV6:
+ grub_arm_clean_dcache_range_armv6 (start, end, grub_arch_cache_dlinesz);
+ grub_arm_invalidate_icache_range_armv6 (start, end,
+ grub_arch_cache_ilinesz);
+ break;
+ case ARCH_ARMV5_WRITE_THROUGH:
+ case ARCH_ARMV6_UNIFIED:
+ grub_arm_clean_dcache_range_armv6 (start, end, grub_arch_cache_dlinesz);
+ break;
+ case ARCH_ARMV7:
+ grub_arm_clean_dcache_range_poc_armv7 (start, end, grub_arch_cache_dlinesz);
+ grub_arm_invalidate_icache_range_armv7 (start, end,
+ grub_arch_cache_ilinesz);
+ break;
+ /* Pacify GCC. */
+ case ARCH_UNKNOWN:
+ break;
+ }
}
void
# define ISB isb
#define ARMV7 1
+FUNCTION(grub_arm_clean_dcache_range_poc_armv7)
+ DSB
+ @ Clean data cache for range to point-of-coherence
+1: cmp r0, r1
+ bge 2f
+ mcr p15, 0, r0, c7, c14, 1 @ DCCMVAC
+ add r0, r0, r2 @ Next line
+ b 1b
+2: DSB
+ bx lr
+
+
@ r0 - CLIDR
@ r1 - LoC
@ r2 - current level
pop {r4-r12, lr}
bx lr
-#include "cache.S"
\ No newline at end of file
+#include "cache.S"