arm: socfpga: misc: Exclude Agilex from clock manager base address retrieval

Agilex retrieves its clock manager address via probing its own clock
driver model during the SPL initialization.

Therefore, excluding Agilex from calling its clock driver in misc
driver to retrieve the clock manager address.

Once all SoC64 devices has been successfully transition to clock
driver model method, this implementation will be cleaned up.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>

diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
index 3089f823b20968a606dad7a06cf3f5fc2c021161..eb0eeb7bef4dddb1eb4c1ef43a4bf884fac70aa9 100644 (file)
--- a/arch/arm/mach-socfpga/misc.c
+++ b/arch/arm/mach-socfpga/misc.c
@@ -261,13 +261,11 @@ void socfpga_get_managers_addr(void)
        if (ret)
                hang();
 
-       if (IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX))
-               ret = socfpga_get_base_addr("intel,agilex-clkmgr",
-                                           &socfpga_clkmgr_base);
        else if (IS_ENABLED(CONFIG_TARGET_SOCFPGA_N5X))
                ret = socfpga_get_base_addr("intel,n5x-clkmgr",
                                            &socfpga_clkmgr_base);
-       else if (!IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX5))
+       else if (!IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX) &&
+                !IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX5))
                ret = socfpga_get_base_addr("altr,clk-mgr",
                                            &socfpga_clkmgr_base);