drivers: clk: agilex: Use real clock source frequency

Update the ARMv8 generic timer frequency register (cntfrq_el0)
with the actual hardware timer frequency (COUNTER_FREQUENCY_REAL).

The generic timer frequency was set to 0x200000000 during boot clk
which needs to be set to 0x400000000 when transition from boot clk
to PLL clk.

This will ensure that subsequent timer operations are based on the
correct frequency, ensuring accurate timekeeping.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>

diff --git a/drivers/clk/altera/clk-agilex.c b/drivers/clk/altera/clk-agilex.c
index e1ddd02f35698696822ba5d5f48db32715c458f2..b922723d8daa1b52b48df96a43e2a232bde05691 100644 (file)
--- a/drivers/clk/altera/clk-agilex.c
+++ b/drivers/clk/altera/clk-agilex.c
@@ -6,6 +6,7 @@
 #include <log.h>
 #include <asm/global_data.h>
 #include <asm/io.h>
+#include <asm/system.h>
 #include <clk-uclass.h>
 #include <dm.h>
 #include <dm/lists.h>
@@ -337,6 +338,18 @@ static void clk_basic_init(struct udevice *dev,
        CM_REG_CLRBITS(plat, CLKMGR_ALTR_EXTCNTRST,
                       CLKMGR_ALT_EXTCNTRST_ALLCNTRST);
 
+#ifdef COUNTER_FREQUENCY_REAL
+       u32 cntfrq = COUNTER_FREQUENCY_REAL;
+       u32 counter_freq = 0;
+
+       /* Update with accurate clock frequency */
+       if (current_el() == 3) {
+               asm volatile("msr cntfrq_el0, %0" : : "r" (cntfrq) : "memory");
+               asm volatile("mrs %0, cntfrq_el0" : "=r" (counter_freq));
+               debug("Counter freq = 0x%x\n", counter_freq);
+       }
+#endif
+
        /* Out of boot mode */
        clk_write_ctrl(plat,
                       CM_REG_READL(plat, CLKMGR_CTRL) & ~CLKMGR_CTRL_BOOTMODE);

diff --git a/drivers/clk/altera/clk-agilex.h b/drivers/clk/altera/clk-agilex.h
index cd68ebc4387eb1b6fe1d3786e3213ad4044201b6..b3e8841a5125f47738cdee35e39791cb1ebddbfb 100644 (file)
--- a/drivers/clk/altera/clk-agilex.h
+++ b/drivers/clk/altera/clk-agilex.h
@@ -10,6 +10,8 @@
 #include <linux/bitops.h>
 #endif
 
+#define COUNTER_FREQUENCY_REAL 400000000
+
 #define CM_REG_READL(plat, reg)                                \
        readl((plat)->regs + (reg))