]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
arm: socfpga: Update Agilex SPL data save and restore implementation
authorAlif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Mon, 4 Aug 2025 01:24:32 +0000 (18:24 -0700)
committerTien Fong Chee <tien.fong.chee@intel.com>
Fri, 8 Aug 2025 14:19:23 +0000 (22:19 +0800)
Enable backup for data section to support warm reset in Agilex SPL as
no SPL image would be reloaded in warm reset.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
arch/arm/mach-socfpga/spl_agilex.c

index faba04338387115bc25f2b84e1b7ca7443a3de12..698e76f45b204747bffdbdbde3c5a1b2870d059a 100644 (file)
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
  * Copyright (C) 2019 Intel Corporation <www.intel.com>
+ * Copyright (C) 2025 Altera Corporation <www.altera.com>
  *
  */
 
 
 DECLARE_GLOBAL_DATA_PTR;
 
+u32 reset_flag(void)
+{
+       /* Check rstmgr.stat for warm reset status */
+       u32 status = readl(SOCFPGA_RSTMGR_ADDRESS);
+
+       /* Check whether any L4 watchdogs or SDM had triggered warm reset */
+       u32 warm_reset_mask = RSTMGR_L4WD_MPU_WARMRESET_MASK;
+
+       if (status & warm_reset_mask)
+               return 0;
+
+       return 1;
+}
+
 void board_init_f(ulong dummy)
 {
        int ret;
        struct udevice *dev;
 
+#if defined(CONFIG_XPL_BUILD) && defined(CONFIG_SPL_RECOVER_DATA_SECTION)
+    spl_save_restore_data();
+#endif
+
        ret = spl_early_init();
        if (ret)
                hang();