]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
i386: Fix invalid RTX mode in the unnamed rotate splitter.
authorUros Bizjak <ubizjak@gmail.com>
Wed, 6 Aug 2025 18:06:42 +0000 (20:06 +0200)
committerUros Bizjak <ubizjak@gmail.com>
Wed, 6 Aug 2025 22:08:46 +0000 (00:08 +0200)
The following splitter from the commit r11-5747:

(define_split
  [(set (match_operand:SWI 0 "register_operand")
        (any_rotate:SWI
          (match_operand:SWI 1 "const_int_operand")
          (subreg:QI
            (and
              (match_operand 2 "int248_register_operand")
              (match_operand 3 "const_int_operand")) 0)))]
 "(INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode) - 1))
   == GET_MODE_BITSIZE (<MODE>mode) - 1"
 [(set (match_dup 4) (match_dup 1))
  (set (match_dup 0)
       (any_rotate:SWI (match_dup 4)
                       (subreg:QI
                         (and:SI (match_dup 2) (match_dup 3)) 0)))]
 "operands[4] = gen_reg_rtx (<MODE>mode);")

matches any mode of (and ...) on input, but hard-codes (and:SI ...)
in the output.  This causes an ICE if the incoming (and ...) is DImode
rather than SImode.

Co-developed-by: Richard Sandiford <richard.sandiford@arm.com>
PR target/96226

gcc/ChangeLog:

* config/i386/predicates.md (and_operator): New operator.
* config/i386/i386.md (splitter after *<rotate_insn><mode>3_mask):
Use and_operator to match AND RTX and use its mode
in the split pattern.

gcc/config/i386/i386.md
gcc/config/i386/predicates.md

index 2b0dd66c68b60d9cd32013a6150ce76e9a0a58c9..6686f1070f9fe915de5977b33b7d7b5da6d2ce89 100644 (file)
        (any_rotate:SWI
          (match_operand:SWI 1 "const_int_operand")
          (subreg:QI
-           (and
-             (match_operand 2 "int248_register_operand")
-             (match_operand 3 "const_int_operand")) 0)))]
+           (match_operator 4 "and_operator"
+             [(match_operand 2 "int248_register_operand")
+              (match_operand 3 "const_int_operand")]) 0)))]
  "(INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode) - 1))
    == GET_MODE_BITSIZE (<MODE>mode) - 1"
- [(set (match_dup 4) (match_dup 1))
+ [(set (match_dup 5) (match_dup 1))
   (set (match_dup 0)
-       (any_rotate:SWI (match_dup 4)
+       (any_rotate:SWI (match_dup 5)
                       (subreg:QI
-                        (and:SI (match_dup 2) (match_dup 3)) 0)))]
- "operands[4] = gen_reg_rtx (<MODE>mode);")
+                        (match_op_dup 4 [(match_dup 2) (match_dup 3)]) 0)))]
+ "operands[5] = gen_reg_rtx (<MODE>mode);")
 
 (define_insn_and_split "*<insn><mode>3_mask_1"
   [(set (match_operand:SWI 0 "nonimmediate_operand")
index 0f310902e7b410edf9f5773dd61952cb9928f23f..175798cff69bfcbbad4b55fa505cd91ec879702d 100644 (file)
 (define_predicate "div_operator"
   (match_code "div"))
 
-;; Return true if this is a and, ior or xor operation.
+;; Return true if this is an and, ior or xor operation.
 (define_predicate "logic_operator"
   (match_code "and,ior,xor"))
 
+;; Return true if this is an and operation.
+(define_predicate "and_operator"
+  (match_code "and"))
+
 ;; Return true if this is a plus, minus, and, ior or xor operation.
 (define_predicate "plusminuslogic_operator"
   (match_code "plus,minus,and,ior,xor"))