rockchip: dt: add some overclocked rk3328 boards

nanopi-r2c, nanopi-r2c-plus-oc, nanopi-r2s-oc,
nanopi-r2s-plus oc, orangepi-r1-plus-lts-oc,
orangepi-r1-plus-oc

Signed-off-by: Arne Fitzenreiter <arne_f@ipfire.org>

diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index c5b3ad51c4d269ad4257037b87c43b46c90c89f9..678acae0199499f7e3e6cacec54c4ea4ae54a30b 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -19,11 +19,17 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go3.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c-oc.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c-plus.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c-plus-oc.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s-plus.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s-plus-oc.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s-oc.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus-oc.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus-lts.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus-lts-oc.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock-pi-e.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb

diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c-oc.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c-oc.dts
new file mode 100644 (file)
index 0000000..617bcef
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c-oc.dts
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * overclock Nanopi R2C to 1.5 Ghz
+ */
+
+/dts-v1/;
+
+#include "rk3328-nanopi-r2c.dts"
+
+/ {
+       model = "FriendlyElec NanoPi R2C OC";
+
+       cpu0_opp_table: opp-table-0 {
+               opp-1392000000 {
+                       opp-hz = /bits/ 64 <1392000000>;
+                       opp-microvolt = <1350000>;
+                       clock-latency-ns = <40000>;
+               };
+               opp-1512000000 {
+                       opp-hz = /bits/ 64 <1512000000>;
+                       opp-microvolt = <1400000>;
+                       clock-latency-ns = <40000>;
+               };
+       };
+};

diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c-plus-oc.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c-plus-oc.dts
new file mode 100644 (file)
index 0000000..5324afe
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c-plus-oc.dts
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * overclock Nanopi R2C to 1.5 Ghz
+ */
+
+/dts-v1/;
+
+#include "rk3328-nanopi-r2c-plus.dts"
+
+/ {
+       model = "FriendlyElec NanoPi R2C Plus OC";
+
+       cpu0_opp_table: opp-table-0 {
+               opp-1392000000 {
+                       opp-hz = /bits/ 64 <1392000000>;
+                       opp-microvolt = <1350000>;
+                       clock-latency-ns = <40000>;
+               };
+               opp-1512000000 {
+                       opp-hz = /bits/ 64 <1512000000>;
+                       opp-microvolt = <1400000>;
+                       clock-latency-ns = <40000>;
+               };
+       };
+};

diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-oc.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-oc.dts
new file mode 100644 (file)
index 0000000..b94dc24
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-oc.dts
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * overclock Nanopi R2S to 1.5 Ghz
+ */
+
+/dts-v1/;
+
+#include "rk3328-nanopi-r2s.dts"
+
+/ {
+       model = "FriendlyElec NanoPi R2S OC";
+
+       cpu0_opp_table: opp-table-0 {
+               opp-1392000000 {
+                       opp-hz = /bits/ 64 <1392000000>;
+                       opp-microvolt = <1350000>;
+                       clock-latency-ns = <40000>;
+               };
+               opp-1512000000 {
+                       opp-hz = /bits/ 64 <1512000000>;
+                       opp-microvolt = <1400000>;
+                       clock-latency-ns = <40000>;
+               };
+       };
+};

diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus-oc.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus-oc.dts
new file mode 100644 (file)
index 0000000..963765f
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus-oc.dts
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * overclock Nanopi R2S plus to 1.5 Ghz
+ */
+
+/dts-v1/;
+
+#include "rk3328-nanopi-r2s-plus.dts"
+
+/ {
+       model = "FriendlyElec NanoPi R2S OC";
+
+       cpu0_opp_table: opp-table-0 {
+               opp-1392000000 {
+                       opp-hz = /bits/ 64 <1392000000>;
+                       opp-microvolt = <1350000>;
+                       clock-latency-ns = <40000>;
+               };
+               opp-1512000000 {
+                       opp-hz = /bits/ 64 <1512000000>;
+                       opp-microvolt = <1400000>;
+                       clock-latency-ns = <40000>;
+               };
+       };
+};

diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts-oc.dts b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts-oc.dts
new file mode 100644 (file)
index 0000000..1cc615a
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts-oc.dts
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * overclock OrangePi R1 Plus LTS to 1.5 Ghz
+ */
+
+/dts-v1/;
+
+#include "rk3328-orangepi-r1-plus-lts.dts"
+
+/ {
+       model = "Xunlong Orange Pi R1 Plus LTS OC";
+
+       cpu0_opp_table: opp-table-0 {
+               opp-1392000000 {
+                       opp-hz = /bits/ 64 <1392000000>;
+                       opp-microvolt = <1350000>;
+                       clock-latency-ns = <40000>;
+               };
+               opp-1512000000 {
+                       opp-hz = /bits/ 64 <1512000000>;
+                       opp-microvolt = <1400000>;
+                       clock-latency-ns = <40000>;
+               };
+       };
+};

diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-oc.dts b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-oc.dts
new file mode 100644 (file)
index 0000000..1a420d2
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-oc.dts
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * overclock OrangePi R1 Plus to 1.5 Ghz
+ */
+
+/dts-v1/;
+
+#include "rk3328-nanopi-r2s.dts"
+
+/ {
+       model = "Xunlong Orange Pi R1 Plus OC";
+
+       cpu0_opp_table: opp-table-0 {
+               opp-1392000000 {
+                       opp-hz = /bits/ 64 <1392000000>;
+                       opp-microvolt = <1350000>;
+                       clock-latency-ns = <40000>;
+               };
+               opp-1512000000 {
+                       opp-hz = /bits/ 64 <1512000000>;
+                       opp-microvolt = <1400000>;
+                       clock-latency-ns = <40000>;
+               };
+       };
+};