From: Tom de Vries Date: Sat, 23 Nov 2024 12:07:38 +0000 (+0100) Subject: [sim] Run spellcheck.sh in sim (part 2) X-Git-Tag: gdb-16-branchpoint~339 X-Git-Url: http://git.ipfire.org/gitweb/gitweb.cgi?a=commitdiff_plain;h=2c781c5fcf82741d84cce66d3f86e6a0f4e6269a;p=thirdparty%2Fbinutils-gdb.git [sim] Run spellcheck.sh in sim (part 2) Run gdb/contrib/spellcheck.sh on directory sim. Fix these todos: ... TODO: inbetween -> between, in between, in-between TODO: behavour -> behavior, behaviour TODO: firts -> flirts, first TODO: wich -> which, witch ... Tested by rebuilding on x86_64-linux. Reviewed-By: Eli Zaretskii Approved-By: Tom Tromey --- diff --git a/sim/d10v/interp.c b/sim/d10v/interp.c index d6a94618524..f105e4fb903 100644 --- a/sim/d10v/interp.c +++ b/sim/d10v/interp.c @@ -964,7 +964,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu) { if (PSW_RP && PC == RPT_E) { - /* Note: The behavour of a branch instruction at RPT_E + /* Note: The behavior of a branch instruction at RPT_E is implementation dependant, this simulator takes the branch. Branching to RPT_E is valid, the instruction must be executed before the loop is taken. */ diff --git a/sim/erc32/README.erc32 b/sim/erc32/README.erc32 index f413599294c..45ae22bb2a5 100644 --- a/sim/erc32/README.erc32 +++ b/sim/erc32/README.erc32 @@ -59,7 +59,7 @@ register is updated accordingly. Implemeted registers are: - Breakpoint register (0x01f800c4, write-only) - Watchpoint register (0x01f800c8, write-only) - System fault status register (0x01f800a0, read-write) -- Firts failing address register (0x01f800a4, read-write) +- First failing address register (0x01f800a4, read-write) 1.5 Memory interface diff --git a/sim/erc32/README.gdb b/sim/erc32/README.gdb index 619fcb38fc9..cfad07fe0f8 100644 --- a/sim/erc32/README.gdb +++ b/sim/erc32/README.gdb @@ -45,7 +45,7 @@ For info on supported ERC32 functionality, see README.sis. The GDB load command loads an aout file into the simulator memory with the data section starting directly after the text -section regardless of wich start address was specified for the data +section regardless of which start address was specified for the data at link time! This means that your applications either has to include a routine that initialise the data segment at the proper address or link with the data placed directly after the text section. diff --git a/sim/ppc/interrupts.h b/sim/ppc/interrupts.h index 71711293309..531f4ffba1f 100644 --- a/sim/ppc/interrupts.h +++ b/sim/ppc/interrupts.h @@ -33,7 +33,7 @@ restart. (or to put it another way, long jump). In looking at the code it may occure to you that, for some interrupts, they could return instead of restarting the cpu (eg system_call). While true - (it once was like that) I've decided to make the behavour of all + (it once was like that) I've decided to make the behavior of all interrupt routines roughly identical. Because, a cpu's recorded state (ie what is in the cpu structure) diff --git a/sim/ppc/os_emul.h b/sim/ppc/os_emul.h index fdc2579bb26..256b6aaffb3 100644 --- a/sim/ppc/os_emul.h +++ b/sim/ppc/os_emul.h @@ -35,7 +35,7 @@ INLINE_OS_EMUL\ /* System-call emulation - for user code. Instead of trapping system - calls to kernel mode, the simulator emulates the kernels behavour */ + calls to kernel mode, the simulator emulates the kernels behavior */ INLINE_OS_EMUL\ (void) os_emul_system_call @@ -47,7 +47,7 @@ INLINE_OS_EMUL\ instructions are added to the instruction table that when executed call this emulation function. The instruction call emulator should verify the address that the instruction appears before emulating - the required behavour. If the verification fails, a zero value + the required behavior. If the verification fails, a zero value should be returned (indicating instruction illegal). */ INLINE_OS_EMUL\ diff --git a/sim/testsuite/mips/hilo-hazard-3.s b/sim/testsuite/mips/hilo-hazard-3.s index 9d50da2a07d..4c0aebfa9f0 100644 --- a/sim/testsuite/mips/hilo-hazard-3.s +++ b/sim/testsuite/mips/hilo-hazard-3.s @@ -1,4 +1,4 @@ -# Test for mf{hi,lo} -> mult/div/mt{hi,lo} with 2 nops inbetween. +# Test for mf{hi,lo} -> mult/div/mt{hi,lo} with 2 nops in between. # # mach: -mips32r6 -mips64r6 all # as: -mabi=eabi diff --git a/sim/testsuite/mips/hilo-hazard-4.s b/sim/testsuite/mips/hilo-hazard-4.s index 03c000c719e..d44a97497b0 100644 --- a/sim/testsuite/mips/hilo-hazard-4.s +++ b/sim/testsuite/mips/hilo-hazard-4.s @@ -1,4 +1,4 @@ -# Test for mf{hi,lo} -> mult/div/mt{hi,lo} with 2 nops inbetween. +# Test for mf{hi,lo} -> mult/div/mt{hi,lo} with 2 nops in between. # # mach: all # as: -mabi=eabi -mmicromips