From: Michael Brown Date: Mon, 2 Jun 2025 07:59:54 +0000 (+0100) Subject: [riscv] Do not set executable bit in early UART page mapping X-Git-Url: http://git.ipfire.org/gitweb/gitweb.cgi?a=commitdiff_plain;h=817145fe015f494721f3c857c362f9d1d130c18c;p=thirdparty%2Fipxe.git [riscv] Do not set executable bit in early UART page mapping Signed-off-by: Michael Brown --- diff --git a/src/arch/riscv/prefix/libprefix.S b/src/arch/riscv/prefix/libprefix.S index 3fe01d7c8..b51d1d741 100644 --- a/src/arch/riscv/prefix/libprefix.S +++ b/src/arch/riscv/prefix/libprefix.S @@ -879,7 +879,7 @@ enable_paging_64_loop: #ifdef EARLY_UART_REG_BASE li t0, ( EARLY_UART_REG_BASE & ~( ( 1 << VPN1_LSB ) - 1 ) ) srli t0, t0, PTE_PPN_SHIFT - ori t0, t0, PTE_LEAF + ori t0, t0, ( PTE_LEAF & ~PTE_X ) STOREN t0, -PTE_SIZE(a3) #endif